AS7C1024L-35JC [ALSC]
Standard SRAM, 128KX8, 35ns, CMOS, PDSO32;型号: | AS7C1024L-35JC |
厂家: | ALLIANCE SEMICONDUCTOR CORPORATION |
描述: | Standard SRAM, 128KX8, 35ns, CMOS, PDSO32 静态存储器 光电二极管 内存集成电路 |
文件: | 总8页 (文件大小:294K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
High Performance
128K×8
AS7C1024
AS7C1024L
CMOS SRAM
®
128K×8 CMOS SRAM
Features
• Easy memory expansion with CE1, CE2, OE inputs
• Organization: 131,072 words × 8 bits
• TTL-compatible, three-state I/O
• 32-pin JEDEC standard packages
- 300 mil PDIP and SOJ
Socket compatible with 7C256 and 7C512
- 400 mil PDIP and SOJ
- 8 × 20 TSOP
• ESD protection >2000 volts
• Latch-up current > 200 mA
• High speed
- 10/12/15/20/25/35 ns address access time
- 3/3/4/5/6/8 ns output enable access time
• Low power consumption
- Active: 770 mW max (10 ns cycle)
- Standby:55 mW max, CMOS I/O
11 mW max, CMOS I/O, L version
- Very low DC component in active power
• 2.0V data retention (L version)
• Equal access and cycle times
Logic block diagram
Pin arrangement
TSOP 8×20
DIP, SOJ
Vcc
GND
Input buffer
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
32
Vcc
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
I/O7
I/O6
I/O5
I/O4
I/O3
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A0
A1
A2
I/O7
I/O0
512×256×8
A3
A4
A5
A6
A7
A8
Array
8
9
(1,048,576)
10
11
12
13
14
15
16
A0
I/O0
I/O1
I/O2
GND
WE
OE
CE1
CE2
Column decoder
Control
circuit
A A A A A A A A
9 10 1112 13 14 1516
Selection guide
7C1024-10 7C1024-12 7C1024-15 7C1024-20 7C1024-25 7C1024-35 Unit
Maximum address access time
Maximum output enable access time
Maximum operating current
10
3
12
3
15
4
20
5
25
6
35
8
ns
ns
140
10.0
2.0
130
10.0
2.0
120
10.0
2.0
110
10.0
2.0
100
10.0
2.0
90
mA
mA
mA
10.0
2.0
Maximum CMOS standby current
L
Shaded areas contain advance information.
ALLIANCE SEMICONDUCTOR
AS7C1024
Functional description
The AS7C1024 is a high performance CMOS 1,048,576-bit Static Random Access Memory (SRAM) organized as 131,072 words × 8 bits. It
is designed for memory applications where fast data access, low power, and simple interfacing are desired.
Equal address access and cycle times (t , t , t ) of 10/12/15/20/25/35 ns with output enable access times (t ) of 3/3/4/5/6/8 ns
AA RC WC
OE
are ideal for high performance applications. Active high and low chip enables (CE1, CE2) permit easy memory expansion with multiple-
bank memory systems.
When CE1 is HIGH or CE2 is LOW the device enters standby mode. The standard AS7C1024 is guaranteed not to exceed 55 mW power
consumption in standby mode; the L version is guaranteed not to exceed 11 mW, and typically requires only 5 mW. The L version also
offers 2.0V data retention.
A write cycle is accomplished by asserting write enable (WE) and both chip enables (CE1, CE2). Data on the input pins I/O0-I/O7 is written
on the rising edge of WE (write cycle 1) or the active-to-inactive edge of CE1 or CE2 (write cycle 2). To avoid bus contention, external
devices should drive I/O pins only after outputs have been disabled with output enable (OE) or write enable (WE).
A read cycle is accomplished by asserting output enable (OE) and both chip enables (CE1, CE2), with write enable (WE) HIGH. The chip
drives I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or write enable is
active, output drivers stay in high-impedance mode.
All chip inputs and outputs are TTL-compatible, and operation is from a single 5V supply. The AS7C1024 is packaged in common industry
standard packages.
Absolute maximum ratings
Parameter
Symbol
Min
–0.5
–
Max
Unit
V
Voltage on any pin relative to GND
Power dissipation
V
+7.0
1.0
t
P
W
D
o
Storage temperature (plastic)
Temperature under bias
DC output current
T
T
–55
–10
–
+150
+85
20
C
stg
bias
out
o
C
I
mA
Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to absolute max-
imum rating conditions for extended periods may affect reliability.
Truth table
CE1
H
X
CE2
X
WE
X
OE
X
Data
Mode
Standby (I , I
High Z
High Z
High Z
)
)
SB SB1
L
X
X
Standby (I , I
SB SB1
L
H
H
H
H
H
L
H
L
Output disable
Read
L
D
D
out
in
L
X
Write
Key: X = Don’t Care, L = LOW, H = HIGH
Recommended operating conditions
(T = 0°C to +70°C)
a
Parameter
Symbol
Min
4.5
0.0
2.2
–0.5
Typ
5.0
0.0
–
Max
Unit
V
V
5.5
0.0
CC
Supply voltage
GND
V
V
V
V
+1
CC
V
IH
IL
Input voltage
†
–
0.8
V
†
V
IL min = –3.0V for pulse width less than tRC/2.
2
AS7C1024
DC operating characteristics1
(V = 5V±10%, GND = 0V, T = 0°C to +70°C)
CC
a
-10
-12
-15
-20
-25
-35
Parameter
Symbol
Test Conditions
= Max,
Min Max Min Max Min Max Min Max Min Max Min Max Unit
Input leakage
current
V
V
CC
in
| I |
–
1
–
1
–
1
–
1
–
1
–
1
µA
LI
= GND to V
CC
CE1 = V or CE2 = V ,
IH
IL
Output leakage
current
| I
|
V
V
= Max,
= GND to V
–
1
–
1
–
1
–
1
–
1
–
1
µA
LO
CC
out
CC
–
–
–
–
–
140 – 130 – 120 – 110 – 100 – 90 mA
Operating power
supply current
CE1 = V , CE2 = V ,
IL
IH
I
I
CC
f = f
I
= 0 mA
L
L
135 – 125 – 115 – 105 – 95
–
–
–
–
75 mA
35 mA
30 mA
10 mA
max, out
55
50
10
–
–
–
50
45
10
–
–
–
40
35
10
–
–
–
40
35
10
–
–
–
35
30
10
CE1 = V or CE2 = V ,
IH
IL
SB
f = f
Standby
power supply
current
max
CE1 ≥ V –0.2V or CE2 ≤0.2V,
CC
I
V ≤ 0.2V or V ≥ V –0.2V,
in in CC
f = 0
SB1
L
–
2.0
–
2.0
–
2.0
–
2.0
–
2.0
–
2.0 mA
V
V
I
I
= 8 mA, V = Min
–
0.4
–
–
0.4
–
–
0.4
–
–
0.4
–
–
0.4
–
–
0.4
–
V
V
OL
OL
CC
Output voltage
= –4 mA, V = Min
2.4
2.4
2.4
2.4
2.4
2.4
OH
OH
CC
Shaded areas contain advance information.
Capacitance2
(f = 1 MHz, T = Room Temperature, V = 5V)
a
CC
Parameter
Symbol
Signals
Test Conditions
Max
5
Unit
pF
Input capacitance
I/O capacitance
C
C
A, CE1, CE2, WE, OE V = 0V
in
IN
I/O
V
= V = 0V
7
pF
I/O
in
out
Read cycle3,9,12
(V = 5V±10%, GND = 0V, T = 0°C to +70°C)
CC a
-10
-12
-15
-20
-25
-35
Parameter
Symbol Min Max Min Max Min Max Min Max Min Max Min Max Unit
Notes
Read cycle time
t
t
t
t
t
t
t
t
t
t
t
t
t
t
10
–
–
–
–
2
3
3
–
–
0
–
0
–
–
10
10
10
3
12
–
–
–
–
3
3
3
–
–
0
–
0
–
–
12
12
12
3
15
–
–
–
–
3
3
3
–
–
0
–
0
–
–
15
15
15
4
20
–
–
–
–
3
3
3
–
–
0
–
0
–
–
20
20
20
5
25
–
–
–
–
3
3
3
–
–
0
–
0
–
–
25
25
25
6
35
–
–
–
–
3
3
3
–
–
0
–
0
–
–
35
35
35
8
ns
ns
ns
ns
ns
ns
RC
Address access time
3
AA
3, 12
3, 12
Chip enable (CE1) access time
Chip enable (CE2) access time
Output enable (OE) access time
Output hold from address change
CE1 LOW to output in Low Z
CE2 HIGH to output in Low Z
CE1 HIGH to output in High Z
CE2 LOW to output in High Z
OE LOW to output in Low Z
OE HIGH to output in High Z
Power up time
ACE1
ACE2
OE
–
–
–
–
–
–
5
OH
–
–
–
–
–
–
ns 4, 5, 12
ns 4, 5, 12
ns 4, 5, 12
ns 4, 5, 12
CLZ1
CLZ2
CHZ1
CHZ2
OLZ
OHZ
PU
–
–
–
–
–
–
3
3
4
5
6
8
3
3
4
5
6
8
–
–
–
–
–
–
ns
ns
4, 5
4, 5
3
3
4
5
6
8
–
–
–
–
–
–
ns 4, 5, 12
ns 4, 5, 12
Power down time
10
12
15
20
25
35
PD
3
AS7C1024
Key to switching waveforms
Rising input
Falling input
Undefined output/don’t care
Read waveform 13,6,7,9,12
Address controlled
t
RC
Address
t
AA
t
OH
D
Data Valid
out
Read waveform 23,6,8,9,12
CE1 and CE2 controlled
1
t
RC
CE1
CE2
OE
t
OE
t
t
t
OLZ
OHZ
t
t
t
ACE1, ACE2
CHZ1, CHZ2
D
out
Data Valid
t
t
CLZ1, CLZ2
t
PD
I
I
CC
SB
t
Current
supply
PU
50%
50%
Write cycle11, 12
(V = 5V±10%, GND = 0V, T = 0°C to +70°C)
CC a
-10
-12
-15
-20
-25
-35
Parameter
Symbol Min Max Min Max Min Max Min Max Min Max Min Max Unit
Notes
Write cycle time
t
t
t
t
t
t
t
t
t
t
t
10
9
9
9
0
7
0
6
0
–
–
–
–
–
–
–
–
–
–
5
–
12
10
10
10
0
–
–
–
–
–
–
–
–
–
5
–
15
12
12
12
0
–
–
–
–
–
–
–
–
–
5
–
20
12
12
12
0
–
–
–
–
–
–
–
–
–
5
–
20
15
15
15
0
–
–
–
–
–
–
–
–
–
5
–
30
20
20
20
0
–
–
–
–
–
–
–
–
–
5
–
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WC
CW1
CW2
AW
AS
12
12
Chip enable (CE1) to write end
Chip enable (CE2) to write end
Address setup to write end
Address setup time
12
Write pulse width
8
9
12
0
15
0
17
0
WP
AH
Address hold from end of write
Data valid to write end
0
0
6
9
10
0
10
0
12
0
DW
DH
Data hold time
0
0
4, 5
4, 5
4, 5
Write enable to output in High Z
Output active from write end
Shaded areas contain advance information.
–
–
–
–
–
WZ
OW
3
3
3
3
3
3
4
AS7C1024
Write waveform 110,11,12
WE controlled
t
WC
t
t
t
AW
AH
Address
t
WP
WE
t
AS
t
DW
DH
D
Data Valid
in
t
t
WZ
OW
D
out
Write waveform 210,11,12
CE1 and CE2 controlled
t
WC
t
t
AH
AW
Address
t
t
t
CW1, CW2
AS
CE1
CE2
t
WP
WE
t
t
t
WZ
DW
DH
D
Data Valid
in
D
out
Data retention characteristics
L version only
Parameter
Symbol
Test Conditions
= 2.0V
Min
Max
–
Unit
V
V
for data retention
V
V
CC
2.0
–
CC
DR
Data retention current
I
t
500
–
µA
ns
CCDR
CE1 ≥ V –0.2V or
CC
Chip deselect to data retention time
Operation recovery time
0
CE2 ≤ 0.2V
CDR
R
t
t
–
ns
RC
V
≥ V –0.2V or
CC
in
Input leakage current
| I |
–
1
µA
V
≤ 0.2V
LI
in
Data retention waveform
L version only
Data retention mode
DR ≥ 2.0V
V
4.5V
4.5V
V
CC
t
t
R
CDR
V
DR
V
V
CE
IH
IH
5
AS7C1024
AC test conditions
– Output load: see Figure B,
Thevenin Equivalent:
except for t and t see Figure C.
CLZ
CHZ
168Ω
D
+1.728V
– Input pulse level: GND to 3.0V. See Figure A.
– Input rise and fall times: 5 ns. See Figure A.
– Input and output timing reference levels: 1.5V.
out
+5V
+5V
480Ω
480Ω
D
D
out
out
+3.0V
90%
10%
90%
10%
255Ω
30 pF*
GND
255Ω
5 pF*
GND
*including scope
and jig capacitance
GND
Figure B: Output load
Figure C: Output load for t
, t
Figure A: Input waveform
CLZ CHZ
Notes
1
2
3
4
5
6
7
8
9
During VCC power-up, a pull-up resistor to VCC on CE1 is required to meet ISB specification.
This parameter is sampled and not 100% tested.
For test conditions, see AC Test Conditions, Figures A, B, C.
tCLZ and tCHZ are specified with CL = 5pF as in Figure C. Transition is measured ±500mV from steady-state voltage.
This parameter is guaranteed but not tested.
WE is HIGH for read cycle.
CE1 and OE are LOW and CE2 is HIGH for read cycle.
Address valid prior to or coincident with CE transition LOW.
All read cycle timings are referenced from the last valid address to the first transitioning address.
10 CE1 or WE must be HIGH or CE2 LOW during address transitions.
11 All write cycle timings are referenced from the last valid address to the first transitioning address.
12 CE1 and CE2 have identical timing.
6
AS7C1024
Typical DC and AC characteristics
Normalized supply current I , I
Normalized supply current I , I
Normalized supply current I
SB1
vs. ambient temperature T
a
CC SB
CC
CC SB
vs. supply voltage V
vs. ambient temperature T
a
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
625
25
I
V
= 5.0V
CC
I
CC
CC
5
1
I
I
SB
SB
0.2
0.04
4.0
4.5
5.0
5.5
–55
–10
35
80
-55
-10
35
80
6.0
125
125
Supply voltage (V)
Ambient temperature (°C)
Ambient temperature (°C)
Normalized access time t
Normalized access time t
AA
Normalized supply current I
AA
CC
vs. supply voltage V
vs. ambient temperature T
vs. cycle frequency 1/t , 1/t
RC WC
CC
a
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
T = 25°C
V
= 5.0V
V
= 5.0V
CC
a
CC
T = 25°C
a
4.0
4.5
5.0
5.5
–55
–10
35
80
0
25
50
75
6.0
125
100
Supply voltage (V)
Ambient temperature (°C)
Cycle frequency (MHz)
Output source current I
Output sink current I
Typical access time change ∆t
OH
OL
AA
vs. output voltage V
vs. output voltage V
vs. output capacitive loading
OH
OL
140
120
100
80
140
120
100
80
35
30
25
20
15
10
5
V
= 5.0V
V
= 5.0V
V
= 4.5V
CC
CC
CC
T = 25°C
T = 25°C
a
a
60
60
40
40
20
20
0
0.0
0
0.0
0
1.25
2.5
3.75
1.25
2.5
3.75
0
250
500
750
5.0
5.0
1000
Output voltage (V)
Output voltage (V)
Capacitance (pF)
7
AS7C1024
AS7C1024L
Ordering codes
Package \ Access Time
10 ns
12 ns
15 ns
20 ns
25 ns
35 ns
AS7C1024-10TPC
AS7C1024L-10TPC
AS7C1024-12TPC
AS7C1024L-12TPC
AS7C1024-15TPC
AS7C1024L-15TPC
AS7C1024-20TPC
AS7C1024L-20TPC
AS7C1024-25TPC
AS7C1024L-25TPC
AS7C1024-35TPC
AS7C1024L-35TPC
Plastic DIP, 300 mil
AS7C1024-10PC
AS7C1024L-10PC
AS7C1024-12PC
AS7C1024L-12PC
AS7C1024-15PC
AS7C1024L-15PC
AS7C1024-20PC
AS7C1024L-20PC
AS7C1024-25PC
AS7C1024L-25PC
AS7C1024-35PC
AS7C1024L-35PC
Plastic DIP, 400 mil
Plastic SOJ, 300 mil
Plastic SOJ, 400 mil
TSOP 8×20
AS7C1024-10TJC
AS7C1024L-10TJC
AS7C1024-12TJC
AS7C1024L-12TJC
AS7C1024-15TJC
AS7C1024L-15TJC
AS7C1024-20TJC
AS7C1024L-20TJC
AS7C1024-25TJC
AS7C1024L-25TJC
AS7C1024-35TJC
AS7C1024L-35TJC
AS7C1024-10JC
AS7C1024L-10JC
AS7C1024-12JC
AS7C1024L-12JC
AS7C1024-15JC
AS7C1024L-15JC
AS7C1024-20JC
AS7C1024L-20JC
AS7C1024-25JC
AS7C1024L-25JC
AS7C1024-35JC
AS7C1024L-35JC
AS7C1024-10TC
AS7C1024L-10TC
AS7C1024-12TC
AS7C1024L-12TC
AS7C1024-15TC
AS7C1024L-15TC
AS7C1024-20TC
AS7C1024L-20TC
AS7C1024-25TC
AS7C1024L-25TC
AS7C1024-35TC
AS7C1024L-35TC
Shaded areas contain advance information.
Part numbering system
AS7C
1024
X
–XX
X
C
DOMESTIC REPS
KANSAS
CenTech
NEW JERSEY
TEXAS
EUROPE
Britcomp Sales
TAIWAN
Asian Specific Tech.
SRAM Prefix
Device Number
Blank = Standard Power
Access Time
SPoaucthkeargneS:taTtPes=MaPrDkeItPin3g00 mil
P = PDIP 400 mil Commercial Temperature Range,
North
ALABAMA
+886-2-521-2363
0°C to 70 °C
(816) 358-8100
L
= Low Power
TJ = SOJ 300 mil
T = TSOP 8¥20
J = SOJ 400 mil
ERA Associates
Surrey, England
Austin
Concord Component
(205) 772-8883
(800) 645-5500
South
Electro Tech
(610) 272-2125
NEW YORK
+44-1932 347077
+44-1932 346256
(512) 835-5822
Golden Way Electronics
+886-2-698-1868 x505
KENTUCKY
Dallas
(214) 238-7500
Houston
(713) 895-8533
CC Electro Sales
(317) 921-5000
ARKANSAS
Southern States Marketing
(214) 238-7500
Munich, Germany
+49-894488496
Puteam International
+886-2-729-0373
LOUISIANA
Southern States Marketing
Athismons, France
+33-1-69387678
Representatives, distributors, and sales offices
CALIFORNIA
NYC
UTAH
Charles Fields & Assoc.
(801) 299-8228
North
Brooks Technical
(415) 960-3880
ERA Associates
(516) 543-0510
North
DISTRIBUTORS
All American
HQ: (305) 621-8282
interACTIVE
(214) 238-7500
Great Britain, Ireland
+44-1773-740263
Upstate
Tri-Tech
South
LA Area
Competitive Tech.
(714) 450-0170
VERMONT
Kitchen & Kutchin
(617) 229-2660
(713) 895-8533
Axis: Components, Inc.
HQ: (800) 556-0225
Rochester
Ramtec Int’l B.V.
(716) 385-6500
MAINE
San Diego
ATS
(619) 634-1488
Holland, Spain, Italy,
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Chesapeake Tech.
(301) 236-0530
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HQ: (514) 594-7710
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(301) 236-0530
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Technology Sales
(303) 692-8835
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MASSACHUSETTS
Kitchen & Kutchin
(617) 229-2660
WEST VIRGINIA
Chesapeake Tech.
(301) 236-0530
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(408) 954-1866
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Electro Tech
(610) 272-2125
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+81-3-5421-1730
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(813) 393-5011
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(314) 291-4230
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TECHNICAL CENTER
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Concord Component
(770) 416-9597
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(415) 960-3880
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(613) 592-9540
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Exer Technologies
+60-4-657-9592
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Concord Component
(919) 846-3441
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(312) 794-9100
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(415) 960-3880
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(604) 473-4666
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(617) 229-2660
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+65-749-1349
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CC Electro Sales
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Alliance Semiconductor reserves the right to make changes in this data sheet at any time to improve design and supply the best product possible. Publication of advance information does not constitute a
committment to produce or supply the product described. The company cannot assume responsibility for circuits shown or represent that they are free from patent infringement. Alliance products are not
authorized for use as critical components in life support devices or systems without the express written approval of the president of Alliance. ProMotion® and the Alliance logo are registered trademarks
of Alliance Semiconductor Corporation. All other trademarks are property of their respective holders.
ALLIANCE SEMICONDUCTOR
3099 North First Street San Jose, CA 95134 Tel (408) 383-4900 Fax (408) 383-4999 www.alsc.com
Printed in U.S.A.
Copyright © 1996 All rights reserved.
June 1996
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