AS7C34096-20TI [ALSC]
5V/3.3V 512K X8 CMOS SRAM; 5V / 3.3V 512K X8 CMOS SRAM
| 型号： | AS7C34096-20TI |
| 厂家： | 
ALLIANCE SEMICONDUCTOR CORPORATION |
| 描述： | 5V/3.3V 512K X8 CMOS SRAM |
| 文件： | 总9页 (文件大小：247K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
January 2005
AS7C4096
AS7C34096
®
5V/3.3V 512K × 8 CMOS SRAM
Features
• AS7C4096 (5V version)
• Low power consumption: STANDBY
- 110 mW (AS7C4096) / max CMOS
- 72 mW (AS7C34096) / max CMOS
• Equal access and cycle times
• AS7C34096 (3.3V version)
• Industrial and commercial temperature
• Organization: 524,288 words × 8 bits
• Center power and ground pins
• High speed
- 10/12/15/20 ns address access time
- 5/6/7/8 ns output enable access time
• Low power consumption: ACTIVE
- 1375 mW (AS7C4096) / max @ 12 ns
- 576 mW (AS7C34096) / max @ 10 ns
• Easy memory expansion with CE
• TTL-compatible, three-state I/O
• JEDEC standard packages
- 400 mil 36-pin SOJ
, OE inputs
- 44-pin TSOP 2
• ESD protection ≥ 2000 volts
• Latch-up current ≥ 100 mA
Logic block diagram
Pin arrangements
VCC
36-pin SOJ (400 mil)
44-pin TSOP 2
GND
Input buffer
NC
NC
A0
A1
A2
A3
A4
CE
NC
NC
NC
A18
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A0
A1
A2
A3
A4
CE
1
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
NC
2
2
A18
A17
A16
A15
OE
3
A0
A1
A2
3
4
4
I/O1
I/O8
A17
A16
A15
OE
5
5
6
524,288 × 8
A3
6
7
I/O1
I/O2
VCC
7
I/O8
A4
8
Array
(4,194,304)
8
I/O7
GND
VCC
I/O1
I/O2
VCC
I/O8
I/O7
9
A5
9
10
11
12
13
14
15
16
17
18
19
20
21
22
A6
A7
A8
A9
GND
I/O3
I/O4
WE
A5
10
11
12
13
14
15
16
17
18
GND
I/O6
I/O5
A14
A13
A12
A11
A10
NC
VCC
GND
I/O3
I/O4
WE
A5
I/O6
I/O5
A14
A13
A12
A11
A10
NC
A6
Column decoder
WE
OE
CE
A7
A6
Control
Circuit
A8
A7
A9
A8
A9
NC
NC
NC
NC
Selection guide
–10
10
5
–12
12
–15
15
–20
Unit
ns
Maximum address access time
20
8
Maximum outputenable access time
6
7
ns
AS7C4096
AS7C34096
AS7C4096
AS7C34096
–
250
130
20
220
110
20
180
100
20
mA
mA
mA
mA
Maximum operating current
160
–
Maximum CMOS standby current
20
20
20
20
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Alliance Semiconductor
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Copyright © Alliance Semiconductor. All rights reserved.
AS7C4096
AS7C34096
®
Functional description
The AS7C4096 and AS7C34096 are high-performance CMOS 4,194,304-bit Static Random Access Memory (SRAM) devices
organized as 524,288 words × 8 bits. They are designed for memory applications where fast data access, low power, and simple
interfacing are desired.
Equal address access and cycle times (t , t , t ) of 10/12/15/20 ns with output enable access times (t ) of 5/6/7/8 ns are
AA RC WC
OE
ideal for high-performance applications. The chip enable input CE permits easy memory expansion with multiple-bank
memory systems.
When CE is high the device enters standby mode. The AS7C4096/AS7C34096 is guaranteed not to exceed 110/72 mW power
consumption in CMOS standby mode.
A write cycle is accomplished by asserting write enable (WE) and chip enable (CE). Data on the input pins I/O1–I/O8 is
written on the rising edge of WE (write cycle 1) or CE (write cycle 2). To avoid bus contention, external devices should drive I/
O pins only after outputs have been disabled with output enable (OE) or write enable (WE).
A read cycle is accomplished by asserting output enable (OE) and chip enable (CE), with write enable (WE) high. The chip
drives I/O pins with the data word referenced by the input address. When either chip enable or output enable is inactive, or
write enable is active, output drivers stay in high-impedance mode.
All chip inputs and outputs are TTL-compatible, and operation is from either a single 5V(AS7C4096) or 3.3V(AS7C34096)
supply. Both devices are available in the JEDEC standard 400-mil 36-pin SOJ and 44-pin TSOP 2 packages.
Absolute maximum ratings
Parameter
Device
Symbol
Min
–1
Max
+7.0
+5.0
Unit
V
AS7C4096
AS7C34096
V
V
V
t1
t1
t2
D
Voltage on V relative to GND
CC
–0.5
–0.5
–
V
Voltage on any pin relative to GND
Power dissipation
V
+0.5
V
CC
P
T
1.0
W
Storage temperature
–65
–55
–
+150
+125
20
°C
°C
mA
stg
bias
Temperature with V applied
T
CC
DC current unto output (low)
I
OUT
NOTE: Stresses greater than those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only and func-
tional operation of the device at these or any other conditions outside those indicated in the operational sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect reliability.
Truth table
CE
H
L
WE
X
OE
X
Data
Mode
Standby (I , I
High Z
High Z
)
SB SB1
H
H
Output disable (I
)
CC
L
H
L
D
Read (I
)
CC
OUT
L
L
X
D
Write (I
)
IN
CC
Key: X = Don’t care, L = Low, H = High
1/13/05; v.1.9
Alliance Semiconductor
P. 2 of 9
AS7C4096
AS7C34096
®
Recommended operating condition
Parameter
Device
Symbol
Min
4.5
3.15
3.0
2.2
2.0
–0.5
0
Nominal
Max
5.5
Unit
V
AS7C4096
AS7C34096
AS7C34096
AS7C4096
AS7C34096
V
V
(12/15/20)
5.0
3.30
3.3
–
CC
Supply voltage
V
(10)
3.6
V
CC
(12/15/20)
3.6
V
CC
V
V
V
V
+ 0.5
V
IH
CC
Input voltage
–
+ 0.5
V
IH
1
CC
V
–
0.8
V
IL
commercial
industrial
T
–
70
85
°C
°C
Ambient operating
temperature
A
T
–40
–
A
1 VIL min = –1.0V for pulse width less than 5ns.
DC operating characteristics (over the operating range)1
–10
–12
–15
–20
Parameter Symbol
Test conditions
Device
Min Max Min Max Min Max Min Max Unit
AS7C4096/
Input leakage
|I |
V
= Max, V = GND to V
–
–
1
1
–
–
1
1
–
–
1
1
–
–
1
1
µA
µA
LI
CC
IN
CC
current
AS7C34096
AS7C4096/
AS7C34096
AS7C4096
Output
leakage
current
V
= Max, CE = V
IH
CC
|I
|
LO
CC
V
= GND to V
OUT
CC
Operating
power supply
current
–
–
–
–
–
250
130
–
–
220
110
–
–
180 mA
100
V
= Max, CE < V
IL
CC
I
f = f , I
= 0mA
AS7C34096
160
Max OUT
AS7C4096
AS7C34096
AS7C4096
–
–
–
–
60
–
–
–
–
60
60
20
–
–
–
60
60
20
–
–
–
60
V
= Max, CE = V
IH
CC
I
mA
60
SB
f = f , I
= 0mA
Standby
power supply
current
Max OUT
V
= Max,
20
CC
I
CE ≥ V – 0.2V, V ≤ 0.2V or V
mA
SB1
CC
IN
IN
AS7C34096
–
20
–
20
–
20
–
20
≥ V – 0.2V, f = 0
CC
V
V
I
= 8 mA, V = Min
AS7C4096/
AS7C34096
–
0.4
–
–
0.4
–
–
0.4
–
–
0.4
–
V
V
Output
voltage
OL
OL
CC
I
= –4 mA, V = Min
2.4
2.4
2.4
2.4
OH
OH
CC
Capacitance (f = 1MHz, T = 25° C, V = NOMINAL)2
A
CC
Parameter
Input capacitance
I/O capacitance
Symbol
Signals
Test conditions
= 0V
Max
Unit
C
A, CE, WE, OE
I/O
V
5
7
pF
pF
IN
IN
C
V
= V
= 0V
OUT
I/O
IN
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Alliance Semiconductor
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AS7C4096
AS7C34096
®
Read cycle (over the operating range)3,9
–10
–12
–15
–20
Symbo
l
Parameter
Read cycle time
Min
10
–
Max
–
Min
12
–
Max
–
Min
15
–
Max
–
Min
20
–
Max Unit Notes
t
–
20
20
8
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
RC
AA
Address access time
t
10
10
5
12
12
6
15
15
7
3
3
Chip enable (CE) access time
Output enable (OE) access time
Output hold from address change
CE Low to output in low Z
CE High to output in high Z
OE Low to output in low Z
OE High to output in high Z
Power up time
t
–
–
–
–
ACE
t
–
–
–
–
OE
OH
t
3
–
3
–
3
–
3
–
5
t
3
–
3
–
0
–
0
–
4, 5
4, 5
4, 5
4, 5
4, 5
4, 5
CLZ
t
–
5
–
6
–
7
–
9
CHZ
t
0
–
0
–
0
–
0
–
OLZ
OHZ
t
–
5
–
6
–
7
–
9
t
t
0
–
0
–
0
–
0
–
PU
PD
Power down time
–
10
–
12
–
15
–
20
Key to switching waveforms
Rising input
Falling input
Undefined/don’t care
Read waveform 1 (address controlled)3,6,7,9
tRC
Address
tAA
tOH
DOUT
Data valid
Read waveform 2 (CE, OE controlled)3,6,8,9
tRC1
CE
tOE
OE
tOLZ
tOHZ
tCHZ
tACE
DOUT
Data valid
tCLZ
tPD
50%
ICC
ISB
tPU
Supply
current
50%
1/13/05; v.1.9
Alliance Semiconductor
P. 4 of 9
AS7C4096
AS7C34096
®
Write cycle (over the operating range)11
–10
–12
–15
–20
Parameter
Write cycle time
Symbol Min
Max
–
Min
12
8
Max
–
Min
15
10
10
0
Max
–
Min
20
12
12
0
Max Unit Notes
t
t
t
10
7
–
–
–
–
–
–
–
–
–
–
9
–
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
WC
CW
AW
Chip enable (CE) to write end
Address setup to write end
Address setup time
–
–
–
7
–
8
–
–
t
0
–
0
–
–
AS
Write pulse width (OE = high)
Write pulse width (OE = low
Address hold from end of write
Write recovery time
t
t
7
–
8
–
10
15
0
–
12
20
0
WP1
WP2
10
0
–
12
0
–
–
t
–
–
–
AH
WR
DW
t
0
–
0
–
0
–
0
Data valid to write end
t
5
–
6
–
7
–
9
Data hold time
t
0
–
0
–
0
–
0
4, 5
4, 5
4, 5
DH
WZ
OW
Write enable to output in high Z
Output active from write end
t
0
5
0
6
0
7
0
t
3
–
3
–
3
–
3
Write waveform 1 (WE controlled)10,11
tWC
tAW
tWR
tAH
Address
tWP
WE
tAS
tDW
Data valid
tDH
DIN
tWZ
tOW
DOUT
Write waveform 2 (CE controlled)10,11
tWC
tWR
tAH
tAW
Address
tAS
tCW
CE
tWP
WE
tWZ
tDW
tDH
DIN
Data valid
DOUT
1/13/05; v.1.9
Alliance Semiconductor
P. 5 of 9
AS7C4096
AS7C34096
®
AC test conditions
- Output load: see Figure B or Figure C.
Thevenin equivalent:
168Ω
- Input pulse level: GND to 3.0V. See Figures A, B, and C.
- Input rise and fall times: 2 ns. See Figure A.
- Input and output timing reference levels: 1.5V.
DOUT
+1.728V
+3.3V
+5V
480
Ω
320
Ω
+3.0V
GND
DOUT
255
DOUT
350Ω
90%
10%
90%
10%
Ω
C13
C13
2 ns
Figure A: Input pulse
GND
GND
Figure C: 3.3V Output load
Figure B: 5V Output load
Notes
1
2
3
4
5
6
7
8
9
During VCC power-up, a pull-up resistor to VCC on CE is required to meet ISB specification.
This parameter is sampled, but not 100% tested.
For test conditions, see AC Test Conditions.
t
CLZ and tCHZ are specified with CL = 5pF as in Figure C. Transition is measured ±500 mV from steady-state voltage.
This parameter is guaranteed, but not tested.
WE is HIGH for read cycle.
CE and OE are LOW for read cycle.
Address valid prior to or coincident with CE transition Low.
All read cycle timings are referenced from the last valid address to the first transitioning address.
10 CE or WE must be HIGH during address transitions. Either CE or WE asserting high terminates a write cycle.
11 All write cycle timings are referenced from the last valid address to the first transitioning address.
12 Not applicable.
13 C = 30pF, except at high Z and low Z parameters, where C = 5pF.
1/13/05; v.1.9
Alliance Semiconductor
P. 6 of 9
AS7C4096
AS7C34096
®
Typical DC and AC characteristics 12
Normalized supply current ICC, ISB
vs. supply voltage VCC
Normalized supply current ICC, ISB
vs. ambient temperature Ta
Normalized supply current ISB1
vs. ambient temperature Ta
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
625
25
ICC
ICC
VCC = VCC(NOMINAL)
5
1
ISB
ISB
0.2
0.04
MIN
NOMINAL
–55
–10
35
80
125
125
VCC
–55
–10
Ambient temperature (
Normalized supply current ICC
35
80
MAX
125
Supply voltage (V)
Ambient temperature (
°
C)
°C)
Normalized access time tAA
vs. supply voltage VCC
Normalized access time tAA
vs. ambient temperature Ta
vs. cycle frequency 1/tRC, 1/tWC
VCC = VCC(NOMINAL)
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
VCC = VCC(NOMINAL)
Ta = 25° C
Ta = 25° C
MIN
NOMINAL
–55
–10
35
80
0
25
Cycle frequency (MHz)
Typical access time change ∆
50
75
MAX
100
Supply voltage (V)
Ambient temperature (°C)
Output source current IOH
vs. output voltage VOH
Output sink current IOL
vs. output voltage VOL
tAA
vs. output capacitive loading
140
120
100
80
140
120
100
80
35
30
25
20
15
10
5
VCC = VCC(NOMINAL)
VCC = VCC(NOMINAL)
VCC = VCC(NOMINAL)
Ta = 25
°
C
Ta = 25° C
60
60
40
40
20
20
0
0
0
0
0
0
250
500
750
1000
VCC
Output voltage (V)
Output voltage (V)
Capacitance (pF)
1/13/05; v.1.9
Alliance Semiconductor
P. 7 of 9
AS7C4096
AS7C34096
®
Package dimensions
c
44 434241403938373635343332313029282726252423
44-pin TSOP 2
Min (mm) Max (mm)
A
1.2
He
e
44-pin TSOP 2
A
0.05
0.95
0.15
1.05
1
A
2
b
c
0.30
0.45
1 2 3 4 5 6 7 8 9 101112131415161718 19202122
d
0.21
0.12
d
18.31
10.06
11.68
18.52
10.26
11.94
e
H
l
A2
e
A
0–5°
E
l
0.80 (typical)
A1
0.40
0.60
E
b
36-pin SOJ 400
Min(mm)
Max(mm)
0.148
–
A
.128
0.025
0.105
0.015
0.026
0.007
.920
A
A
1
0.115
0.020
0.032
0.013
.930
2
D
e
b
b
b
1
E1E2
A
36-pin SOJ
c
D
A1
Seating
Plane
b1
e
0.045
0.395
0.435
0.055
0.405
Pin 1
c
E1
E2
E
A2
0.445
0.370 BSC
E
1/13/05; v.1.9
Alliance Semiconductor
P. 8 of 9
AS7C4096
AS7C34096
®
Ordering codes
Package
Version
10 ns
12 ns
15 ns
20 ns
5V commercial
5V industrial
NA
AS7C4096-12JC
AS7C4096-12JI
AS7C34096-12JC
AS7C34096-12JI
AS7C4096-12TC
AS7C4096-12TI
AS7C34096-12TC
AS7C34096-12TI
AS7C4096-15JC
AS7C4096-15JI
AS7C34096-15JC
AS7C34096-15JI
AS7C4096-15TC
AS7C4096-15TI
AS7C34096-15TC
AS7C34096-15TI
AS7C4096-20JC
AS7C4096-20JI
AS7C34096-20JC
AS7C34096-20JI
AS7C4096-20TC
AS7C4096-20TI
AS7C34096-20TC
AS7C34096-20TI
NA
SOJ
3.3V commercial
3.3V industrial
5V commercial
5V industrial
AS7C34096-10JC
NA
NA
NA
AS7C34096-10TC
NA
TSOP 2
Note:
3.3V commercial
3.3V industrial
Add suffix “N” to the above part number for lead free devices, Ex. AS7C4096-12JCN
Part numbering system
AS7C
X
4096
–XX
J or T
X
N
Voltage:
Packages:
Temperature ranges:
Device Access
number time
SRAM prefix Blank: 5V CMOS
3: 3.3V CMOS
J: SOJ 400 mil C: Commercial, 0°C to 70°C Lead free device
T: TSOP 2 I: Industrial, –40°C to 85°C
1/13/05; v.1.9
Alliance Semiconductor
P. 9 of 9
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marks of their respective companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may appear in this document.
The data contained herein represents Alliance’s best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time, without notice. If the product described herein is under
development, significant changes to these specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and users, and is not intended to operate
as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or
implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual property rights, except as
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for use as critical components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting sys-
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Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 202
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VISHAY
SI9130CG-T1-E3
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SI9130LG-T1-E3
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SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 202
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SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 202
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VISHAY
SI9137DB
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VISHAY
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