概述
数据手册ASM3P2762AG-08TR 概述
Low Power Peak EMI Reducing Solution 低功耗峰值EMI降低解决方案
ASM3P2762AG-08TR 数据手册
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PDF下载September 2005
rev 1.6
ASM3P2762A
Low Power Peak EMI Reducing Solution
Features
The ASM3P2762A uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented by using a proprietary all digital method.
Generates an EMI optimized clock signal at the
output.
Integrated loop filter components.
Operates with a 3.3V /2.5V Supply.
Operating current less than 6mA.
Low power CMOS design.
Input frequency range: 6MHz to 12MHz for 2.5V
: 6MHz to 13MHz for 3.3V
Generates a 1X low EMI spread spectrum clock of
the input frequency.
Frequency deviation: -1.25% (Typ) @ 10MHz Input
Frequency
The ASM3P2762A modulates the output of a single PLL
in order to “spread” the bandwidth of a synthesized clock,
and more importantly, decreases the peak amplitudes of
its harmonics. This results in significantly lower system
EMI compared to the typical narrow band signal produced
by oscillators and most frequency generators. Lowering
EMI by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
Applications
Available in 6-pin TSOT-23, 8-pin SOIC and 8-pin
TSSOP packages.
The ASM3P2762A is targeted towards all portable
devices with very low power requirements like MP3
players and digital still cameras.
Product Description
The ASM3P2762A is
a versatile spread spectrum
Key Specifications
frequency modulator designed specifically for a wide
range of clock frequencies. The ASM3P2762A reduces
electromagnetic interference (EMI) at the clock source,
allowing system wide reduction of EMI of all clock
dependent signals. The ASM3P2762A allows significant
system cost savings by reducing the number of circuit
board layers ferrite beads, shielding that are traditionally
required to pass EMI regulations.
Description
Supply voltages
Cycle-to-Cycle Jitter
Output Duty Cycle
Modulation Rate Equation
Frequency Deviation
Specification
VDD = 3.3V /2.5V
200pS (Max)
45/55%
FIN/256
-1.25% (Typ) @ 10MHz
VDD
Block Diagram
PD
PLL
Modulation
XIN
Crystal
Frequency
Output
Phase
Loop
XOUT
VCO
Feedback
ModOUT
VSS
Alliance Semiconductor
2575 Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.
September 2005
ASM3P2762A
rev 1.6
Pin Configuration (6-pin TSOT-23 Package)
1
2
3
6
5
4
VSS
PD
XOUT
ASM3P2762A
ModOUT
VDD
XIN/CLKIN
Pin Description
Pin# Pin Name Type
Description
Power-down control pin. Pull low to enable power-down mode. Connect to VDD if not
1
2
3
I
O
I
PD
XOUT
used.
Crystal connection. If using an external reference, this pin must be left unconnected.
Crystal connection or external reference frequency input. This pin has dual functions. It
can be connected either to an external crystal or an external reference clock.
XIN/CLKIN
4
5
6
VDD
ModOUT
VSS
P
O
P
Power supply for the entire chip
Spread spectrum clock output.
Ground connection.
Low Power Peak EMI Reducing Solution
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Notice: The information in this document is subject to change without notice.
September 2005
ASM3P2762A
rev 1.6
Pin Configuration (8-pin SOIC and TSSOP Packages)
VDD
1
2
3
4
XIN/CLKIN
XOUT
8
7
6
5
NC
ASM3P2762A
ModOUT
VSS
PD
NC
Pin Description
Pin# Pin Name Type
Description
Crystal connection or external reference frequency input. This pin has dual functions. It
1
2
3
XIN/CLKIN
XOUT
I
O
I
can be connected either to an external crystal or an external reference clock.
Crystal connection. If using an external reference, this pin must be left unconnected.
Power-down control pin. Pull low to enable power-down mode. Connect to VDD if not
PD
NC
used.
No connect.
4
5
6
7
8
-
P
O
-
VSS
ModOUT
NC
Ground connection.
Spread spectrum clock output.
No connect.
VDD
P
Power supply for the entire chip
Modulation Profile
Specifications
Description
Specification
6MHz < CLKIN < 12MHz
6MHz < CLKIN < 13MHz
For 2.5V Supply
For 3.3V Supply
Frequency Range
Modulation Equation
FIN/256
Frequency Deviation
-1.25% (Typ) @10MHz
Low Power Peak EMI Reducing Solution
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Notice: The information in this document is subject to change without notice.
September 2005
rev 1.6
ASM3P2762A
Absolute Maximum Ratings
Symbol
Parameter
Rating
-0.5 to +7.0
-65 to +125
0 to 70
Unit
V
°C
°C
°C
°C
Voltage on any pin with respect to Ground
VDD, VIN
TSTG
TA
Storage temperature
Operating temperature
Max. Soldering Temperature (10 sec)
Junction Temperature
Ts
TJ
260
150
Static Discharge Voltage
TDV
2
KV
(As per JEDEC STD 22- A114-B)
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
DC Electrical Characteristics for 2.5V Supply
(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated)
Symbol
VIL
Parameter
Min
VSS - 0.3
Typ
-
-
-
Max
0.8
VDD + 0.3
Unit
V
V
µA
µA
mA
mA
V
Input low voltage
Input high voltage
Input low current
Input high current
VIH
IIL
IIH
2.0
-
-
-
-
-
1.8
-
-
2.375
-
-
-35
35
-
-
0.6
-
10
-
-
IXOL
IXOH
VOL
VOH
IDD
ICC
VDD
tON
XOUT output low current (@0.5V, VDD=2.5V)
XOUT output high current (@1.8V, VDD=2.5V)
Output low voltage (VDD = 2.5V, IOL = 8mA)
Output high voltage (VDD = 2.5V, IOH = 8mA)
Static supply current*
Dynamic supply current (2.5V, 10MHz and no load)
Operating voltage
Power-up time (first locked cycle after power-up)**
Output impedance
3
3
-
-
-
2
2.5
-
V
uA
mA
V
mS
Ω
2.625
5
-
ZOUT
50
* PD pin is pulled low
** VDD and XIN/CLKIN input are stable, PD pin is made high from low.
AC Electrical Characteristics for 2.5V Supply
Symbol
Parameter
Min
6
Typ
-
Max
12
Unit
MHz
CLKIN
Input frequency
ModOUT
Output frequency
6
-
12
MHz
Input Frequency = 6MHz
Input Frequency = 12MHz
-
-
-1.75
- 0.95
-
-
fd
Frequency Deviation
%
tLH*
tHL*
tJC
Output rise time (measured from 0.7V to 1.7V)
Output fall time (measured from 1.7V to 0.7V)
Jitter (cycle to cycle)
0.7
0.5
-
1.1
0.8
-
1.4
1.0
200
55
nS
nS
pS
%
tD
Output duty cycle
45
50
* tLH and tHL are measured into a capacitive load of 15pF
Low Power Peak EMI Reducing Solution
4 of 12
Notice: The information in this document is subject to change without notice.
September 2005
rev 1.6
ASM3P2762A
DC Electrical Characteristics for 3.3V Supply
(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated)
Symbol
VIL
Parameter
Min
VSS - 0.3
Typ
-
-
-
Max
0.8
VDD + 0.3
Unit
V
V
µA
µA
mA
mA
V
Input low voltage
Input high voltage
Input low current
Input high current
VIH
IIL
IIH
2.0
-
-
-
-
-
2.5
-
-
2.7
-
-
-35
35
-
-
IXOL
IXOH
VOL
VOH
IDD
ICC
VDD
tON
XOUT output low current (@0.4V, VDD=3.3V)
XOUT output high current (@2.5V, VDD=3.3V)
Output low voltage (VDD = 3.3V, IOL = 8mA)
Output high voltage (VDD = 3.3V, IOH = 8mA)
Static supply current*
Dynamic supply current (3.3V, 10MHz and no load)
Operating voltage
Power-up time (first locked cycle after power-up)**
Output impedance
3
3
-
-
-
3
3.3
-
-
0.4
-
10
-
3.6
5
-
V
uA
mA
V
mS
Ω
ZOUT
45
* PD pin is pulled low
** VDD and XIN/CLKIN input are stable, PD pin is made high from low.
AC Electrical Characteristics for 3.3V Supply
Symbol
CLKIN
Parameter
Min
6
Typ
-
Max
13
Unit
MHz
MHz
Input frequency
ModOUT
Output frequency
6
-
13
Input Frequency = 6MHz
Input Frequency = 13MHz
-
-
-1.75
-0.9
-
-
fd
Frequency Deviation
%
tLH*
Output rise time (measured from 0.8 to 2.0V)
Output fall time (measured at 2.0V to 0.8V)
Jitter (cycle to cycle)
0.5
0.4
-
1.0
0.9
-
1.4
1.2
200
55
nS
nS
pS
%
tHL
tJC
tD
*
Output duty cycle
45
50
*tLH and tHL are measured into a capacitive load of 15pF
Low Power Peak EMI Reducing Solution
5 of 12
Notice: The information in this document is subject to change without notice.
September 2005
rev 1.6
ASM3P2762A
Typical Crystal Oscillator Circuit
R1 = 510Ω
Crystal
C1 = 27 pF
C2 = 27 pF
Typical Crystal Specifications
Fundamental AT cut parallel resonant crystal
Nominal frequency
8.000MHz
Frequency tolerance
Operating temperature range
Storage temperature
± 50 ppm or better at 25°C
-25°C to +85°C
-40°C to +85°C
18pF
Load capacitance
Shunt capacitance
ESR
7pF maximum
25Ω
Low Power Peak EMI Reducing Solution
6 of 12
Notice: The information in this document is subject to change without notice.
September 2005
ASM3P2762A
rev 1.6
Package Information
6-pin TSOT-23 Package
Dimensions
Symbol
Inches
Millimeters
Min
Max
Min
Max
A
A1
A2
b
0.04
1.00
0.10
0.90
0.50
0.00
0.033
0.012
0.004
0.036
0.02
0.00
0.84
0.30
H
D
B
0.005 BSC
0.114 BSC
0.06 BSC
0.127 BSC
2.90 BSC
1.60 BSC
0.950 BSC
2.80 BSC
e
0.0374 BSC
0.11 BSC
C
L
0.0118
0°
0.02
4°
0.30
0°
0.50
4°
θ
Low Power Peak EMI Reducing Solution
7 of 12
Notice: The information in this document is subject to change without notice.
September 2005
rev 1.6
ASM3P2762A
8-Pin SOIC Package
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions
Symbol
Inches
Millimeters
Min
Max
0.010
0.069
0.059
0.020
0.010
Min
0.10
1.35
1.25
0.31
0.18
Max
0.25
1.75
1.50
0.51
0.25
A1
A
0.004
0.053
0.049
0.012
0.007
A2
B
C
D
E
0.193 BSC
0.154 BSC
0.050 BSC
0.236 BSC
4.90 BSC
3.91 BSC
1.27 BSC
6.00 BSC
e
H
L
0.016
0°
0.050
8°
0.41
0°
1.27
8°
θ
Low Power Peak EMI Reducing Solution
8 of 12
Notice: The information in this document is subject to change without notice.
September 2005
rev 1.6
ASM3P2762A
8-Pin TSSOP Package
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions
Inches
Symbol
Millimeters
Min
Max
Min
Max
A
A1
A2
B
0.043
1.10
0.15
0.95
0.30
0.20
3.10
4.50
0.002
0.033
0.008
0.004
0.114
0.169
0.006
0.037
0.012
0.008
0.122
0.177
0.05
0.85
0.19
0.09
2.90
4.30
c
D
E
e
0.026 BSC
0.252 BSC
0.65 BSC
6.40 BSC
H
L
0.020
0°
0.028
8°
0.50
0°
0.70
8°
θ
Low Power Peak EMI Reducing Solution
9 of 12
Notice: The information in this document is subject to change without notice.
September 2005
ASM3P2762A
rev 1.6
Ordering Information
Part Number
ASM3P2762AF-06OR
ASM3P2762AF-08TT
ASM3P2762AF-08TR
ASM3P2762AF-08ST
ASM3P2762AF-08SR
ASM3P2762AG-06OR
ASM3P2762AG-08TT
ASM3P2762AG-08TR
ASM3P2762AG-08ST
ASM3P2762AG-08SR
ASM3P2762A-06OR
ASM3P2762A-08TT
ASM3P2762A-08TR
ASM3P2762A-08ST
ASM3P2762A-08SR
ASM3I2762AF-06OR
ASM3I2762AF-08TT
ASM3I2762AF-08TR
ASM3I2762AF-08ST
ASM3I2762AF-08SR
ASM3I2762AG-06OR
ASM3I2762AG-08TT
ASM3I2762AG-08TR
ASM3I2762AG-08ST
ASM3I2762AG-08SR
ASM3I2762A-06OR
ASM3I2762A-08TT
ASM3I2762A-08TR
ASM3I2762A-08ST
ASM3I2762A-08SR
Marking
I4LL
Package Type
6-Pin TSOT-23, TAPE & REEL, Pb Free
8-Pin TSSOP, TUBE, Pb Free
8-Pin TSSOP, TAPE & REEL, Pb Free
8-Pin SOIC, TUBE, Pb Free
8-Pin SOIC, TAPE & REEL, Pb Free
6-Pin TSOT-23, TAPE & REEL, Green
8-Pin TSSOP, TUBE, Green
8-Pin TSSOP, TAPE & REEL, Green
8-Pin SOIC, TUBE, Green
8-Pin SOIC, TAPE & REEL, Green
6-Pin TSOT-23, TAPE & REEL
8-Pin TSSOP, TUBE
8-Pin TSSOP, TAPE & REEL
8-Pin SOIC, TUBE
Temperature
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Commercial
Industrial
3P2762AF
3P2762AF
3P2762AF
3P2762AF
I3LL
3P2762AG
3P2762AG
3P2762AG
3P2762AG
I1LL
3P2762A
3P2762A
3P2762A
3P2762A
I5LL
3I2762AF
3I2762AF
3I2762AF
3I2762AF
I6LL
3I2762AG
3I2762AG
3I2762AG
3I2762AG
I2LL
3I2762A
3I2762A
3I2762A
3I2762A
8-Pin SOIC, TAPE & REEL
6-Pin TSOT-23, TAPE & REEL, Pb Free
8-Pin TSSOP, TUBE, Pb Free
8-Pin TSSOP, TAPE & REEL, Pb Free
8-Pin SOIC, TUBE, Pb Free
8-Pin SOIC, TAPE & REEL, Pb Free
6-Pin TSOT-23, TAPE & REEL, Green
8-Pin TSSOP, TUBE, Green
8-Pin TSSOP, TAPE & REEL, Green
8-Pin SOIC, TUBE, Green
8-Pin SOIC, TAPE & REEL, Green
6-Pin TSOT-23, TAPE & REEL
8-Pin TSSOP, TUBE
8-Pin TSSOP, TAPE & REEL
8-Pin SOIC, TUBE
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
Industrial
8-Pin SOIC, TAPE & REEL
Low Power Peak EMI Reducing Solution
10 of 12
Notice: The information in this document is subject to change without notice.
September 2005
ASM3P2762A
rev 1.6
Device Ordering Information
A S M 3 P 2 7 6 2 A F - 0 8 T R
R = Tape & reel, T = Tube or Tray
O = SOT
U = MSOP
E = TQFP
L = LQFP
U = MSOP
P = PDIP
S = SOIC
T = TSSOP
A = SSOP
V = TVSOP
B = BGA
D = QSOP
DEVICE PIN COUNT
F = LEAD FREE AND RoHS COMPLIANT PART
G = GREEN PACKAGE
PART NUMBER
X= Automotive
I= Industrial
P or n/c = Commercial
(0C to +70C)
(-40C to +125C) (-40C to +85C)
1 = Reserved
6 = Power Management
7 = Power Management
8 = Power Management
9 = Hi Performance
0 = Reserved
2 = Non PLL based
3 = EMI Reduction
4 = DDR support products
5 = STD Zero Delay Buffer
ALLIANCE SEMICONDUCTOR MIXED SIGNAL PRODUCT
Licensed under U.S Patent Nos 5,488,627 and 5,631,921
Low Power Peak EMI Reducing Solution
11 of 12
Notice: The information in this document is subject to change without notice.
September 2005
rev 1.6
ASM3P2762A
Copyright © Alliance Semiconductor
Alliance Semiconductor Corporation
2575 Augustine Drive,
Santa Clara, CA 95054
Tel# 408-855-4900
All Rights Reserved
Preliminary Information
Part Number: ASM3P2762A
Document Version: v1.6
Fax: 408-855-4999
www.alsc.com
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are
trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective
companies. Alliance reserves the right to make changes to this document and its products at any time without notice. Alliance
assumes no responsibility for any errors that may appear in this document. The data contained herein represents Alliance's
best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this data at any time,
without notice. If the product described herein is under development, significant changes to these specifications are possible.
The information in this product data sheet is intended to be general descriptive information for potential customers and users,
and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume
any responsibility or liability arising out of the application or use of any product described herein, and disclaims any express or
implied warranties related to the sale and/or use of Alliance products including liability or warranties related to fitness for a
particular purpose, merchantability, or infringement of any intellectual property rights, except as express agreed to in Alliance's
Terms and Conditions of Sale (which are available from Alliance). All sales of Alliance products are made exclusively
according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not convey a license under
any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third
parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction
or failure may reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such
life-supporting systems implies that the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all
claims arising from such use.
Low Power Peak EMI Reducing Solution
12 of 12
Notice: The information in this document is subject to change without notice.
ASM3P2762AG-08TR 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| ASM3P2762AG-08TT | ALSC | Low Power Peak EMI Reducing Solution | 获取价格 |
|
| ASM3P2762AG-08TT | PULSECORE | Low Power Peak EMI Reducing Solution | 获取价格 |
|
| ASM3P2769A | ALSC | Low Power Peak EMI Reducing Solution | 获取价格 |
|
| ASM3P2769A | PULSECORE | Low Power Peak EMI Reducing Solution | 获取价格 |
|
| ASM3P2769A-06OR | ALSC | Low Power Peak EMI Reducing Solution | 获取价格 |
|
| ASM3P2769A-06OR | PULSECORE | Clock Generator, 13MHz, CMOS, PDSO6, TSOT-23, 6 PIN | 获取价格 |
|
| ASM3P2769A-08SR | ALSC | Low Power Peak EMI Reducing Solution | 获取价格 |
|
| ASM3P2769A-08SR | PULSECORE | 13MHz, OTHER CLOCK GENERATOR, PDSO8, SOIC-8 | 获取价格 |
|
| ASM3P2769A-08ST | ALSC | Low Power Peak EMI Reducing Solution | 获取价格 |
|
| ASM3P2769A-08ST | PULSECORE | Clock Generator, 13MHz, CMOS, PDSO8, SOIC-8 | 获取价格 |
|
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