ASM708REPA [ALSC]
3/3.3/4.0 V uP Supervisor Circuits; 3 / 3.3 / 4.0 V高达监控电路
| 型号： | ASM708REPA |
| 厂家： | 
ALLIANCE SEMICONDUCTOR CORPORATION |
| 描述： | 3/3.3/4.0 V uP Supervisor Circuits |
| 文件： | 总16页 (文件大小：274K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
3/3.3/4.0 V µP Supervisor Circuits
Features
General Description
The ASM706P/R/S/T/J and ASM708R/S/T/J are cost effective
CMOS supervisor circuits that monitor power-supply and
battery voltage level, and µP/µC operation.
•
Precision power supply minotor
•2.63V threshold (ASM706P/R, ASM708R)
•2.93V threshold (ASM706S, ASM708S)
•3.08V threshold (ASM706T, ASM708T)
•New 4.00V threshold (ASM706J , ASM708J)
The family offers several functional options. Each device
generates a reset signal during power-up, power-down and
during brownout conditions. A reset is generated when the
supply drops below 2.63V (ASM706P/R, ASM708R), 2.93V
(ASM706S, ASM708S), 3.08V (ASM706T, ASM708T) or 4.00
(ASM706J, ASM708J). In addition, the ASM706P/R/S/T/J
feature a 1.6 second watchdog timer. The watchdog timer
output will trigger a reset if connected to MR. Floating the WDI
input pin disables the watchdog timer.
•
•
Debounced manual reset input
Auxiliary voltage monitor comparator
•1.25V threshold
•Battery monitor / auxiliary supply monitor
•
Watchdog timer (ASM706P/R/S/T/J)
•Watchdog can be disabled by floating WDI
•
•
200ms reset time delay
Three reset signal options
•Active HIGH: ASM706P
•Active LOW: ASM706R/S/T/J
•Active HIGH and LOW outputs: ASM708R/S/T/J
The ASM708R/S/T/J have both active-HIGH and active-LOW
reset outputs but no watchdog function. The ASM706P has the
same pin-out and functions as the ASM706R but has an active-
HIGH reset output.
•
•
DIP, SO and MicroSO packages
Guaranteed RESET assertion to VCC = 1.1V
Applications
•
•
•
•
•
•
•
•
Computers and embedded controllers
CTI applications
Automotive systems
Portable/Battery-operated systems
Intelligent instruments
Wireless communication systems
PDAs and hand-held equipment
Safety systems
A versatile power-fail circuit, useful in checking battery levels
and non-5V supplies, has a 1.25V threshold. All devices have a
manual reset input. All devices are available in 8-pin DIP, SO
and the compact MicroSO packages. The MicroSO package
requires 50% less PC board area than the conventional SO
package.
Typical Operating Circuit
Unregulated DC
+3.3V Regulator
µP
VCC
R1
VCC
RESET
RESET
(RESET)
(RESET)
PFI
WDI
I/O LINE
ASM706 R/S/T
ASM708 R/S/T
(ASM706 P)
NMI
WDO
PFO
R2
MR
INTERRUPT
Alliance Semiconductor
2575 Augustine Drive . Santa Clara, CA 95054 . Tel: 408.855.4900 . Fax: 408.855.4999 . www.alsc.com
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Block Diagrams
Transition
WDI
Watchdog
Timer
WDO
Detector
RESET
V
V
CC
CC
Timebase
20kΩ
20kΩ
RESET
Generator
MR
RESET
RESET
Generator
MR
RESET
(RESET) ASM706P
+
+
V
V
CC
CC
-
-
2.63V (ASM706P/R)
2.93V (ASM706S)
3.08V (ASM706T)
4.00V (ASM706J)
+
2.63V (ASM708R)
+
2.93V (ASM708S)
3.08V (ASM708T)
4.00V (ASM708J)
PFI
PFI
+
-
+
-
PFO
PFO
1.25V
1.25V
ASM706P/R/S/T/J
ASM708R/S/T/J
GND
GND
Pin Configuration
MicroSO
DIP/SO
8
1
2
3
8
RESET
WDI
8
(RESET)
(ASM706P)
WDO
RESET
1
2
8
NC
8
1
1
2
3
1
2
3
RESET
MR
MR
WDO
RESET
MR
WDO
VCC
VCC
VCC
7
6
5
RESET
RESET
2
3
7
6
5
PFO
PFI
7
6
5
RESET
NC
PFO
PFI
7
6
5
7
6
5
MR
VCC
3
MR
GND
PFI
GND
PFI
WDI
PFO
WDI
PFO
GND
PFI
VCC
GND
GND
4
4
4
4
4
PFO
2 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Pin Description
Pin Number
ASM706P
ASM706R/S/T/J
ASM708R/S/T/J
Name
Function
DIP/
DIP/
DIP/
MicroSO
SO
MicroSO
SO
MicroSO
SO
Manual reset input. The active LOW input triggers
a reset pulse. It is pulled HIGH by a 20kΩ pull-up
resistor. It is compatible with TTL/CMOS signals
when VCC = 5V. It can be shorted to ground
1
3
1
3
1
3
MR
through a mechanical switch. Leave folating or
connect to VCC if the function is not used.
VCC
2
3
4
5
2
3
4
5
2
3
4
5
Monitored power supply input.
Ground.
GND
Power-fail input voltage monitor. With PFI less
than 1.25V, PFO goes LOW. Connect PFI to
Ground when not in use.
4
5
6
7
4
5
6
7
4
5
6
7
PFI
Power-fail output. The output is active LOW and
sinks current when PFI is less than 1.25V. If not
used, leave the pin unconnected.
PFO
Watchdog input. WDI controls the internal watch-
dog timer. A HIGH or LOW signal for 1.6sec at
WDI allows the internal timer to run-out, setting
WDO low. A rising or falling edge must occur at
WDI within 1.6 seconds or WDO goes LOW. The
watchdog function is disabled by floating WDI. The
internal watchdog timer clears when: RESET is
asserted; WDI is three-stated ; or WDI sees a ris-
ing or falling edge.
6
8
6
8
-
-
WDI
-
-
-
-
-
-
6
7
8
1
NC
Not Connected
Active LOW reset output. Pulses LOW for 200ms
when triggered, and stays LOW whenever VCC is
below the reset threshold. RESET remains LOW
for 200ms after VCC rises above the reset thresh-
7
1
RESET
old or MR goes from HIGH to LOW. A watchdog
timeout will not trigger RESET unless WDO is con-
nected to MR.
3 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Pin Number
ASM706P
DIP/
ASM706R/S/T/J
ASM708R/S/T/J
Name
Function
DIP/
DIP/
MicroSO
MicroSO
SO
MicroSO
SO
SO
Watchdog output. WDO goes LOW when the 1.6
second interval watchdog timer times-out and
does not go HIGH until a transition occurs at WDI.
In addition, when VCC falls below the reset thresh-
8
7
2
1
8
-
2
-
-
-
WDO
old, WDO goes LOW. Unlike RESET, WDO does
not have a minimum pulse width and as soon as
VCC exceeds the reset threshold, WDO becomes
HIGH with no delay.
8
2
RESET
Active HIGH reset output. The inverse of RESET.
4 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Manual Reset (MR)
Detailed Descriptions
The active-LOW manual reset input is pulled high by an
internal 20kΩ pull-up resistor and can be driven low by
CMOS/TTL logic or a mechanical switch to ground. An
external debounce circuit is
A
proper reset input enables
a
microprocessor/
microcontroller to start in a known state. ASM706 P/ R/ S/ T/
J and ASM708 R/ S/ T/ J assert reset to prevent code
execution errors during power-up, power-down and brown-
out conditions.
unnecessary since the 140ms minimum reset time will
debounce mechanical pushbutton switches. The minimum
MR input pulse width is 0.5µs with a 3V VCC input and 0.15µs
RESET/RESET Operation
with a 5V VCC input. If not used, tie MR to VCC or leave
floating.
The RESET/RESET signals are designed to start or return a
µP/µC to a known state.
With VCC above 1.2V, RESET and RESET are guaranteed to
be asserted. During a power-up sequence, the reset outputs
remain asserted until the supply rises above the threshold
level. The resets are deasserted approximately 200ms after
crossing the threshold.
In a brownout situation where VCC falls below the threshold
level, the reset outputs are asserted. If a brownout occurs
during an already initiated reset period, the reset period will
extend for an additional reset period of 200ms.
The ASM708 devices have dual reset outputs, one active
LOW and one active HIGH. The ASM706P has a single
active HIGH reset and the ASM706/R/S/T/J devices have an
active LOW reset output.
Figure 1: WDI Three-state operation
By connecting the watchdog output (WDO) and MR, a
watchdog timeout forces a RESET to be generated.
Alliance
Part #
RESET
Polarity
Watchdog
Timer
Threshold
ASM706P
ASM706R
ASM706S
ASM706T
ASM706J
ASM708R
ASM708S
ASM708T
ASM708J
HIGH
LOW
2.63V
2.63V
2.93V
3.08V
4.00V
2.63V
2.93V
3.08V
4.00V
YES
YES
YES
YES
YES
NO
Watchdog Timer
A
watchdog timer available on the ASM706P/R/S/T/J
monitors µP/µC activity. An output line on the processor is
used to toggle the WDI line. If the line is not toggled within 1.6
seconds on the Watchdog Input (WDI), the internal timer puts
the Watchdog Output (WDO) into a LOW state. WDO will
remain LOW until a toggle is detected at WDI.
LOW
LOW
LOW
HIGH & LOW
HIGH & LOW
HIGH & LOW
HIGH & LOW
The watchdog function is disabled, meaning it is cleared and
not counting, if WDI is floated or connected to a three-stated
circuit. The watchdog timer is also disabled if RESET is
asserted. When RESET becomes inactive and the WDI input
sees a high or low transition as short as 100ns (VCC = 2.7V)/
NO
NO
NO
5 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
50ns (VCC = 4.5V), the watchdog timer will begin a 1.6
Application Information
second countdown. Additional transitions at WDI will reset
the watchdog timer and initiate a new countdown sequence.
WDO will also become LOW and remain so, whenever the
supply voltage, VCC, falls below the device threshold level.
Bi-directional Reset Pin Interfacing
The ASM706/8 can interface with µP/µC bi-directional reset
pins by connecting a 4.7kΩ resistor in series with the RESET
output and the µP/µC bi-directional reset pin.
WDO goes HIGH as soon as VCC transitions above the
threshold. There is no minimum pulse width for WDO as
there is for the RESET outputs. If WDI is floated, WDO
essentially acts as a low supply voltage output indicator.
BUF
Buffered
RESET
VCC
Power-failure Detection With Auxiliary Comparator
All devices have an auxiliary comparator with 1.25V trip point.
The output, PFO, is active LOW and the noninverting input is
PFI. This comparator can be used as a supply voltage
monitor with an external resistor voltage divider. As the
monitored voltage level falls, PFI is reduced causing the PFO
output to go LOW. Normally PFO interrupts the processor so
the system can be shut down in a controlled manner.
µC or µP
ASM70x
Supply Voltage
4.7kΩ
RESET
Input
RESET
GND
GND
Bi-directional I/O Pin
Figure 3: Bi-directional reset pin interfacing
0V
Ensuring the RESET is Valid Down to VCC = 0V
When VCC falls below 1.2V, the ASM706R/S/T/J and 708R/S/
T/J RESET reset outputs no longer pull down; it becomes
indeterminate. To avoid the possibility that stray charges
could build up and force RESET to the wrong state, a pull-
down resistor should be connected to the RESET pin, thus
draining such charges to ground. The resistor value is not
critical. A100kΩ resistor will pull RESET to ground without
loading it.
Figure 2: Watchdog timing
6 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Monitoring Voltages Other Than VCC
VIN
The ASM706/708 can monitor voltages other than VCC using
+5V
the Power Fail circuitry. If a resistive divider is connected from
the voltage to be monitored to the PFI input, the PFO will go
LOW if the voltage at PFI goes below 1.25V reference. Should
VCC
R1
MR
hysteresis be desired, connect
a
resistor (equal to
ASM70X
PFO
approximately 10 times the sum of the two resistors in the
divider) between the PFI and PFO pins. A capacitor between
PFI and GND will reduce circuit sensitivity to input high
frequency noise. If it is desired to assert a reset in addition to
the PFO flag, this may be achieved by connecting the PFO
output to MR.
PFI
RESET
To µP
R2
GND
Figure 4: Monitoring +5V and an additional supply VIN
Absolute Maximum Ratings
Parameter
Min
Max
Unit
Pin Terminal Voltage with Respect to Ground
VCC
-0.3
-0.3
6.0
V
V
V
CC + 0.3
All other inputs
Input Current at VCC and GND
20
20
mA
mA
V/µs
Output Current: All outputs
Rate of Rise at VCC
100
Plastic DIP Power Dissipation
(Derate 9mW/°C above 70°C)
700
470
330
mV
mW‘
mW
SO Power Dissipation
(Derate 5.9mW/°C above 70°C)
MicroSO POwer Disspation
(Derate 4.1mW/°C above 70°C)
Operating Temperature Range
ASM706xE, ASM708xE
-40
0
+85
70
°C
°C
°C
°C
ASM706xC, ASM708xC
Storage Temperature Range
Lead Temperature Soldering (10sec)
-65
160
300
Note: These are stress ratings only and functional operation is noy implied. Exposure to absolute maximum ratings for pro-
longed time periods may affect device reliability.
7 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Electrical Characteristics
Unless otherwise noted, specifications are over the operating temperature range and VCC supply voltages are 2.7V to 5.5V (ASM706P,
ASM708R), 3.0 V to 5.5V (ASM706/708S), 3.15V to 5.5V (ASM706/708T) and 4.1V to 5.5.V (ASM706/708J)
Parameter
Symbol
Conditions
ASM706xC, ASM708xC
Min
Typ
Max
Unit
1.1
1.2
5.5
5.5
Operating Voltage
Range
VCC
V
ASM706xE, ASM708xE
ASM706xC, ASM706xE, MR = VCC, WDI Float-
ing
75
50
75
50
140
140
140
140
Supply Current
ICC
µA
µA
VCC < 3.6V
ASM708xC, ASM708xE, MR = VCC, WDI Float-
ing
ASM706xC, ASM706xE, MR = VCC, WDI Float-
ing
Supply Current
CC < 5.5V
ICC
V
ASM708xC, ASM708xE, MR = VCC, WDI Float-
ing
P and R devices
S devices
2.55
2.85
3.00
3.89
2.63
2.93
3.08
4.00
2.70
3.00
3.15
4.10
VRT
RESET Threshold
V
T devices
J devices
RESET Threshold
Hysteresis
40
mV
VCC = 3V (ASM706/8, P/R devices).
V
V
V
CC = 3.3V (ASM706/8, S/T devices).
CC = 4.4V (ASM706/8, J devices).
CC = 5V
140
200
200
280
tRS
RESET Pulse Width
MR Pulse Width
ms
4.5V < VCC < 5.5V
150
500
3.6V < VCC < 4.5V (ASM706/8J devices)
tMR
ns
VRST (MAX) < VCC < 3.6V
(ASM706/8/P/R/S/T devices)
3.6V < VCC < 4.5V (AS706/8J devices)
V
RST (MAX) < VCC < 3.6V
750
250
MR to RESET Out
Delay
tMD
ns
(ASM706/8/P/R/S/T devices)
4.5V < VCC < 5.5V
8 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Parameter
Symbol
VIH
Conditions
VRST(MAX) < VCC < 4.5V
Min
Typ
Max
Unit
V
0.7VCC
VIL
VRST(MAX) < VCC < 4.5V
4.5V < VCC < 5.5V
0.6
MR Input Threshold
MR Pullup resistor
VIH
2.0
VIL
4.5V < VCC < 5.5V
0.8
40
RP
10
20
kΩ
VOH
VOL
VOH
VOL
ISOURCE = 800µA, 4.5V < VCC < 5.5V
ISINK = 3.2mA, 4.5V < VCC < 5.5V
VCC - 1.5
0.4
ISOURCE=500µA, VRST(MAX) < VCC < 4.5V
ISINK =1.2mA, VRST(MAX) < VCC < 4.5V
0.8VCC
RESET Output Volt-
age
(All R/S/T/J devices)
0.3
0.3
V
ISINK = 50µA, VCC = 1.1V (ASM706xC,
ASM708xC devices)
VOL
I
SINK =100µA, VCC = 1.2V (ASM706xE,
0.3
ASM708xE devices)
VOH
VOL
VOH
VOL
VOH
VOL
VOH
VOL
ISOURCE = 800µA, 4.5V < VCC < 5.5V
VCC - 1.5
0.8VCC
RESET Output Volt-
age
ASM706P
ISINK = 3.2mA, 4.5V < VCC < 5.5V
0.4
0.3
V
ISOURCE=500µA, VRST(MAX) < VCC <3.6V
ISINK =1.2mA, VRST(MAX) < VCC < 3.6V
ISOURCE = 800µA, 4.5V < VCC < 5.5V
ISINK = 3.2mA, 4.5V < VCC < 5.5V
VCC - 1.5
0.8VCC
RESET Output Volt-
age
ASM708R/S/T/J
0.4
V
s
ISOURCE=500µA, VRST(MAX) < VCC < 4.5V
ISINK =1.2mA, VRST(MAX) < VCC < 4.5V
VCC = 3V (ASM706, P/R devices).
0.3
Watchdog Timeout
Period
tWD
VCC = 3.3V (ASM706 S/T devices).
1.0
1.6
2.25
VCC = 4.4V (ASM706, J devices).
VIL = 0.4V, VIH=0.8VCC
,
100
50
VRST(MAX) < VCC < 4.5V
tWP
WDI Pulse Width
ns
V
IL = 0.4V, VIH=0.8VCC
,
4.5V < VCC < 5.5V
9 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Parameter
Symbol
VIH
Conditions
Min
Typ
Max
Unit
VCC = 5V
3.5
VIL
0.8
WDI Input Threshold
WDI Input Current
WDO Output Voltage
V
VIH
VRST(MAX) < VCC < 4.5V
WDI = VCC, ASM706 only
0.7VCC
VIL
0.6
50
150
µA
V
WDI = 0V, ASM706 only
-150
-50
VOH
VOL
VOH
VOL
ISOURCE = 800µA, 4.5V < VCC < 5.5V
VCC - 1.5
ISINK = 1.2mA, 4.5V < VCC < 5.5V
0.4
ISOURCE=500µA, VRST(MAX) < VCC < 4.5V
ISINK =1.2mA, VRST(MAX) < VCC < 4.5V
0.8VCC
0.3
1.3
25
PFI falling. For P/R devices VCC = 3V. For S/T
devices VCC = 3.3V. For J devices VCC = 4.4V
PFI Input Threshold
PFI Input Current
1.2
1.25
0.01
V
-25
nA
VOH
VOL
VOH
ISOURCE = 800µA, 4.5V < VCC < 5.5V
ISINK = 3.2mA, 4.5V < VCC < 5.5V
VCC - 1.5
0.4
0.3
PFO Output Voltage
V
ISOURCE=500µA, VRS(MAX) < VCC < 4.5V
ISINK =1.2mA, VRS(MAX) < VCC < 4.5V
0.8VCC
V
OL
10 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Package Dimensions
MicroSO(8-pin)
Inches
Millimeters
Min
Max
Min
-
Max
1.10
0.15
0.95
0.40
0.23
3.10
A
A1
A2
b
-
0.0433
0.0059
0.0374
0.0157
0.0091
0.1220
0.0020
0.0295
0.0098
0.0051
0.1142
0.0256
0.193B
0.1142
0.0157
0°
0.050
0.75
0.25
0.13
2.90
0.65BS
4.90BS
2.90
0.40
0°
C
D
e
E
E1
L
0.1220
0.0276
6°
3.10
0.70
6°
a
SO(8-pin)
Inches
Millimeters
Min Max
1.35 1.75
Min
0.053
0.004
0.013
0.007
0.050
0.150
0.228
0.016
0.189
Max
0.069
0.010
0.020
0.010
A
A1
B
0.10
0.33
0.19
1.27
3.80
5.80
0.40
4.80
0.25
0.51
0.25
C
e
E
0.157
0.244
0.50
4.00
6.20
1.27
2.00
H
L
D
0.197
11 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Plastic DIP(8-pin)
Inches
Millimeters
Min Max
5.33
Min
-
Max
0.210
-
A
A1
A2
b
-
0.015
0.115
0.014
0.045
0.030
0.355
0.005
0.300
0.240
0.100
0.300
-
0.38
2.92
0.36
1.14
0.080
9.02
0.13
7.62
6.10
2.54
7.62
-
-
0.195
0.022
0.070
0.045
0.400
-
4.95
0.56
1.78
1.14
10.16
-
b2
b3
D
D1
E
0.325
0.280
-
8.26
7.11
E1
e
eA
eB
eC
L
-
0.430
0.060
0.150
10.92
3.81
-
0.115
2.92
12 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Ordering Codes
Operating
Temperature
Range (°C)
Reset
Threshold
Watchdog
Timer
Part Number
Package
Reset Polarity
ASM706PCPA
ASM706PCSA
ASM706PCUA
ASM706PEPA
ASM706PESA
ASM706RCPA
ASM706RCSA
ASM706RCUA
ASM706REPA
ASM706RESA
ASM706SCPA
ASM706SCSA
ASM706SCUA
ASM706SEPA
ASM706SESA
ASM706TCPA
ASM706TCSA
ASM706TCUA
ASM706TEPA
ASM706TESA
ASM706JCPA
ASM706JCSA
ASM706JCUA
ASM706JEPA
ASM706JESA
ASM708RCPA
ASM708RCSA
ASM708RCUA
8- Plastic DIP
8-SO
0 to +70
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
0 to +70
2.63
2.63
2.63
2.63
2.63
2.63
2.63
2.63
2.63
2.63
2.93
2.93
2.93
2.93
2.93
3.08
3.08
3.08
3.08
3.08
4.00
4.00
4.00
4.00
4.00
2.63
2.63
2.63
HIGH
HIGH
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
YES
NO
8-MicroSO
8-Plastic DIP
8-SO
HIGH
HIGH
HIGH
8- Plastic DIP
8-SO
LOW
LOW
8-MicroSO
8-Plastic DIP
8-SO
LOW
LOW
LOW
8- Plastic DIP
8-SO
LOW
LOW
8-MicroSO
8-Plastic DIP
8-SO
LOW
LOW
LOW
8- Plastic DIP
8-SO
LOW
LOW
8-MicroSO
8-Plastic DIP
8-SO
LOW
LOW
LOW
8- Plastic DIP
8-SO
LOW
LOW
8-MicroSO
8-Plastic DIP
8-SO
LOW
LOW
LOW
8- Plastic DIP
8-SO
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
NO
8-MicroSO
NO
13 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Operating
Temperature
Range (°C)
Reset
Threshold
Watchdog
Timer
Part Number
Package
Reset Polarity
ASM708REPA
ASM708RESA
ASM708SCPA
ASM708SCSA
ASM708SCUA
ASM708SEPA
ASM708SESA
ASM708TCPA
ASM708TCSA
ASM708TCUA
ASM708TEPA
ASM708TESA
ASM708JCPA
ASM708JCSA
ASM708JCUA
ASM708JEPA
ASM708JESA
8-Plastic DIP
8-SO
-40 to +85
-40 to +85
0 to +70
2.63
2.63
2.93
2.93
2.93
2.93
2.93
3.08
3.08
3.08
3.08
3.08
4.00
4.00
4.00
4.00
4.00
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
Dual: HIGH & LOW
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
NO
8- Plastic DIP
8-SO
0 to +70
8-MicroSO
8-Plastic DIP
8-SO
0 to +70
-40 to +85
-40 to +85
0 to +70
8- Plastic DIP
8-SO
0 to +70
8-MicroSO
8-Plastic DIP
8-SO
0 to +70
-40 to +85
-40 to +85
0 to +70
8- Plastic DIP
8-SO
0 to +70
8-MicroSO
8-Plastic DIP
8-SO
0 to +70
-40 to +85
-40 to +85
14 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
October 2003
rev 1.0
Feature Summary
ASM706
T
ASM706P
ASM706R
ASM706S
ASM706J
ASM708R
ASM708S
ASM708T
ASM708J
Power fail
detector
Brownout
detection
Debounced
Manual
RESET
Power-up/
down RESET
Watchdog
Timer
Active HIGH
RESET
Active LOW
RESET
Active LOW
and HIGH
RESETs
RESET
Threshold (V)
2.63
2.63
2.93
3.08
4.00
2.63
2.93
3.08
4.00
15 of 16
3/3.3/4.0 V µP Supervisor Circuits
Notice: The information in this document is subject to change without notice
ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
Copyright © Alliance Semiconductor
All Rights Reserved
Part Number: ASM706 P/ R/ S/ T/ J
ASM708 R/ S/ T/ J
Alliance Semiconductor Corporation
2575, Augustine Drive,
Santa Clara, CA 95054
Tel: 408 - 855 - 4900
Fax: 408 - 855 - 4999
www.alsc.com
Document Version: 1.0
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are trademarks or
registered trademarks of Alliance. All other brand and product names may be the trademarks of their respective companies. Alliance reserves the
right to make changes to this document and its products at any time without notice. Alliance assumes no responsibility for any errors that may
appear in this document. The data contained herein represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the
right to change or correct this data at any time, without notice. If the product described herein is under development, significant changes to these
specifications are possible. The information in this product data sheet is intended to be general descriptive information for potential customers and
users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or customer. Alliance does not assume any responsibility
or liability arising out of the application or use of any product described herein, and disclaims any express or implied warranties related to the sale
and/or use of Alliance products including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any
intellectual property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance). All sales of
Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of products from Alliance does not
convey a license under any patent rights, copyrights; mask works rights, trademarks, or any other intellectual property rights of Alliance or third
parties. Alliance does not authorize its products for use as critical components in life-supporting systems where a malfunction or failure may
reasonably be expected to result in significant injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that
the manufacturer assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.
相关型号：
ASM708RESAF-T
Power Supply Support Circuit, Fixed, 2 Channel, CMOS, PDSO8, ROHS COMPLIANT, SOP-8
ALSC
ASM708SCUAF
Power Supply Support Circuit, Fixed, 2 Channel, CMOS, PDSO8, ROHS COMPLIANT, MICRO, SOP-8
ALSC
ASM708SCUAF
Power Supply Support Circuit, Fixed, 2 Channel, CMOS, PDSO8, ROHS COMPLIANT, MICRO, SOP-8
PULSECORE
ASM708SCUAF-T
Power Supply Support Circuit, Fixed, 2 Channel, CMOS, PDSO8, ROHS COMPLIANT, MICRO, SOP-8
PULSECORE
©2020 ICPDF网 联系我们和版权申明