P1708C-08ST [ALSC]
Low Power Notebook LCD Panel EMI Reduction IC; 低功耗笔记本电脑LCD面板的EMI降低IC型号: | P1708C-08ST |
厂家: | ALLIANCE SEMICONDUCTOR CORPORATION |
描述: | Low Power Notebook LCD Panel EMI Reduction IC |
文件: | 总10页 (文件大小:474K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
June 2004
rev 1.1
P1708C
Low Power Notebook LCD Panel EMI Reduction IC
Features
down stream clock and data dependent signals. The
P1708C allows significant system cost savings by reducing
the number of circuit board layers ferrite beads, shielding
and other passive components that are traditionally
required to pass EMI regulations.
FCC approved method of EMI attenuation.
Generates a low EMI spread spectrum clock of the
input frequency.
Optimized for frequency range from 50 to 110MHz.
Internal loop filter minimizes external components
and board space.
The P1708C modulates the output of a single PLL in order
to “spread” the bandwidth of a synthesized clock, and more
importantly, decreases the peak amplitudes of its
harmonics. This results in significantly lower system EMI
compared to the typical narrow band signal produced by
oscillators and most frequency generators. Lowering EMI
by increasing a signal’s bandwidth is called ‘spread
spectrum clock generation’.
Four selectable spread ranges.
Low inherent cycle-to-cycle jitter.
3.3V operating voltage range.
TTL or CMOS compatible inputs and outputs.
Ultra-low power CMOS design.
8.46 mA @3.3V, 54MHz
9.79 mA @3.3V, 65MHz
12.06 mA @3.3V, 81MHz
16.51 mA @3.3V, 108MHz
The P1708C uses the most efficient and optimized
modulation profile approved by the FCC and is
implemented in a proprietary all digital method.
Supports notebook VGA and other LCD timing
controller applications.
Pinout compatible to ICS MK1708 and Cypress
CY25560.
SSON/SBM pin for Spread Spectrum On/Off and
Standby Mode controls.
Available in 8-pin SOIC and TSSOP.
Applications
The P1708C is targeted towards notebook LCD displays,
and other displays using an LVDS interface, PC peripheral
devices, and embedded systems.
Product Description
The P1708C is a versatile spread spectrum frequency
modulator designed specifically for input clock frequencies.
The P1708C reduces electromagnetic interference (EMI) at
the clock source, allowing system wide reduction of EMI of
VDD
SSON
SR1
SR0
Block Diagram
PLL
Modulation
CLKIN
Frequency
Divider
Output
Phase
Loop
Filter
VCO
Divider
Detector
Feedback
Divider
ModOUT
VSS
Alliance Semiconductor
2575, Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com
Notice: The information in this document is subject to change without notice.
June 2004
rev 1.1
P1708C
Pin Configuration
1
2
3
4
8
7
6
5
CLKIN
VDD
VSS
NC
SR0
SR1
P1708C
ModOUT
SSON/SBM
Pin Description
Pin#
Pin Name
Type
Description
Connect to externally generated clock signal. To put the part into standby
mode, disable the input clock signal to this pin and pull SSON/SBM (pin 5)
low. Refer Standby Mode Selection Table.
1
CLKIN
I
2
3
4
VDD
VSS
P
P
O
Connect to +3.3V.
Ground Connection. Connect to system ground.
Spread spectrum clock output.
ModOUT
Spread Spectrum On/Off and standby mode control. Refer Standby Mode
5
6
SSON/SBM
SR1
I
I
Selection Table. This pin has an internal pull-up resistor.
Digital logic input used to select Spreading Range. Refer Spread Spectrum
Selection Table. This pin has an internal pull-up resistor.
Digital logic input used to select Spreading Range. Refer Spread Spectrum
7
8
SR0
NC
I
Selection Table. This pin has an internal pull-up resistor.
-
No connect.
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Notice: The information in this document is subject to change without notice.
June 2004
P1708C
rev 1.1
Standby Mode Selection
Spread
CLKIN
SSON/SBM
ModOUT
PLL
Mode
Spectrum
Disabled
Disabled
Enabled
Enabled
0
1
0
1
N/A
N/A
Off
Disabled
Disabled
Reference
Normal
Disabled
Free Running
Disabled
Standby
Free Running
Buffer out
Normal
On
Normal
Spread Range Selection
SR1
SR0
Spreading Range
± 1.00%
Modulation Rate
0
0
1
1
0
1
0
1
(FIN/40) * 62.49 KHz
(FIN/40) * 62.49 KHz
(FIN/40) * 62.49 KHz
(FIN/40) * 62.49 KHz
± 2.00%
± 0.25%
± 0.75%
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Notice: The information in this document is subject to change without notice.
June 2004
rev 1.1
P1708C
Schematic for Notebook VGA Application
P1708C
CLKIN
50MHz to 110MHz pixel clock input
from VGA chip
Pin 8 can be tied either high or low,
or it can be left unconnected.
NC
8
7
6
5
1
2
3
4
0.1µF
FB
VDD
Tie SR0 and SR1 high/low
SR0
SR1
according to spread range desired.
External resistors are not needed to
pull these pins high.
VDD
VSS
Pin 5 SSON should be left unconnected to turn on
spread spectrum. Pull this pin low to turn spread
spectrum OFF and enable stand-by mode.
ModOUT
SSON
50MHz – 110MHz Pixel Clock
Input from VGA Chip
Note: To set the P1708C to standby mode, disable the input clock (pin 1 CLKIN) and pull SSON (pin 5) low. Refer Standby Mode Selection
Table.
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Notice: The information in this document is subject to change without notice.
June 2004
P1708C
rev 1.1
Absolute Maximum Ratings
Symbol
VDD, VIN
TSTG
Parameter
Voltage on any pin with respect to GND
Storage temperature
Rating
-0.5 to + 7.0
-65 to +125
0 to 70
Unit
V
°C
°C
TA
Operating temperature
Note: These are stress ratings only and functional operation is not implied. Exposure to absolute maximum
ratings for extended periods may affect device reliability.
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Unit
VIL
VIH
Input low voltage
Input high voltage
GND – 0.3
2.0
-
-
0.8
V
V
VDD + 0.3
Input low current (pull-up resistors on inputs SR0, SR1
IIL
-
-
-35
µA
and SSON/SBM)
IIH
Input high current
-
-
3
3
-
35
µA
mA
mA
V
IXOL
IXOH
VOL
VOH
XOUT output low current @ 0.4V, VDD = 3.3V
XOUT output high current @ 2.5V, VDD = 3.3V
Output low voltage VDD = 3.3V, IOL = 20mA
Output high voltage VDD = 3.3V, IOH = 20mA
-
-
-
-
-
0.4
2.5
-
-
V
Dynamic supply current normal mode
17.53
ICC
7.90
9.79
mA
3.3V and 10pF loading
fIN -max
IDD
Static supply current standby mode
Operating voltage
-
2.7
-
0.6
3.3
-
3.7
-
mA
V
VDD
tON
Power up time (first locked clock cycle after power up)
Clock output impedance
0.18
50
mS
Ω
ZOUT
-
-
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Notice: The information in this document is subject to change without notice.
June 2004
rev 1.1
P1708C
AC Electrical Characteristics
Symbol
Parameter
Min
50
50
Typ
-
-
Max
110
110
Unit
MHz
MHz
fIN
Input frequency
Output frequency
fOUT
Output rise time
tLH*
0.7
0.9
1.1
ns
Measured at 0.8V to 2.0V
Output fall time
tHL*
0.6
0.8
1.0
ns
Measured at 0.8V to 2.0V
tJC
tD
Jitter (cycle to cycle)
Output duty cycle
-
45
-
50
360
55
ps
%
*tLH and tHL are measured into a capacitive load of 15pF
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Notice: The information in this document is subject to change without notice.
June 2004
rev 1.1
P1708C
Package Information
Mechanical Package Outline 8-Pin SOIC
H
E
D
A2
A
C
θ
e
A1
L
B
Symbol Dimensions in inches Dimensions in millimeters
Min
Max
0.071
0.010
0.069
0.020
0.01
Min
1.45
0.10
1.35
0.31
0.10
4.72
3.75
Max
1.80
0.25
1.75
0.51
0.25
5.12
4.15
A
A1
A2
B
0.057
0.004
0.053
0.012
0.004
0.186
0.148
C
D
E
0.202
0.164
e
0.050 BSC
1.27 BSC
H
L
0.224
0.012
0°
0.248
0.028
8°
5.70
0.30
0°
6.30
0.70
8°
θ
Note: Controlling dimensions are millimeters
SOIC – 0.074 grams unit weight
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Notice: The information in this document is subject to change without notice.
June 2004
rev 1.1
P1708C
Mechanical Package Outline 8-Pin TSSOP
H
E
D
A2
A
C
θ
e
A1
L
B
Dimensions in inches
Dimensions in millimeters
Symbol
Min
Max
Min
Max
1.10
0.15
1.05
0.30
0.20
3.10
4.50
A
A1
A2
B
0.047
0.006
0.041
0.012
0.008
0.122
0.177
0.002
0.031
0.007
0.004
0.114
0.169
0.05
0.80
0.19
0.09
2.90
4.30
C
D
E
e
0.026 BSC
0.65 BSC
H
L
0.244
0.018
0°
0.260
0.030
8°
6.20
0.45
0°
6.60
0.75
8°
θ
Note: Controlling dimensions are millimeters
TSSOP – 0.034 grams unit weight
Low Power Notebook LCD Panel EMI Reduction IC
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Notice: The information in this document is subject to change without notice.
June 2004
P1708C
rev 1.1
Ordering Codes
Temperature
(°C)
Part Number
Marking
Package Type
Qty per reel
P1708C-08ST
P1708C-08SR
P1708C-08TT
P1708C-08TR
P1708CF-08ST
P1708CF-08SR
P1708CF-08TT
P1708CF-08TR
P1708C
P1708C
P1708C
P1708C
P1708CF
P1708CF
P1708CF
8-pin SOIC, tube
8-pin SOIC, tape & reel
8-pin TSSOP, tube
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
2500
2500
2500
2500
8-pin TSSOP, tape and reel
8-pin SOIC, tube
8-pin SOIC, tape & reel
8-pin TSSOP, tube
P1708CF 8-pin TSSOP, tape and reel
Device Ordering Information
P 1 7 0 8 C F - 0 8 X X
OR - SOT23/T/R
SR - SOIC, T/R
TT – TSSOP, TUBE
TR - TSSOP, T/R
VT – TVSOP, TUBE
VR – TVSOP, T/R
ST – SOIC, TUBE
QR – QFN, T/R
QT - QFN, TUBE
BT - BGA, TUBE
BR – BGA, T/R
Pin Count
Pb FREE
DEVICE NUMBER
Flow:
P = Commercial Temperature Range (0°C to 70°C)
Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.
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Notice: The information in this document is subject to change without notice.
June 2004
rev 1.1
P1708C
Alliance Semiconductor Corporation
2595, Augustine Drive,
Santa Clara, CA 95054
Tel# 408-855-4900
Copyright © Alliance Semiconductor
All Rights Reserved
Preliminary Information
Part Number: P1708C
Document Version: v1.1
Fax: 408-855-4999
www.alsc.com
Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003
© Copyright 2003 Alliance Semiconductor Corporation. All rights reserved. Our three-point logo, our name and Intelliwatt are
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notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein
represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this
data at any time, without notice. If the product described herein is under development, significant changes to these
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Notice: The information in this document is subject to change without notice.
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