P1819HF-08TT_技术文档

November 2005

rev 1.7

P1819

Notebook LCD Panel EMI Reduction IC

Features

ferrite beads, shielding and other passive components that

are traditionally required to pass EMI regulations.

FCC approved method of EMI attenuation.

Provides up to 15dB EMI reduction.

Generates a low EMI Spread Spectrum clock and a

non-spread reference clock of the input frequency.

Optimized for Frequency range from 20 to 40MHz.

Internal loop filter minimizes external components

and board space.

The P1819 modulates the output of a single PLL in order to

“spread” the bandwidth of a synthesized clock, and more

importantly, decreases the peak amplitudes of its

harmonics. This results in significantly lower system EMI

compared to the typical narrow band signal produced by

oscillators and most frequency generators. Lowering EMI

by increasing a signal’s bandwidth is called ‘Spread

Spectrum Clock Generation’.

Selectable spread options: Down and Center.

Low Inherent Cycle-to-Cycle jitter.

Eight spread % selections: ±0.625% to –3.5%.

3.3V ± 0.3V Operating Voltage range.

Low power CMOS design.

The P1819 uses the most efficient and optimized

modulation profile approved by the FCC and is

implemented in a proprietary all digital method.

Supports notebook VGA and other LCD timing

controller applications.

Power Down function for mobile application.

Available in Commercial temperature range.

Available in 8-pin SOIC and TSSOP Packages.

Applications

Product Description

The P1819 is targeted towards EMI management for

memory and LVDS interfaces in mobile graphic chipsets

and high-speed digital applications such as PC peripheral

devices, consumer electronics, and embedded controller

systems.

The P1819 is a Versatile Spread Spectrum Frequency

Modulator designed specifically for input clock frequencies

from 20 to 40MHz. (Refer Input Frequency and Modulation

Rate Table). The P1819 reduces electromagnetic

interference (EMI) at the clock source, allowing system

wide reduction of EMI of down stream clock and data

dependent signals. The P1819 allows significant system

cost savings by reducing the number of circuit board layers

VDD

SRS

D_C/NC PD#

Block Diagram

PLL

Modulation

XIN/CLKIN

Frequenc

y

Crystal

Oscillator

Output

Divider

Phase

Loop

Filter

VCO

Detector

XOUT

REF

Feedback

Divider

ModOUT

VSS

Alliance Semiconductor

2575 Augustine Drive • Santa Clara, CA • Tel: 408.855.4900 • Fax: 408.855.4999 • www.alsc.com

Notice: The information in this document is subject to change without notice.

November 2005

P1819

rev 1.7

Pin Configuration

XOUT

1

2

3

4

8

7

6

5

1

2

3

4

8

7

6

5

XIN/ CLKIN

XIN / CLKIN

VSS

SRS

VDD

PD#

REF

VDD

PD#

REF

P1819 A/B/C/D

P1819 E/F/G/H/Q

D_C / NC

ModOUT

Pin Description

Pin#

1819A/B/C/D 1819E/F/G/H/Q

Pin Name

Type

Description

Crystal Connection or external frequency input.This pin

has dual functions. It can be connected to either an

external crystal or an external reference clock

1

2

3

1

2

XIN / CLKIN

VSS

I

P

I

Ground Connection. Connect to system ground.

Spread range select. Digital logic input used to select

frequency deviation (Refer Spread Deviation Selection

Table). This pin has an internal pull-up resistor.

Digital logic input used to select Down (LOW) or Center

(HIGH) spread options (Refer Spread Deviation

Selection Table). This pin has an internal pull-up

resistor.

SRS

3

D_C / NC

I

Spread spectrum clock output. (Refer Input Frequency

and Modulation Rate Table and Spread Deviation

Selection Table)

4

5

4

5

ModOUT

REF

O

Non-modulated Reference clock output of the input

frequency.

Power down control pin. Pull LOW to enable Power-

Down mode. This pin has an internal pull-up resistor.

6

7

6

7

PD#

VDD

I

P

Power Supply for the entire chip.

Crystal Connection. Input connection for an external

crystal. If using an external reference, this pin must be

left unconnected.

8

XOUT

O

Note: Pin 3 is NC in P1819Q

Note Book LCD Panel EMI Reduction IC

2 of 9

Notice: The information in this document is subject to change without notice.

November 2005

P1819

rev 1.7

Input Frequency and Modulation Rate

Part Number

Input Frequency Range

Output Frequency range

Modulation rate

P1819

20MHz to 40MHz

Input Frequency / 512

Spread Deviation Selection

Part Number

SRS

D_C

Spread Deviation

-2.50% (DOWN)

-3.50% (DOWN)

-1.25% (DOWN)

-1.75% (DOWN)

±1.25% (CENTER)

±1.75% (CENTER)

±0.625% (CENTER)

±0.875% (CENTER)

-1.25% (DOWN)

±0.625% (CENTER)

-2.5% (DOWN)

0

1

0

1

0

1

0

1

P1819A

NA

P1819B

P1819C

P1819D

P1819E

P1819F

P1819G

NA

0

1

NA

0

1

±1.25% (CENTER)

-1.75% (DOWN)

±0.875% (CENTER)

-3.5% (DOWN)

0

1

0

P1819H

P1819Q

NA

1

±1.75% (CENTER)

-2.5% (DOWN)

NA

Absolute Maximum Ratings

Symbol

Parameter

Rating

-0.5 to +7.0

-65 to +125

0 to 70

Unit

V

°C

V_DD, V_IN

T_STG

T_A

Voltage on any pin with respect to Ground

Storage temperature

Operating temperature

T_s

T_J

Max. Soldering Temperature (10 sec)

Junction Temperature

260

150

Static Discharge Voltage

T_DV

2

KV

(As per JEDEC STD22- A114-B)

Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect

device reliability.

Note Book LCD Panel EMI Reduction IC

3 of 9

Notice: The information in this document is subject to change without notice.

November 2005

rev 1.7

P1819

DC Electrical Characteristics

(Test condition: All parameters are measured at room temperature (+25°C) unless otherwise stated)

Symbol

V_IL

Parameter

Min

Typ

Max

Unit

Input Low voltage

Input High voltage

VSS – 0.3

-

0.8

V

V_IH

2.0

V_DD+ 0.3

-20.0

1.0

V

µA

mA

V

I_IL

Input Low current (inputs D_C, PD#, SRS)

Input High current

-60.0

I_IH

-

2.0

-

I_XOL

I_XOH

V_OL

V_OH

X_OUTOutput low current @ 0.4V, V_DD= 3.3V

X_OUTOutput high current @ 2.5V, V_DD= 3.3V

Output Low voltage V_DD= 3.3V, I_OL= 20mA

Output High voltage V_DD= 3.3V, I_OH= 20mA

12.0

0.4

-

2.5

-

V

Dynamic supply current normal mode

3.3V and 25pF probe loading

7.1

26.9

I_CC

-

mA

f_{IN - min}

f_{IN - max}

I_DD

Static supply current standby mode

-

3.0

-

4.5

3.3

-

3.6

-

mA

V

V_DD

t_ON

Operating Voltage

Power up time (first locked clock cycle after power up)

Clock Output impedance

0.18

50

mS

Ω

Z_OUT

-

AC Electrical Characteristics

Symbol

Parameter

Min

20

Typ

-

Max

40

Unit

MHz

f_IN

Input Frequency

f_OUT

Output Frequency

20

-

40

MHz

Output Rise time

t_LH*

t_HL*

-

0.66

0.65

-

nS

Measured from 0.8V to 2.0V

Output Fall time

Measured from 2.0V to 0.8V

t_JC

t_D

Jitter (cycle to cycle)

Output Duty cycle

-200

45

-

50

200

55

pS

%

*t_LHand t_HLare measured into a capacitive load of 15pF

Note Book LCD Panel EMI Reduction IC

4 of 9

Notice: The information in this document is subject to change without notice.

November 2005

P1819

rev 1.7

Package Information

8-lead (150-mil) SOIC Package

H

E

D

A2

A

C

θ

e

A1

L

B

Dimensions

Symbol

Inches

Millimeters

Min

Max

0.010

0.069

0.059

0.020

0.010

Min

0.10

1.35

1.25

0.31

0.18

Max

0.25

1.75

1.50

0.51

0.25

A1

A

0.004

0.053

0.049

0.012

0.007

A2

B

C

D

E

0.193 BSC

0.154 BSC

0.050 BSC

0.236 BSC

4.90 BSC

3.91 BSC

1.27 BSC

6.00 BSC

e

H

L

0.016

0°

0.050

8°

0.41

0°

1.27

8°

θ

Note: Controlling dimensions are millimeters

SOIC – 0.074 grams unit weight

Note Book LCD Panel EMI Reduction IC

5 of 9

Notice: The information in this document is subject to change without notice.

November 2005

rev 1.7

P1819

8-lead Thin Shrunk Small Outline Package (4.40-MM Body)

H

E

D

A2

A

C

θ

e

A1

L

B

Dimensions

Symbol

Inches

Millimeters

Min

Max

Min

Max

A

A1

A2

B

0.043

0.006

0.037

0.012

0.008

0.122

0.177

1.10

0.002

0.033

0.008

0.004

0.114

0.169

0.05

0.85

0.19

0.09

2.90

4.30

0.15

0.95

0.30

0.20

3.10

4.50

c

D

E

e

0.026 BSC

0.252 BSC

0.65 BSC

6.40 BSC

H

L

0.020

0°

0.028

8°

0.50

0°

0.70

8°

θ

Note: Controlling dimensions are millimeters

TSSOP – 0.0325 grams unit weight

Note Book LCD Panel EMI Reduction IC

6 of 9

Notice: The information in this document is subject to change without notice.

November 2005

P1819

rev 1.7

Ordering Codes

Input

Frequency

Deviation

(%)

Qty /

reel

Pb

Part Number Marking Frequency

(MHz)

Package Type

Temperature

Free

P1819A-08ST

P1819A-08SR

P1819A-08TT

P1819A-08TR

P1819AF-08ST

P1819AF-08SR

P1819AF-08TT

P1819AF-08TR

P1819AG-08ST

P1819A

20-40

-2.5,-3.5

8-pin SOIC, tube

0°C to 70°C

8-pin SOIC, tape &

P1819A

-2.5,-3.5

2500

reel

P1819A

-2.5,-3.5

8-pin TSSOP, tube

8-pin TSSOP, tape

P1819A

-2.5,-3.5

and reel

P1819AF

P1819AG

-2.5,-3.5

8-pin SOIC, tube

Pb Free

Green

8-pin SOIC, tape &

-2.5,-3.5

reel

-2.5,-3.5

8-pin TSSOP, tube

8-pin TSSOP, tape

-2.5,-3.5

and reel

-2.5,-3.5

8-pin SOIC, tube

8-pin SOIC, tape &

P1819AG-08SR P1819AG

P1819AG-08TT P1819AG

P1819AG-08TR P1819AG

-2.5,-3.5

Green

reel

-2.5,-3.5

8-pin TSSOP, tube

Green

8-pin TSSOP, tape

-2.5,-3.5

Green

and reel

P1819B-08ST

P1819B-08SR

P1819B-08TT

P1819B-08TR

P1819BF-08ST

P1819BF-08SR

P1819BF-08TT

P1819BF-08TR

P1819BG-08ST

P1819B

-1.25, -1.75

8-pin SOIC, tube

8-pin SOIC, tape &

reel

P1819B

8-pin TSSOP, tube

8-pin TSSOP, tape

P1819B

and reel

P1819BF

P1819BG

8-pin SOIC, tube

Pb Free

Green

8-pin SOIC, tape &

reel

8-pin TSSOP, tube

8-pin TSSOP, tape

and reel

8-pin SOIC, tube

8-pin SOIC, tape &

P1819BG-08SR P1819BG

P1819BG-08TT P1819BG

P1819BG-08TR P1819BG

Green

reel

8-pin TSSOP, tube

Green

8-pin TSSOP, tape

Green

and reel

Products are available for industrial temperature range operation. Please contact factory for more information.

Note Book LCD Panel EMI Reduction IC

7 of 9

Notice: The information in this document is subject to change without notice.

November 2005

P1819

rev 1.7

Device Ordering Information

X

1

1819

2

X

3

X

4

-08

5

XX

6

1. Flow Prefix:

2. Device Number.

a. I = Industrial temperature range

3. Deviation (%) and spread option identifier.

4. Lead Free parts

(-40°C to 85°C).

5. Device pin count.

b. P = Commercial temperature range

6. Package Identifier.

(0°C to 70°C).

P 1 8 1 9 A F - 0 8 X X

SR - SOIC, T/R

TT – TSSOP, TUBE

TR - TSSOP, T/R

ST – SOIC, TUBE

Pin Count

F =Lead Free and and RoHS compliant part

G = Green

Deviation (%) and Spread option Identifier

DEVICE NUMBER

Flow:

P = Commercial Temperature Range (0°C to 70°C)

I = Industrial Temperature Range (-40°C to 85°C)

Licensed under US patent #5,488,627, #6,646,463 and #5,631,920.

Note Book LCD Panel EMI Reduction IC

8 of 9

Notice: The information in this document is subject to change without notice.

November 2005

rev 1.7

P1819

Alliance Semiconductor Corporation

2575 Augustine Drive,

Santa Clara, CA 95054

Tel# 408-855-4900

Preliminary Information

Part Number: P1819

Document Version: v1.7

Fax: 408-855-4999

www.alsc.com

Note: This product utilizes US Patent # 6,646,463 Impedance Emulator Patent issued to Alliance Semiconductor, dated 11-11-2003

trademarks or registered trademarks of Alliance. All other brand and product names may be the trademarks of their

respective companies. Alliance reserves the right to make changes to this document and its products at any time without

notice. Alliance assumes no responsibility for any errors that may appear in this document. The data contained herein

represents Alliance's best data and/or estimates at the time of issuance. Alliance reserves the right to change or correct this

data at any time, without notice. If the product described herein is under development, significant changes to these

specifications are possible. The information in this product data sheet is intended to be general descriptive information for

potential customers and users, and is not intended to operate as, or provide, any guarantee or warrantee to any user or

customer. Alliance does not assume any responsibility or liability arising out of the application or use of any product

described herein, and disclaims any express or implied warranties related to the sale and/or use of Alliance products

including liability or warranties related to fitness for a particular purpose, merchantability, or infringement of any intellectual

property rights, except as express agreed to in Alliance's Terms and Conditions of Sale (which are available from Alliance).

All sales of Alliance products are made exclusively according to Alliance's Terms and Conditions of Sale. The purchase of

products from Alliance does not convey a license under any patent rights, copyrights; mask works rights, trademarks, or any

other intellectual property rights of Alliance or third parties. Alliance does not authorize its products for use as critical

components in life-supporting systems where a malfunction or failure may reasonably be expected to result in significant

injury to the user, and the inclusion of Alliance products in such life-supporting systems implies that the manufacturer

assumes all risk of such use and agrees to indemnify Alliance against all claims arising from such use.

Note Book LCD Panel EMI Reduction IC

9 of 9

Notice: The information in this document is subject to change without notice.


型号：	P1819HF-08TT
厂家：	ALLIANCE SEMICONDUCTOR CORPORATION
描述：	Clock Generator, CMOS, PDSO8 光电二极管
文件：	总9页 (文件大小：369K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

P1819HF-08TT [ALSC]

相关型号：

P1819HG-08SR

P1819HG-08ST

P1819HG-08TR

P1819Q-08SR

P1819Q-08ST

P1819Q-08TR

P1819QF-08SR

P1819QF-08TR

P1819QF-08TT

P1819QG-08SR

P1819QG-08ST

P1819QG-08TR