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5AGTMB1G627C4N Arria V Device Handbook
Prototype PCB
Part No.:   5AGTMB1G627C4N
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Description:   Arria V Device Handbook
File Size :   1787 K    
Page : 82 Pages
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Maker   ALTERA [ ALTERA CORPORATION ]http://www.altera.com
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2–48
Chapter 2: Device Datasheet for Arria V Devices
Glossary
Glossary
lists the glossary for this chapter.
Table 2–48. Glossary Table (Part 1 of 4)
Letter
A
B
C
Receiver Input Waveforms
Single-Ended Waveform
Positive Channel (p) = V
IH
V
ID
Negative Channel (n) = V
IL
V
CM
Ground
Subject
Definitions
Differential Waveform
V
ID
p
-
n = 0V
V
ID
D
Differential I/O
Standards
Transmitter Output Waveforms
Single-Ended Waveform
Positive Channel (p) = V
OH
V
OD
Negative Channel (n) = V
OL
V
CM
Ground
Differential Waveform
V
OD
p
-
n = 0V
V
OD
E
f
HSCLK
F
f
HSDR
Left/right PLL input clock frequency.
High-speed I/O block—Maximum/minimum LVDS data transfer rate
(f
HSDR
= 1/TUI), non-DPA.
High-speed I/O block—Maximum/minimum LVDS data transfer rate
(f
HSDRDPA
= 1/TUI), DPA.
f
HSDRDPA
G
H
I
Arria V Device Handbook
Volume 1: Device Overview and Datasheet
February 2012 Altera Corporation
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