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5CSTD6 Cyclone V Device Handbook
Prototype PCB
Part No.:   5CSTD6
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Description:   Cyclone V Device Handbook
File Size :   1776 K    
Page : 74 Pages
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Maker   ALTERA [ ALTERA CORPORATION ]http://www.altera.com
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Chapter 1: Overview for Cyclone V Device Family
Cyclone V Family Plan
1–7
lists the Cyclone V SE, SX, and ST package plan that shows the FPGA GPIO
and HPS I/O counts, the maximum number of transceivers available, and the vertical
migration capability for each device package and density.
Table 1–7. Package Plan for Cyclone V SE, SX, and ST Devices—Preliminary
Device
GPIO
5CSEA2
5CSEA4
5CSEA5
5CSEA6
5CSXC4
5CSXC5
5CSXC6
5CSTD5
5CSTD6
Notes to
(1) The arrows indicate the package vertical migration capability. You can also migrate your design across device densities in the same packaging
option if the devices have the same dedicated pins, configuration pins, and power pins.
(2) The transceiver counts listed are for 3-Gbps transceivers.
(3) The transceiver counts listed are for 5-Gbps transceivers.
U484
(19 mm)
XCVR
HPS I/O
161
161
161
161
GPIO
124
124
124
124
124
124
124
66
66
66
66
U672
(23 mm)
XCVR
6
6
6
HPS I/O
188
188
188
188
188
188
188
GPIO
288
288
288
288
288
288
F896
(31 mm)
XCVR
9
9
9
9
HPS I/O
188
188
188
188
188
188
1
To verify the pin migration compatibility, use the Pin Migration View window in the
Quartus II software Pin Planner.
f
For more information about the verifying the pin migration compatibility, refer to the
chapter in the
Quartus II Handbook.
February 2012
Altera Corporation
Cyclone V Device Handbook
Volume 1: Device Overview and Datasheet
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