Electronic Components Datasheet Search
English 中文版
Manufacturer Upload
Part Name:
 
Description:
FFP-CM3150E0  FFPF10UP30ST  FFP-CW3150E0  FFP-CW3245E1  FFP-CM3145F1  FFP-C13245  FFP-C55250  FFP-CW3145G0  FFP-CW3245E0  FFP-C15145  
CLK11_4P Cyclone III Device Handbook
Prototype PCB
Part No.:   CLK11_4P
Download: Download   Right selection Save Target As
View Datasheet (Html)   No need to install PDF reader software
Description:   Cyclone III Device Handbook
File Size :   7302 K    
Page : 274 Pages
Logo:   
Maker   ALTERA [ ALTERA CORPORATION ]http://www.altera.com
Buy Now :   
  CLK11_4P Datasheet PDF page 119 CLK11_4P Datasheet PDF page 120 CLK11_4P Datasheet PDF page 121 CLK11_4P Datasheet PDF page 122 CLK11_4P Datasheet PDF page 124 CLK11_4P Datasheet PDF page 125 CLK11_4P Datasheet PDF page 126 CLK11_4P Datasheet PDF page 127  
100%
7. High-Speed Differential Interfaces in
the Cyclone III Device Family
December 2011
CIII51008-4.0
CIII51008-4.0
This chapter describes the high-speed differential I/O features and resources in the
Cyclone III device family.
High-speed differential I/O standards have become popular in high-speed interfaces
because of their significant advantages over single-ended I/O standards. The Altera
®
Cyclone
®
III device family (Cyclone III and Cyclone III LS devices) supports LVDS,
BLVDS, reduced swing differential signaling (RSDS), mini-LVDS, and point-to-point
differential signaling (PPDS).
This chapter contains the following sections:
High-Speed I/O Interface
Cyclone III device family I/Os are separated into eight I/O banks, as shown in
Each bank has an independent power supply. True output drivers for
LVDS, RSDS, mini-LVDS, and PPDS are on the left and right I/O banks. These I/O
standards are also supported on the top and bottom I/O banks using external
resistors. On the left and right I/O banks, some of the differential pin pairs (p and
n
pins) of the true output drivers are not located on adjacent pins. In these cases, a
power pin is located between the
p
and
n
pins. These I/O standards are also
supported on all I/O banks using two single-ended output with the second output
programmed as inverted, and an external resistor network. True input buffers for
these I/O standards are supported on all I/O banks.
f
For more information about the location of Cyclone III device family true differential
pins, refer to the
webpage on the Altera website.
© 2011 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos
are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at
Altera warrants performance of its
semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and
services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service
described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying
on any published information and before placing orders for products or services.
Cyclone III Device Handbook
Volume 1
December 2011
Home - IC Supply - Link
Copyright© 2001 - 2014 ICPDF All Rights Reserved ICPDF.COM

粤公网安备 44030402000629号


粤ICP备13051289号-7