AM79R79-4JC_技术文档

Am79R79

Ringing Subscriber Line Interface Circuit

DISTINCTIVE CHARACTERISTICS

I Ideal for short-loop applications

I Programmable constant-current feed

I Programmable Open Circuit voltage

I Programmable loop-detect threshold

I Current gain = 1000

I Ideal for ISDN terminal adaptor and fixed radio

access applications

I On-chip ringing with on-chip ring-trip detector

I Low standby state power

I Battery operation:

I Ground-key detector

I Tip Open state for ground-start lines

I Polarity reversal option available

— V_BAT1: –40.5 V to –75 V

— V_BAT2: –19 V to V_BAT1

I Internal V_EEregulator (no external –5 V power

supply required)

I On-chip battery switching and feed selection

I On-hook transmission

I Two on-chip relay drivers and snubber circuits

(32 PLCC)

I Two-wire impedance set by single external

impedance

BLOCK DIAGRAM

Relay

RYOUT2

RYE

Driver

RTRIP1

RTRIP2

Relay

Driver

RYOUT1

D1

D2

C1

C2

C3

E1

A(TIP)

Ring-Trip

Detector

Input Decoder

and Control

Ground-Key

Detector

HPA

Two-Wire

Interface

Off-Hook

Detector

DET

HPB

RD

VTX

RSN

Signal

Transmission

B(RING)

RINGIN

RDC

Power-Feed

Controller

RDCR

VBAT2

VBAT1

RSGL

RSGH

B2EN

Switch

Driver

VCC VNEG BGND AGND/DGND

Publication# 19752 Rev: G Amendment: /0

Issue Date: October 1999

GENERAL DESCRIPTION

The AMD family of subscriber line interface circuit

(SLIC) products provide the telephone interface func-

tions required throughout the worldwide market. AMD

SLIC devices address all major telephony markets in-

cluding central office (CO), private branch exchange

(PBX), digital loop carrier (DLC), fiber-in-the-loop

(FITL), radio-in-the-loop (RITL), hybrid fiber coax

(HFC), and video telephony applications.

would be ISDN terminal adaptors, fiber-in-the-loop, ra-

dio-in-the-loop, hybrid fiber/coax and video telephony

(home-side) boxes. The Am79R79 Ringing SLIC can

provide sufficient voltage to meet the stringent LSSGR

five-ringer equivalent specification. Using a CMOS-

compatible input waveform and wave shaping R-C net-

work, the Am79R79 Ringing SLIC can provide trapezoi-

dal wave ringing to meet various design requirements.

The AMD SLIC devices offer support of BORSHT (bat-

tery feed, overvoltage protection, ringing, supervision,

hybrid, and test) functions with features including cur-

rent limiting, on-hook transmission, polarity reversal, Tip

Open, and loop-current detection. These features allow

reduction of linecard cost by minimizing component

count, conserving board space, and supporting auto-

mated manufacturing.

In order to further enhance the suitability of this device

in short-loop, distributed switching applications, AMD

has maximized power savings by incorporating battery

switching on chip. The Am79R79 Ringing SLIC device

switches between two battery supplies such that in the

off-hook (active) state, a low battery is used to save

power. In order to meet the Open Circuit voltage require-

ments of fax machines and maintenance termination

units (MTU), the SLIC automatically switches to a higher

voltage in the on-hook (standby) state.

The AMD SLIC devices provide the two- to four-wire hy-

brid function, DC-loop feed, and two-wire supervision.

Two-wire termination is programmed by a scaled imped-

ance network. Transhybrid balance can be achieved with

an external balance circuit or simply programmed using

a companion AMD codec device, the Am79C02/03/031

DSLAC™ device, the Am79Q02/021/03 Programmable

QuadSLAC(QSLAC™)device,ortheAm79Q5457/4457

Nonprogrammable QSLAC device.

Like all of the AMD SLIC devices, the Am79R79 Ringing

SLIC device supports on-hook transmission, ring-trip

detection, programmable loop-detect threshold, and is

available with on-chip polarity reversal. The Am79R79

Ringing SLIC device is a programmable constant-cur-

rentfeeddevicewith twoon-chip relaydriverstooperate

external relays. Several performance grades are avail-

able to meet both CCITT and LSSGR requirements,

including various longitudinal balance options. This

unique device is available in the proven AMD 75 V bi-

polar process in the 32-pin PLCC package.

The Am79R79 Ringing SLIC device is a bipolar mono-

lithic SLIC that offers on-chip ringing. Now designers

can achieve significant cost reductions at the system

level for short-loop applications by integrating the ring-

ing function on chip. Examples of such applications

2

Am79R79 Data Sheet

ORDERING INFORMATION

Standard Products

AMD standard products are available in several packages and operating ranges. The order number (Valid Com-

bination) is formed by a combination of the elements below

Am79R79

–1

J

C

TEMPERATURE RANGE

C = Commercial (0°C to 70°C)*

PACKAGE TYPE

J = 32-pin Plastic Leaded Chip Carrier (PL 032)

PERFORMANCE GRADE OPTION

–1 = 52 dB Longitudinal Balance, Polarity Reversal

–2 = 63 dB Longitudinal Balance, Polarity Reversal

–3 = 52 dB Longitudinal Balance, No Polarity Reversal

–4 = 63 dB Longitudinal Balance, No Polarity Reversal

DEVICE NUMBER/DESCRIPTION

Am79R79

Ringing Subscriber Line Interface Circuit

Valid Combinations

Valid Combinations list configurations planned to

be supported in volume for this device. Consult

the local AMD sales office to confirm availability of

specific valid combinations, to check on newly

released combinations, and to obtain additional

data on AMD’s standard military grade products.

–1

–2

–3

Am79R79

JC

–4

Note:

* Functionality of the device from 0°C to +70°C is guaranteed by production testing. Performance from –40°C to +85°C is

guaranteed by characterization and periodic sampling of production units.

SLIC Products

3

CONNECTION DIAGRAM

Top View

32-Pin PLCC

4

3

2

1

32 31 30

RYE

5

RTRIP1

RTRIP2

HPB

29

28

27

26

25

RYOUT1

B2EN

6

7

8

9

VBAT1

HPA

D1

RINGIN

E1

C3

RDCR

VTX

10

11

12

13

24

23

22

21

VNEG

RSN

C2

DET

14 15 16 17 18 19 20

Notes:

1. Pin 1 is marked for orientation.

2. NC = No connect

4

Am79R79 Data Sheet

PIN DESCRIPTIONS

Pin Names

AGND/DGND

A(TIP)

Type

Gnd

Description

Analog and Digital ground

Output

Input

Output of A(TIP) power amplifier

B2EN

VBAT2 Enable. Logic Low enables operation from V_BAT2. Logic High enables operation

from V_BAT1. TTL compatible.

BGND

B(RING)

C3–C1

D1

Gnd

Battery (power) ground

Output

Input

Output

Output of B(RING) power amplifier

Decoder. TTL compatible. C3 is MSB and C1 is LSB.

Relay1 Control. TTL compatible. Logic Low activates the Relay1 relay driver.

(Option) Relay2 Control. TTL compatible. Logic Low activates the Relay2 relay driver.

D2

DET

Switchhook Detector. Logic Low indicates that the selected detector is tripped. Logic inputs

C3–C1 and E1 select the detector. Open-collector with a built-in 15 kΩ pull-up resistor.

E1

Input

(Option) Ground-Key Enable. A logic High selects the off-hook detector. A logic Low selects

the ground-key detector. TTL compatible.

HPA

HPB

RD

Capacitor

Resistor

High-pass filter capacitor. A(TIP) side of high-pass filter capacitor.

High-pass filter capacitor. B(RING) side of high-pass filter capacitor.

Detector resistor. Detector threshold set and filter pin.

RDC

DC feed resistor. Connection point for the DC feed current programming network, which

also connects to the receiver summing node (RSN). V_RDCis negative for normal polarity

and positive for reverse polarity.

RDCR

—

Connection point for feedback during ringing.

RINGIN

Input

Ring Signal Input. Pin for ring signal input. Square-wave shaped by external RC filter.

Requires 50% duty cycle. CMOS-compatible input.

RSGH

RSGL

RSN

Input

Saturation Guard High. Pin for resistor to adjust Open Circuit voltage when operating from

V_BAT1

Saturation Guard Low. Pin for resistor to adjust the anti-saturation cut-in voltage when

operating from both V_{BAT1 and}V_BAT2

.

Receive Summing Node. The metallic current (AC and DC) between A(TIP) and B(RING)

is equal to 1000 x the current into this pin. The networks that program receive gain, two-wire

impedance, and feed resistance all connect to this node.

RTRIP1

RTRIP2

Input

Ring-trip detector. Ring-trip detector threshold set and filter pin.

Ring-trip detector. Ring-trip detector threshold offset (switch to V_BAT1). For power

conservation in any nonringing state, this switch is open.

RYE

Output

Common Emitter of RYOUT1/RYOUT2. Emitter output of RYOUT1 and RYOUT2. Normally

connected to relay ground.

RYOUT1

RYOUT2

VBAT1

VBAT2

VCC

Output

Battery

Power

Output

Relay/switch driver. Open-collector driver with emitter internally connected to RYE.

(Option) Relay/switch driver. Open-collector driver emitter internally connected to RYE.

Battery supply and connection to substrate.

Power supply to output amplifiers. Connect to off-hook battery through a diode.

Positive analog power supply.

VNEG

VTX

Negative analog power supply. This pin is the return for the intern VEE regulator.

Transmit Audio. This output is 0.5066 gain version of the A(TIP) and B(RING) metallic

voltage. VTX also sources the two-wire input impedance programming network.

SLIC Products

5

ABSOLUTE MAXIMUM RATINGS

OPERATING RANGES

Storage temperature ......................... –55°C to +150°C

Commercial (C) Devices

V

_CCwith respect to AGND/DGND .......... 0.4 V to +7 V

_NEGwith respect to AGND/DGND ...... 0.4 V to V_BAT2

Ambient temperature............................. 0°C to +70°C*

V

V_CC.....................................................4.75 V to 5.25 V

V_BAT2....................................................V_BAT1to GND

V_BAT1with respect to AGND/DGND:

V

_NEG..................................................–4.75 V to V_BAT2

V_BAT1.................................................–40.5 V to –75 V

V_BAT2....................................................–19 V to V_BAT1

AGND/DGND.......................................................... 0 V

Continuous..................................... +0.4 V to –80 V

10 ms............................................. +0.4 V to –85 V

BGND with respect to AGND/DGND........ +3 V to –3 V

BGND with respect to

A(TIP) or B(RING) to BGND:

AGND/DGND ........................–100 mV to +100 mV

Continuous ...............................V_BAT1–5 V to +1 V

10 ms (f = 0.1 Hz) ..................V_BAT1–10 V to +5 V

1 µs (f = 0.1 Hz) .....................V_BAT1–15 V to +8 V

250 ns (f = 0.1 Hz) ...............V_BAT1–20 V to +12 V

Load resistance on VTX to ground.............. 20 kΩ min

The Operating Ranges define those limits between which the

functionality of the device is guaranteed.

* Functionality of the device from 0°C to +70°C is guaranteed

by production testing. Performance from –40°C to +85°C is

guaranteed by characterization and periodic sampling of

production units.

Current from A(TIP) or B(RING)..................... 150 mA

RYOUT1, RYOUT2 current................................75 mA

RYOUT1, RYOUT2 voltage ..................... RYE to +7 V

RYOUT1, RYOUT2 transient ................. RYE to +10 V

RYE voltage ........................................ BGND to V_BAT1

C3–C1, D2–D1, E1, B2EN, and RINGIN

Input voltage .........................–0.4 V to V_CC+ 0.4 V

Maximum power dissipation, continuous,

T_A= 85°C, No heat sink (See note):

In 32-pin PLCC package..............................1.33 W

Thermal data: ................................................................ θ_JA

In 32-pin PLCC package.......................45°C/W typ

Note: Thermal limiting circuitry on chip will shut down the

circuit at a junction temperature of about 165°C. The device

shouldneverseethistemperatureandoperationabove145°C

junction temperature may degrade device reliability. See the

SLIC Packaging Considerations for more information.

Stressesabove thoselistedunderAbsoluteMaximumRatings

may cause permanent device failure. Functionality at or above

these limits is not implied. Exposure to Absolute Maximum

Ratings for extended periods may affect device reliability.

6

Am79R79 Data Sheet

ELECTRICAL CHARACTERISTICS

Description

Transmission Performance

2-wire return loss

Test Conditions (See Note 1)

Min

Typ

3

Max

Unit

Note

200 Hz to 3.4 kHz (Test Circuit D)

26

dB

1, 4, 6

4

Z_VTX, analog output impedance

V_VTX, analog output offset voltage

20

+35

+40

20

Ω

0°C to +70°C

–35

–40

mV

–40°C to +85°C

4

Z_RSN, analog input impedance

1

Ω

Overload level, 2-wire and 4-wire,

off hook

Active state

2.5

Vpk

2a

Overload level, 2-wire

On hook, R_LAC= 600 Ω

+3 dBm, BAT2 = –24 V

0.88

Vrms

dB

2b

5

THD (Total Harmonic Distortion)

THD, on hook, OHT state

–64

–50

–40

0 dBm, R_LAC= 600 Ω

BAT1 = –75 V

Longitudinal Performance (See Test Circuit C)

Longitudinal to metallic

L-T, L-4 balance

200 Hz to 1 kHz

–1, –3*

–2, –4

–2

52

63

54

normal polarity

reverse polarity

normal polarity,

–40°C to +85°C

–2, –4

–1, –3*

–2, –4

–2

58

52

58

54

4

1 kHz to 3.4 kHz

normal polarity

reverse polarity

dB

normal polarity,

–40°C to +85°C

–2, –4

54

42

12

4

Longitudinal signal generation 4-L

Longitudinal current per pin (A or B)

Longitudinal impedance at A or B

Idle Channel Noise

200 Hz to 800 Hz normal polarity

Active or OHT state

28

25

mArms

0 to 100 Hz, T_A= +25°C

Ω/pin

C-message weighted noise

0°C to +70°C

–40°C to +85°C

0°C to +70°C

+7

+11

+12

–79

–78

dBrnC

dBmp

Psophometric weighted noise

–83

4

3

–40°C to +85°C

Insertion Loss and Four- to Four-Wire Balance Return Signal (See Test Circuits A and B)

Gain accuracy

4- to 2-wire

2- to 4-wire and

4- to 4-wire

0 dBm, 1 kHz

–0.20

0

+0.20

–6.22 –6.02 –5.82

Gain accuracy

4- to 2-wire

OHT state, on hook

–0.35

0

+0.35

2- to 4-wire and

4- to 4-wire

–6.37 –6.02 –5.77

Gain accuracy over frequency

Gain tracking

300 to 3400 Hz

0°C to +70°C

–0.10

–0.15

–0.10

–0.15

–0.10

–0.15

–0.35

+0.10

+0.15

+0.10

+0.15

+0.10

+0.15

+0.35

dB

relative to 1 kHz –40°C to +85°C

+3 dBm to –55 dBm 0°C to +70°C

relative to 0 dBm –40°C to +85°C

0 dBm to –37 dBm 0°C to +70°C

–40°C to +85°C

3, 4

Gain tracking

OHT state, on hook

+3 dBm to 0 dBm

3

Group delay

0 dBm, 1 kHz

3

µs

1, 4, 6

Note:

* Performance Grade

SLIC Products

7

ELECTRICAL CHARACTERISTICS (continued)

Description

Line Characteristics

Test Conditions (See Note 1)

Min

Typ

Max

Unit

Note

I_L, Loop-current accuracy

I_L, Long loops, Active state

I_Lin constant-current region, B2EN = 0 0.915I_L

I_L

1.085I_L

R_LDC= 600 Ω, RSGL = open

R_LDC= 750 Ω, RSGL = short

20

21.7

I_L, Accuracy, Standby state

0.8I_L

I_L

1.2I_L

V_BAT1– 10V

I_L= ------------------------------------

R_L+ 400

mA

I_L= constant-current region

T_A= 25°C

18

27

39

–40°C to +85°C

Active, A and B to ground

OHT, A and B to ground

R_L= 0

27

55

4

I_LLIM

110

I_L, Loop current, Open Circuit state

I_A, Pin A leakage, Tip Open state

I_B, Pin B current, Tip Open state

VA, Standby, ground-start signaling

100

µA

R_L= 0

B to ground

34

mA

A to –48 V = 7 kΩ,

B to ground = 100 Ω

–7.5

–5

4

8

V

V_AB, Open Circuit voltage

42.8

Power Supply Rejection Ratio (V_RIPPLE= 100 mVrms), Active Normal State

V_CC

50 Hz to 3400 Hz

33

30

50

40

50

V_NEG

dB

5

V_BAT1

V_BAT2

Power Dissipation

On hook, Open Circuit state

On hook, Standby state

On hook, OHT state

On hook, Active state

Off hook, Standby state

Off hook, OHT state

Off hook, Active state

Supply Currents

V_BAT1

48

55

100

80

V_BAT2

10

V_BAT1

200

220

2000

550

300

350

2800

2200

750

V_BAT1

mW

V_BAT1or V_BAT2

V_BAT1

R_L= 300 Ω

V_BAT2

I_CC

,

Open Circuit state

Standby state

3.0

3.2

6.2

6.5

0.1

0.7

0.45

0.6

2.0

2.7

4.5

5.5

8.0

9.0

0.2

1.1

1.0

1.5

4.0

5.0

On-hook V_CCsupply current

OHT state

Active state–normal

Open Circuit state

Standby state

I_NEG

,

On-hook V_NEGsupply current

mA

OHT state

Active state–normal

Open Circuit state

Standby state

I_BAT

,

On-hook V_BATsupply current

OHT state

Active state–normal

8

Am79R79 Data Sheet

ELECTRICAL CHARACTERISTICS (continued)

Description

Logic Inputs (C3–C1, D2–D1, E1, and B2EN)

V_IH, Input High voltage

Test Conditions (See Note 1)

Min

Typ

Max

Unit

Note

2.0

V

V_IL, Input Low voltage

0.8

40

I_IH, Input High current

–75

µA

I_IL, Input Low current

–400

Logic Output DET

V_OL, Output Low voltage

V_OH, Output High voltage

Ring-Trip Detector Input

Ring detect accuracy

I_OUT= 0.8 mA, 15 kΩ to V_CC

0.40

+10

V

I_OUT= –0.1 mA, 15 kΩ to V_CC

2.4

–10

%

BAT1 – 1





IRTD = --------------------------- + 24 µA • 335





RRT1

Ring Signal

V_AB, Ringing

Bat1 = –75 V, ringload = 1570 Ω

V_RINGIN= 2.5 V

66

69

0

Vpk

V

7

V_ABRinging offset

–10

150

10

∆V_AB/∆V_RINGIN(RINGIN gain)

Ground-Key Detector Thresholds

Ground-key resistive threshold

Ground-key current threshold

Loop Detector

180

210

B to ground

2

5

10

kΩ

11

mA

R_LTH, Loop-resistance detect threshold Active, V_BAT1

–20

–12

20

12

Active, V_BAT2

Standby

%

9

4

Relay Driver Output (RELAY1 and 2)

V_OL, On voltage (each output)

I_OH, Off leakage (each output)

Zener breakover (each output)

Zener on voltage (each output)

I_OL= 30 mA

I_OL= 40 mA

V_OH= +5 V

I_Z= 100 µA

I_Z= 30 mA

+0.25

+0.30

+0.4

+0.8

100

V

µA

V

6.6

7.9

11

RELAY DRIVER SCHEMATIC

RYOUT2

RYOUT1

RYE

BGND

SLIC Products

9

Notes:

1. Unless otherwise noted, test conditions are BAT1 = –75 V, BAT2 = –24 V, V_CC= +5 V, V_NEG= –5 V, R_L= 600 Ω,

R_DC1= 80 kΩ, R_DC2= 20 kΩ, R_D= 75 kΩ, no fuse resistors, C_HP= 0.018 µF, C_DC= 1.2 µF, D₁= D₂= 1N400x,

two-wire AC input impedance (ZSL) is a 600 Ω resistance synthesized by the programming network shown below.

R_SGL= open, R_SGH= open, R_DCR= 2 kΩ, R_RT1= 430 kΩ, R_RT2= 12 kΩ, C_RT= 1.5 µF, R_SLEW= 100 kΩ, C_SLEW= 0.33 µF.

VTX

RT1 = 150 kΩ

CT1 = 60 pF

RT2 = 150 kΩ

RSN

~

RRX = 300 kΩ

V_RX

2. a. Overload level is defined when THD = 1%.

b. Overload level is defined when THD = 1.5%.

3. Balance return signal is the signal generated at V_TXby V_RX. This specification assumes that the two-wire AC load impedance

matches the programmed impedance.

4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.

5. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.

6. Group delay can be greatly reduced by using a Z_Tnetwork such as that shown in Note 1 above. The network reduces the

groupdelaytolessthan2µsandincreases2WRL.Theeffectofgroupdelayonlinecardperformancemayalsobecompensated

for by synthesizing complex impedance with the QSLAC or DSLAC device.

7. 70 Vpk provides 50 Vrms with a crest factor of 1.25 to a load of 1400 Ω with 2 • Rf = 100, and Rline = 70 Ω (1570 Ω).

8. Open Circuit V_ABcan be modified using RSGH.

9. R_Dmust be greater than 56 kΩ. Refer to Table 2 for typical value of R_LTH

.

10. Lower power is achieved by switching into low-battery state in standby. Standby loop current is returned to V_BAT1regardless

of the battery selected.

Table 1. SLIC Decoding

(DET) Output

State

C3 C2 C1

2-Wire Status

Open Circuit

E1 = 1

Ring trip

E1 = 0

Ring trip

Battery Selection

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

Ringing

Ring trip

B2EN

2

Active

Loop detector

Ground key

3

On-hook TX (OHT)

Tip Open

4

B2EN = 1**

V_BAT1

5

Standby

6*

7*

Active Polarity Reversal

OHT Polarity Reversal

B2EN

Notes:

* Only –1 and –2 performance grade devices support polarity reversal.

** For correct ground-start operation using Tip Open, V_BAT1on-hook battery must be used.

10

Am79R79 Data Sheet

Table 2. User-Programmable Components

Z_Tis connected between the VTX and RSN pins. The fuse resistors are

Z_T= 500(Z_2WIN– 2R_F)

R_F, and Z_2WINis the desired 2-wire AC input impedance. When com-

puting Z_T, the internal current amplifier pole and any external stray ca-

pacitance between VTX and RSN must be taken into account.

Z_RXis connected from V_RXto R_SN. Z_Tis defined above, and G_42Lis the

desired receive gain.

Z_L

1000 • Z_T

Z_RX= ----------- • --------------------------------------------------

G_42LZ_T+ 500(Z_L+ 2R_F)

R_DC1, R_DC2, and C_DCform the network connected to the RDC pin.

2500

R_DC1+ R_DC2= --------------

I_LOOPis the desired loop current in the constant-current region.

I_LOOP

R_DCR1, R_DCR2, and C_DCRform the network connected to the RDCR pin.

See Applications Circuit for these components.

3000

R_DCR1+ R_DCR2= ---------------------

Iringlim

R_DC1+ R_DC2

C_DC= 19 ms • ---------------------------------

R

_DC1R_DC2

C_DCRsets the ringing time constant, which can be between 15 µs and

150 µs.

R_DCR1+ R_DCR2

C_DCR= ---------------------------------------- • 150 µs

R

_DCR1R_DCR2

R_Dis the resistor connected from the RD pin to GND and R_LTHis the

loop-resistance threshold between on-hook and off-hook detection. R_D

should be greater than 56 kΩ to guarantee detection occurs in the

Standby state. Choose the value of R_Dfor high battery state; then use

the equation for R_LTHto find where the threshold is for low battery.

R_D= R_LTH• 12.67 for high battery state

Loop-Threshold Detect Equations

This is the same equation as for R_Dabove, except solved for R_LTH

.

R_D

R_LTH= ------------ for high battery

12.67

For low battery, the detect threshold is slightly higher, which avoids os-

cillating between states.

R_D

R_LTH= ------------ for low battery

11.37

R_LTHstandby < R_LTHactive V_BAT1< R_LTHactive V_BAT2, which guaran-

tees no unstable states under all operating conditions. This equation

shows at what resistance the standby threshold is; it is actually a cur-

rent threshold rather than a resistance threshold, which is shown by the

Vbat dependency.

V_BAT1–10

R_LTH= ----------------------------- • R _D– 400 – 2R_F

915

SLIC Products

11

DC FEED CHARACTERISTICS

50

5) V

APPH

High Battery Anti-Sat

4) V

ASH

40

V

AB

(Volts)

30

20

1) Constant-Current Region

3) V

APPL

Low Battery Anti-Sat

2) V

ASL

10

0

30

I (mA)

L

Figure 1. Typical V_ABvs. I_LDC Feed Characteristics

R_DC= R_DC1+ R_DC2= 20 kΩ + 80 kΩ = 100 kΩ

(V_BAT1= –75 V,V_BAT2= –24 V)

Notes:

2500

1. Constant-current region: V_AB= I_LR_L= ------------R_L; where R_L= R_L+ 2R_F,

RDC

1000 • (104 • 10³+ R_SGL

)

2. Low battery

V_ASL= ----------------------------------------------------------------- ; where R_SGL= resistor to GND, B2EN = logic Low.

6720 • 10³+ (80 • R_SGL

)

1000 • (R_SGL– 56 • 10³)

Anti-sat region:

3.

V_ASL= -------------------------------------------------------------- ; where R_SGL= resistor to V_CC, B2EN = logic Low.

6720 • 10³+ (80 • R_SGL

)

R_SGLto V_CCmust be greater than 100 kΩ.

V_APPL= 4.17 + V_ASL

V_APPL

I_LOOPL= ------------------------------------------------------------------------------

(R_DC1+ R_DC2

)

-------------------------------------- + 2 R _F+ R_LOOP

600

4. High battery

Anti-sat region:

V_ASH= V_ASHH+ V_ASL

1000 • (70 • 10³+ R_SGH

)

V_ASHH= ---------------------------------------------------------------------- ; where R_SGH= resistor to GND, B2EN = logic High.

1934 • 10³+ (31.75 • R_SGH

)

1000 • (R_SGH+ 2.75 • 10³)

V_ASHH= ---------------------------------------------------------------------- ; where R_SGH= resistor to V_CC, B2EN = logic High.

1934 • 10³+ (31.75 • R_SGH

)

R_SGHto V_CCmust be greater than 100 kΩ.

5.

V_APPH= 4.17 + V_ASH

V_APPH

I_LOOPH= ------------------------------------------------------------------------------

(R_DC1+ R_DC2

)

-------------------------------------- + 2 R _F+ R_LOOP

600

12

Am79R79 Data Sheet

RING-TRIP COMPONENTS

R_RT2= 12 kΩ

C_RT= 1.5 µF

V_BAT1

R_RT1= 320 • CF • ------------------------------------------------------------------------------------------------------------------------------------- • (R_LRT+ 150 + 2R_F)

Vbat – 5 – (24 µA • 320 • CF • (R_LRT+ 150 + 2R_F))

where R_LRT= Loop-detection threshold resistance for ring trip and CF = Crest factor of ringing signal (≈ 1.25)

R_SLEW, C_SLEW

Ring waveform rise time ≈ 0.214 • (R_SLEW• C_SLEW) ≈ tr.

For a 1.25 crest factor @ 20 Hz, tr ≈ 10 mS.

∴ (R_SLEW= 150 kΩ, C_SLEW= 0.33 µF.)

C_SLEWshould be changed if a different crest factor is desired.

Ringing Reference

(Input to R_SLEW

)

0

B(RING)

A(TIP)

Battery

This is the best time for

switching between Ringing

and other states for minimizing

detect switching transients.

Figure 2. Ringing Waveforms

A

a

b

RSN

R_L

I_L

SLIC

R_DC2

C_DC

R_DC1

B

RDC

Feed current programmed by R_DC1and R_DC2

Figure 3. Feed Programming

SLIC Products

13

TEST CIRCUITS

A(TIP)

VTX

R_L

2

SLIC

V_AB

V_L

R_T

AGND

R_L

2

R_RX

B(RING)

RSN

I_L2-4= 20 log (V_TX/ V_AB

)

A. Two- to Four-Wire Insertion Loss

A(TIP)

VTX

SLIC

V_AB

R_L

R_T

AGND

R_RX

B(RING)

RSN

V_RX

I_L4-2= 20 log (V_AB/ V_RX

)

BRS = 20 log (V_TX/ V_RX

)

B. Four- to Two-Wire Insertion Loss and Four- to Four-Wire Balance Return Signal

A(TIP)

1

VTX

<< R_L

ωC

R_L

SLIC

2

S1

V_L

C

V_L

R_T

V_AB

AGND

R_L

R_RX

S2

2

B(RING)

RSN

V_RX

S2 Open, S1 Closed

S2 Closed, S1 Open

4-L Long. Sig. Gen. = 20 log (V_L/ V_RX

L-T Long. Bal. = –20 log (V_AB/ V_L)

L-4 Long. Bal. = –20 log (V_TX/ V_L)

)

C. Longitudinal Balance

Am79R79 Data Sheet

14

TEST CIRCUITS (continued)

Z_D

A(TIP)

VTX

R_T1

R

SLIC

V_S

V_M

AGND

RSN

R

Z_IN

C_T1

R_T2

B(RING)

R_RX

: The desired impedance;

Z_D

e.g., the characteristic impedance of the line

Return loss = –20 log (2 V_M/ V_S)

D. Two-Wire Return Loss Test Circuit

V_CC

6.2 kΩ

A(TIP)

DET

B(RING)

R_L= 600 Ω

15 pF

RG

E1

B(RING)

E. Loop-Detector Switching

F. Ground-Key Switching

RF₁

C₁

L₁

200 Ω

50 Ω

A

C_AX

33 nF

RF₂

50 Ω

B

HF

GEN

C_BX

33 nF

VTX

C₂

L₂

50 Ω

SLIC

under test

1.5 Vrms

80% Amplitude

Modulated

100 kHz to 30 MHz

G. RFI Test Circuit

SLIC Products

15

TEST CIRCUITS (continued)

+5 V

–5 V

VCC

RTRIP1

RTRIP2

VNEG

R_RT2

12 kΩ

R_RT1

430 kΩ

C_RT

1.5 µF

R_D

75 kΩ

R_SGH

open

R_SGL

open

RD

C_AX

2.2 nF

RSGH

RSGL

VTX

A(TIP)

HPA

V_TX

R_T

R_RX

C_HP

18 nF

300 kΩ

HPB

B(RING)

V_RX

RSN

B(RING)

Note:

R_DC2

80 kΩ

R_DC1

20 kΩ

C_BX

2.2 nF

Refer to Applications Circuit for

recommended configuration.

RDC

R_DCR

RYOUT1

RYOUT2

RYE

RDCR

2.0 kΩ

C_DC

1.2 µF

B2EN

C1

D₁

C2

BAT1

BAT2

VBAT1

VBAT2

C3

0.1 µF

D₂

D1

D2

E1

0.1 µF

R_SLEW

100 kΩ

DET

BGND

See note below.

RINGIN

C_SLEW

0.33 µF

AGND/

DGND

BATTERY

GROUND

ANALOG

GROUND

Note:

The input should be 50% duty cycle CMOS-compatible input.

DIGITAL

GROUND

H. Am79R79 Test Circuit

16

Am79R79 Data Sheet

APPLICATION CIRCUIT

+5 V

–5 V

VCC

RTRIP1

RTRIP2

VNEG

R_RT2

R_RT1

C_RT

12 kΩ

1.5 µF

R_D

66 kΩ

R_SGH

open

515 kΩ

RD

R_SGL

open

C_AX= 2.2 nF

RSGH

RSGL

VTX

R_FA= 50 Ω

TIP

A(TIP)

HPA

V_TX

K1

G

K1

R_T1

125 kΩ

R_RX

250 kΩ

Bat1

A

TISP

C_HP

18 nF

C_T

R_T2

61089

V_RX

HPB

RSN

K2

R_DC2

50 kΩ

R_DC1

50 kΩ

B(RING)

RING

R_FB= 50 Ω

C_BX= 2.2 nF

RDC

R_DCR2

15 kΩ

C_DC

820 nF

C_DCR

R_DCR1

RYOUT1

RYOUT2

RYE

RDCR

15 kΩ

10 nF

B2EN

C1

D₁

C2

BAT1

BAT2

VBAT1

VBAT2

C3

0.1 µF

D₂

D1

D2

E1

0.1 µF

R_SLEW

DET

150 kΩ

BGND

See Note.

RINGIN

C_SLEW

0.33 µF

BATTERY

GROUND

AGND/

DGND

ANALOG

GROUND

Assumptions:

1. 1.25 CF

2. 25 mA I_LOOP

4. 5.2 kΩ High Battery Loop Threshold

5. 925 Ω Ringing Loop Threshold

6. 600 Ω Two-wire Impedance,

600 Ω Z_L

7. G_42L= 1

8. –70 V Vbat1, –24 V Vbat2

3. 100 mA Ringing Current Limit

DIGITAL

GROUND

Note:

The input should be 50% duty cycle CMOS-compatible input.

I. Application Circuit

SLIC Products

17

PHYSICAL DIMENSION

PL032

.485

.495

.447

.453

.009

.015

.042

.056

.125

.140

.585

.595

Pin 1 I.D.

.080

.095

.547

.553

SEATING

PLANE

.400

REF.

.490

.530

.013

.021

.050 REF.

16-038FPO-5

PL 032

DA79

.026

.032

TOP VIEW

SIDE VIEW

6-28-94 ae

REVISION SUMMARY

Revision B to Revision C

•

Minor changes were made to the data sheet style and format to conform to AMD standards.

•

Electrical Characteristics; Last row under Ring Signal, min changed from 130 to 150, typ changed from 160 to

180, and max changed from 190 to 210.

•

SLIC Decoding Table; Added B2EN reference to the Battery Selection column and its corresponding note to the

notes section.

Applications Circuit; Revised

Revision C to Revision D

•

Minor changes were made to the data sheet style and format to conform to AMD standards.

Revision D to Revision E

•

On pages 17 and 18, R_DC1and R_DC2were switched.

Revision E to Revision F

•

The physical dimension (PL032) was added to the Physical Dimension section.

Deleted the Ceramic DIP and Plastic DIP packages and references to them.

Updated the Pin Description table to correct inconsistencies.

Revision F to Revision G

•

The equation on page 13 was changed:

V_BAT1

from:

to:

R_RT1= 300 • CF • ----------------------------------------------------------------------------------------------------------------------------------------- • (R_LRT+ 150 + 2R_F)

Vbat – 3.5 – (15 µA • 300 • CF • (R_LRT+ 150 + 2R_F))

V_BAT1

R_RT1= 320 • CF • ------------------------------------------------------------------------------------------------------------------------------------- • (R_LRT+ 150 + 2R_F)

Vbat – 5 – (24 µA • 320 • CF • (R_LRT+ 150 + 2R_F))

18

Am79R79 Data Sheet

The contents of this document are provided in connection with Ad-

vanced Micro Devices, Inc. ("AMD") products. AMD makes no repre-

sentations or warranties with respect to the accuracy or

completeness of the contents of this publication and reserves the

right to make changes to specifications and product descriptions at

any time without notice. No license, whether express, implied, arising

by estoppel or otherwise, to any intellectual property rights is granted

by this publication. Except as set forth in AMD’s Standard Terms and

Conditions of Sale, AMD assumes no liability whatsoever, and dis-

claims any express or implied warranty, relating to its products in-

cluding, but not limited to, the implied warranty of merchantability,

fitness for a particular purpose, or infringement of any intellectual

property right.

AMD’s products are not designed, intended, authorized or warranted

for use as components in systems intended for surgical implant into

the body, or in other applications intended to support or sustain life,

or in any other application in which the failure of AMD’s product could

create a situation where personal injury, death, or severe property or

environmental damage may occur. AMD reserves the right to discon-

tinue or make changes to its products at any time without notice.

Trademarks

AMD, the AMD logo, and combinations thereof, and DSLAC and QSLAC are trademarks of Advanced Micro Devices, Inc.

Other product names used in this publication are for identification

purposes only and may be trademarks of their respective com-

panies.

20

Am79R79 Data Sheet


型号：	AM79R79-4JC
厂家：	AMD
描述：	Ringing Subscriber Line Interface Circuit 振铃用户线接口电路电池电信集成电路
文件：	总20页 (文件大小：338K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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