概述
数据手册A23L36161-100 概述
8M X 16 / 16M X 8 BIT CMOS MASK ROM 8M ×16 / 16M ×8位CMOS掩膜ROM
A23L36161-100 数据手册
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PDF下载A23L3616/A23L36161 Series
Preliminary
8M X 16 / 16M X 8 BIT CMOS MASK ROM
Document Title
8M X 16 / 16M X 8 BIT CMOS MASK ROM
Revision History
Rev. No. History
Issue Date
Remark
0.0
0.1
0.2
Initial issue
November 3, 2003
August 27, 2004
November 24, 2004
Preliminary
Add A23L36161 (flash type)
Modify A23L36161V pin configuration:
pin 1 from A22 to A16
pin 48 from A16 to A22
PRELIMINARY
(November, 2004, Version 0.2)
AMIC Technology, Corp.
A23L3616/A23L36161 Series
Preliminary
8M X 16 / 16M X 8 BIT CMOS MASK ROM
Features
ꢀ8M x 16 bit or 16M x 8 bit organization
ꢀSupply voltage range: 2.7V~3.6V
ꢀAccess time: 100ns (max.)/3.0V~3.6V
120ns (max.)/2.7V~3.6V
ꢀFull static operation
ꢀAll inputs and outputs are directly TTL-compatible
ꢀAvailable in 44-pin SOP, 48-pin TSOP (forward,
reverse type and flash memory’s pinouts compatible)
packages
ꢀCurrent: Operating: 40mA (typ.)/3.3V
ꢀPinout compatible with flash type (A23L36161)
Standby:
10µA (typ.)/3.3V
ꢀThree-state outputs for wired-OR expansion
Pin Configurations
ꢀSOP
ꢀTSOP (forward type)
1
2
3
4
5
6
7
8
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
GND
GND
O15/A-1
O7
O14
O6
O13
O5
BYTE
A16
A15
A14
A13
A12
A11
A10
A21
A18
A17
A7
1
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
A20
A19
A8
2
3
4
A9
A6
5
A10
A11
A12
A13
A14
A15
A16
A22
GND
O15
O7
A5
6
9
O12
O4
A9
A8
10
11
12
13
14
15
16
17
18
19
A4
7
A19
A21
A20
A18
A17
A7
A6
A5
A4
VCC
VCC
A22
O11
O3
O10
O2
O9
O1
A3
8
A23L3616V
A2
9
A1
10
11
12
13
14
15
16
17
18
19
20
21
A0
CE
GND
OE
O0
A3
A2
A1
A0
20
21
22
23
24
29
28
27
26
25
O8
O0
OE
GND
O8
O14
O6
O1
GND
CE
O13
O5
O9
O2
O12
O4
O10
O3
ꢀTSOP (reverse type)
O11
22
23
VCC
GND
GND
O15/A-1
O7
O14
O6
O13
O5
O12
O4
VCC
VCC
A22
O11
O3
O10
O2
O9
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
A21
A20
A18
A17
A7
A6
A5
A4
A23L3616R
O1
O8
O0
OE
GND
29
28
27
26
25
20
21
22
23
24
A3
A2
A1
A0
GND
CE
PRELIMINARY
(November, 2004, Version 0.2)
1
AMIC Technology, Corp.
A23L3616/A23L36161 Series
Pin Configurations (continued)
ꢀTSOP (forward type)
1
2
3
4
5
6
7
8
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
A22
A16
A15
BYTE
GND
O15/A-1
O7
O14
O6
O13
O5
O12
O4
VCC
O11
O3
O10
O2
O9
O1
O8
A14
A13
A12
A11
A10
A9
A8
A19
NC
NC
A20
NC
A21
A18
A17
9
10
11
12
13
14
15
16
17
18
19
A23L36161V
A7
A6
A5
A4
A3
A2
20
21
22
23
24
29
28
27
26
25
O0
OE
GND
CE
A0
A1
Block Diagram
ROW
MEMORY CELL
ARRAY
DECODER
DRIVER
(A-1) A0 - A22
ADDRESS
INPUTS
COLUMN
DECODER
DRIVER
COLUMN SELECTOR CIRCUITRY
O0
O1
O2
O3
O4
O5
POWER-DOWN
DOWN OR
OUTPUT
ENABLE
CIRCUITRY
BYTE
CE
OE
BYTE
O6
O7
CIRCUITRY
(O8)
(O9)
(O10)
(O11)
(O12)
(O13)
(O14)
(O15)
PRELIMINARY
(November, 2004, Version 0.2)
2
AMIC Technology, Corp.
A23L3616/A23L36161 Series
Pin Descriptions
Pin No.
44L SOP
(A23L3616)
(16M X 8 only)
48L TSOP
(A23L36161)
48L TSOP
(A23L3616)
Symbol
Description
1-11, 33-44
2-23, 36
1-10, 13, 15-25,
48
A0-A22
Address Inputs
Data Outputs
29-36, 38-44
45
15-22, 24-30
28-35, 39-45
O0-O14
O15/A-1
Output 15(WORD mode)
/LSB Address (BYTE mode)
31
12
14
No
46
24
27
1
26
28
47
Chip Enable Input
CE
OE
Output Enable Input
BYTE or WORD mode Selection
BYTE
VCC
GND
NC
37
23
37-38
Power Supply
Ground
27, 46
13, 32
25-26, 47-48
11-12, 14
No Connection
Recommended DC Operating Conditions
(TA = 0°C to + 70°C)
Symbol
VCC
GND
VIH
Parameter
Min.
Max.
3.6
Unit
V
Supply Voltage
Ground
2.7
0
0
V
Input High Voltage
Input Low Voltage
2.2
- 0.3
VCC+0.3
0.6
V
VIL
V
PRELIMINARY (November, 2004, Version 0.2)
3
AMIC Technology, Corp.
A23L3616/A23L36161 Series
Absolute Maximum Ratings*
*Comments
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to this device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification is
not implied or intended. Exposure to the absolute maximum
rating conditions for extended periods may affect device
reliability.
Ambient Operating Temperature . . . . . . . . 0°C to + 70°C
Storage Temperature . . . . . . . . . . . . . . -65°C to + 125°C
Output Voltage . . . . . . . . . . . . . . . . . -0.5V to VCC + 0.5V
Input Voltage . . . . . . . . . . . . . . . . . . -0.5V to VCC + 0.5V
DC Electrical Characteristics
(TA = 0°C to + 70°C, VCC = 2.7V~3.6V, GND = 0V for -100, VCC = 3.0V~3.6V, GND = 0 for -70)
Symbol
VOH
Parameter
Output High Voltage
Min.
Max.
Unit
V
Conditions
IOH = -0.4mA (3V)
IOL = 1.6mA (3V)
Note
2.4
VOL
Output Low Voltage
Input High Voltage
Input Low Voltage
0.4
VCC + 0.3
0.6
V
VlH
2.2
V
VlL
-0.3
V
VCC = max.
VIN = VCC to GND
Input Leakage Current
Output Leakage Current
+10
+10
⎢lLI⎥
µA
µA
VCC = max.
VOUT = VCC to GND
1
2
⎢lLO⎥
ICC
ISB
Operating Supply Current
60
mA
mA
tCYC = min.
Standby Supply Current (TTL)
1.5
CE = VIH
ISB1
Standby Supply Current (CMOS)
30
µA
CE ≥ VCC - 0.2V
PRELIMINARY
(November, 2004, Version 0.2)
4
AMIC Technology, Corp.
A23L3616/A23L36161 Series
Capacitance
Symbol
CI
Parameter
Min.
Max.
10
Unit
pF
Test Conditions
Note
Input Capacitance
Output Capacitance
3
TA = 25°C
f = 1.0MHz
CO
10
pF
AC Characteristics (TA = 0°C to +70°C, VCC = 2.7V~3.6V for -120, VCC = 3.0V~3.6V for -100, GND = 0V)
A23L3616/
A23L36161 -100
A23L3616/
A23L36161 -120
Symbol
Parameter
Unit
Note
Min.
Max.
Min.
Max.
tCYC
tAA
Cycle Time
100
120
ns
ns
ns
ns
ns
ns
ns
Address Access Time
100
100
30
120
120
50
tACE
tAOE
tOH
tLZ
Chip Enable Access Time
Output Enable Access Time
Output Hold after Address Change
Output Low Z Delay
0
0
0
0
4, 6
5, 6
tHZ
Output High Z Delay*
20
20
* tHZ is specified from either OE or CE going disabled, whichever occurs first.
Notes:
1. OE / CE = VIH (Output is unloaded)
2. VIN = VIH/VIL, OE / CE = VIL (Output is unloaded)
3. This parameter is periodically sampled and is not 100% tested. All pins, except pins under test, are tied to AC ground.
4. Output LOW impedance delay (tLZ) is measured from CE or OE going active.
5. Output HIGH impedance delay (tHZ) is measured from CE or OE going inactive.
6. This parameter is sampled and not 100% tested.
PRELIMINARY
(November, 2004, Version 0.2)
5
AMIC Technology, Corp.
A23L3616/A23L36161 Series
Timing Waveforms
Propagation Delay from Address ( CE = Active, OE= Active)
t
CYC
ADDRESS
INPUTS
VALID
t
AA
tOH
VALID
DATA OUT
Propagation Delay from Chip Enable or Output Enable (Address Valid)
CHIP
ENABLE
VALID
t
ACE
OUTPUT
ENABLE
VALID
t
LZ
t
AOE
tHZ
VALID
DATA OUT
AC Test Conditions
Part No.
A23L3616/ A23L36161 –100
3.0V~3.6V
A23L3616/ A23L36161 -120
2.7V~3.6V
Applied Voltage
Input Pulse Levels
Input Rise and Fall Time
0.4V to 2.4V
0.4V to 2.4V
10 ns
10 ns
Timing Measurement Reference Level
Output Load
VIN = 1.4V, VOUT = 1.4V
1 TTL gate and CL = 100pF
VIN = 1.4V, VOUT = 1.4V
1 TTL gate and CL = 100pF
PRELIMINARY
(November, 2004, Version 0.2)
6
AMIC Technology, Corp.
A23L3616/A23L36161 Series
Function Table
O15/A-1
O0 - O7
O8 - O15
Mode
CE
L
OE/NC
BYTE
L
L
H
L
Data Pin O15
Data Out
Data Out
Hi - Z
Data out
Hi - Z
Word
Byte
L
LSB Address A-1
H
L
X
H
X
X
X
X
Hi - Z
Power-down
Output Disable
Hi - Z
Hi - Z
Ordering Information
Part No.
Access Time (ns)
Package
A23L3616M-100 (16M X 8 only)
A23L3616M-120 (16M X 8 only)
A23L3616V-100
100
120
100
120
100
120
100
120
44L SOP
44L SOP
48L TSOP (Forward)
48L TSOP (Forward)
48L TSOP (Reverse)
48L TSOP (Reverse)
48L TSOP (Flash Compatible)
48L TSOP (Flash Compatible)
A23L3616V-120
A23L3616R-100
A23L3616R-120
A23L36161V-100
A23L36161V-120
PRELIMINARY
(November, 2004, Version 0.2)
7
AMIC Technology, Corp.
A23L3616/A23L36161 Series
Package Information
SOP 44L Outline Dimensions
unit: inches/mm
23
44
Gauge Plane
θ
L
0.010"
1
22
b
Detail F
D
S
L1
e
y
Seating Plane
See Detail F
Dimensions in inches
Dimensions in mm
Symbol
Min
-
Nom
-
Max
0.118
-
Min
Nom
-
Max
3.00
A
A1
A2
b
-
0.004
0.103
0.013
0.007
-
-
0.10
2.62
0.33
0.18
-
-
-
0.106
0.016
0.008
1.122
0.109
0.020
0.010
1.130
2.69
0.40
0.20
28.50
2.77
0.50
0.25
28.70
C
D
E
e
0.490
-
0.496
0.050
0.500
-
12.45
-
12.60
1.27
12.70
-
HE
L
0.620
0.631
0.643
0.040
-
15.75
16.03
16.33
1.02
-
0.024
0.032
0.61
0.80
L1
S
-
-
0.0675
-
-
1.71
-
-
-
0.045
0.004
8°
-
-
-
1.14
0.10
8°
y
-
-
θ
0°
0°
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
PRELIMINARY
(November, 2004, Version 0.2)
8
AMIC Technology, Corp.
A23L3616/A23L36161 Series
Package Information
TSOP 48L (Type I) Outline Dimensions
unit: inches/mm
D
D1
1
48
D
24
25
θ
L
Detail "A"
Detail "A"
Dimensions in inches
Dimensions in mm
Min Nom Max
Symbol
Min
Nom
Max
A
A1
A2
b
-
-
0.047
0.006
0.042
0.011
0.008
0.795
0.728
0.476
-
-
1.20
0.15
0.002
0.037
0.007
0.004
0.779
0.720
-
-
0.039
0.009
-
0.05
0.94
0.18
0.12
19.80
18.30
-
-
1.00
1.06
0.22
0.27
c
-
0.20
D
D1
E
e
0.787
0.724
0.472
0.020 BASIC
0.020
0.011 Typ.
-
20.00
18.40
12.00
0.50 BASIC
0.50
20.20
18.50
12.10
L
0.016
0.024
0.40
0.60
S
y
0.28 Typ.
-
-
0.004
8°
-
0.10
8°
0°
-
0°
-
θ
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
PRELIMINARY
(November, 2004, Version 0.2)
9
AMIC Technology, Corp.
A23L36161-100 相关器件
| 型号 | 制造商 | 描述 | 价格 | 文档 |
| A23L36161-120 | AMICC | 8M X 16 / 16M X 8 BIT CMOS MASK ROM | 获取价格 |
|
| A23L36161V | AMICC | 8M X 16 / 16M X 8 BIT CMOS MASK ROM | 获取价格 |
|
| A23L36161V-100 | AMICC | 8M X 16 / 16M X 8 BIT CMOS MASK ROM | 获取价格 |
|
| A23L36161V-120 | AMICC | 8M X 16 / 16M X 8 BIT CMOS MASK ROM | 获取价格 |
|
| A23L361662V-90F | AMICC | MASK ROM | 获取价格 |
|
| A23L36166V-90F | AMICC | MASK ROM | 获取价格 |
|
| A23L3616M | AMICC | 8M X 16 / 16M X 8 BIT CMOS MASK ROM | 获取价格 |
|
| A23L3616M-100 | AMICC | 8M X 16 / 16M X 8 BIT CMOS MASK ROM | 获取价格 |
|
| A23L3616M-120 | AMICC | 8M X 16 / 16M X 8 BIT CMOS MASK ROM | 获取价格 |
|
| A23L3616R | AMICC | 8M X 16 / 16M X 8 BIT CMOS MASK ROM | 获取价格 |
|
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