A625308AM-70S [AMICC]
32K X 8 BIT CMOS SRAM; 32K ×8位CMOS SRAM
| 型号： | A625308AM-70S |
| 厂家： | 
AMIC TECHNOLOGY |
| 描述： | 32K X 8 BIT CMOS SRAM |
| 文件： | 总14页 (文件大小：143K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
A625308A Series
Preliminary
32K X 8 BIT CMOS SRAM
Document Title
32K X 8 BIT CMOS SRAM
Revision History
Rev. No. History
Issue Date
Remark
0.0
0.1
0.2
Initial issue
February 2, 2001
November 7, 2001
July 17, 2002
Preliminary
Add ultra temp grade and 28-pin DIP package type
Add SI grade
PRELIMINARY
(July, 2002, Version 0.2)
AMIC Technology, Inc.
A625308A Series
Preliminary
32K X 8 BIT CMOS SRAM
Features
n Extended operating temperature range: 0°C to 70°C
for -S series, -25°C to 85°C for -SI series, -40°C to
85°C for -SU series.
n Power Supply Range: 4.5V to 5.5V
n Access times: 70 ns
A625308A-S series:
Operating: 35mA (max.)
n Full static operation, no clock or refreshing required
n All inputs and outputs are directly TTL-compatible
n Common I/O using three-state output
Standby: 10mA (max.)
A625308A-SI/SU series: Operating: 35mA (max.)
Standby: 15mA (max.)
n Data retention voltage: 2.0V (min.)
n Available in 28-pin, DIP/SOP and TSOP
General Description
Minimum standby power is drawn by this device when
The A625308A is a low operating current 262,144-bit
static random access memory organized as 32,768
words by 8 bits and operates on a voltage from 4.5V to
5.5V.
Inputs and three-state outputs are TTL compatible and
allow for direct interfacing with common system bus
structures.
CE is at a high level, independent of the other input
levels.
Data retention is guaranteed at a power supply voltage
as low as 2.0V.
Pin Configurations
n DIP / SOP
n TSOP
1
VCC
WE
A13
A8
28
27
26
A14
A12
A7
OE
A11
A9
1
2
3
4
5
6
7
8
28
27
26
25
24
23
22
21
20
19
18
17
16
15
A10
CE
2
3
4
I/O7
I/O6
I/O5
I/O4
I/O3
VSS
I/O2
I/O1
I/O0
A0
A8
A13
WE
VCC
A14
A12
A7
A6
A5
A4
A3
A6
A5
A4
25
24
23
22
A9
5
6
A11
A625308AV
9
A3
A2
A1
A0
OE
7
8
10
11
12
13
14
A10
CE
21
20
19
18
9
A1
A2
I/O7
10
11
I/O6
I/O5
I/O0
I/O1
12
13
14
17
16
15
I/O2
I/O4
GND
I/O3
PRELIMINARY
(July, 2002, Version 0.2)
1
AMIC Technology, Inc.
A625308A Series
Block Diagram
VCC
GND
A0
ROW
512 X 512
A12
A13
A14
DECODER
MEMORY ARRAY
I/O0
COLUMN I/O
INPUT DATA
CIRCUIT
I/O7
CE
OE
CONTROL
CIRCUIT
WE
Pin Description-TSOP
Pin No.
Pin Descriptions – DIP / SOP
Symbol
A0 - A14
Description
Address Input
Data Input/Output
Chip Enable
Pin No.
1-10, 21, 23-26
11-13, 15-19
20
Symbol
A0 - A14
I/O0 - I/O7
Description
2-5, 8-17, 28
18-20, 22-26
27
Address Input
Data Input/Output
Chip Enable
I/O0 - I/O7
CE
CE
OE
1
6
Output Enable
Write Enable
22
27
Output Enable
Write Enable
OE
WE
VCC
GND
WE
VCC
GND
7
Power Supply
Ground
28
14
Power Supply
Ground
21
PRELIMINARY
(July, 2002, Version 0.2)
2
AMIC Technology, Inc.
A625308A Series
Recommended DC Operating Conditions
(TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C)
Symbol
VCC
GND
VIH
Parameter
Supply Voltage
Min.
4.5
0
Typ.
Max.
Unit
V
5.0
0
5.5
0
Ground
V
Input High Voltage
Input Low Voltage
2.2
-0.5
-
VCC + 0.5
+0.8
V
VIL
0
V
Absolute Maximum Ratings*
*Comments
VCC to GND . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V
IN, IN/OUT Volt to GND . . . . . . . . . -0.5V to VCC + 0.5V
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
These are stress ratings only. Functional operation of this
device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied and exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Operating Temperature, Topr . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . 0°C to +70°C or -40°C to +85°C
Storage Temperature, Tstg . . . . . . . . . -55°C to +125°C
Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . 0.7W
Soldering Temp. & Time . . . . . . . . . . . . . 260°C, 10 sec
DC Electrical Characteristics (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C, VCC = 5.0V ± 10%, GND = 0V)
A625308A-70S/SI/SU
Symbol
Parameter
Unit
Conditions
Min.
Max.
Input Leakage Current
-
1
VIN = GND to VCC
½ILI½
½ILO½
ICC
mA
mA
CE = VIH
VI/O = GND to VCC
Output Leakage Current
Active Power Supply Current
-
-
1
5
mA
CE = VIL, II/O = 0mA
Min. Cycle, Duty = 100%
ICC1
ICC2
Dynamic Operating Current
Dynamic Operating Current
-
-
35
5
mA
mA
CE = VIL, II/O = 0mA
CE = VIL, VIH = VCC
VIL = 0V, f = 1 MHz
II/O = 0 mA
PRELIMINARY
(July, 2002, Version 0.2)
3
AMIC Technology, Inc.
A625308A Series
DC Electrical Characteristics (continued)
A625308A-70S
A625308A-70SI/SU
Symbol
Parameter
Unit
Conditions
Min.
Max.
Min.
Max.
ISB
-
0.5
-
0.5
mA
CE = VIH
Supply Current
Standby Power
CE ³ VCC - 0.2V
VIN ³ 0V
ISB1
-
10
-
15
mA
VOL
VOH
Output Low Voltage
Output High Voltage
-
0.4
-
-
0.4
-
V
V
IOL = 2.1 mA
IOH = -1.0 mA
2.4
2.4
Truth Table
Mode
I/O Operation
Supply Current
CE
OE
X
WE
X
Standby
Output Disable
Read
H
L
L
L
High Z
High Z
DOUT
ISB, ISB1
H
H
ICC, ICC1, ICC2
ICC, ICC1, ICC2
ICC, ICC1, ICC2
L
H
Write
X
L
DIN
Note: X: H or L
Capacitance (TA = 25°C, f = 1.0 MHz)
Symbol
CIN*
Parameter
Input Capacitance
Min.
Max.
Unit
pF
Conditions
VIN = 0V
-
-
6
8
CI/O*
Input/Output Capacitance
pF
VI/O = 0V
* These parameters are sampled and not 100% tested.
PRELIMINARY
(July, 2002, Version 0.2)
4
AMIC Technology, Inc.
A625308A Series
AC Characteristics (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C, VCC = 5.0V ± 10%)
A625308A-70S/SI/SU
Min. Max.
Symbol
Parameter
Unit
Read Cycle
tRC
Read Cycle Time
70
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
tAA
Address Access Time
70
70
35
-
tACE
tOE
Chip Enable Access Time
-
Output Enable to Output Valid
Chip Enable to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
Output Hold from Address Change
-
tCLZ
10
5
tOLZ
-
tCHZ
tOHZ
tOH
-
25
25
-
-
10
Write Cycle
tWC
Write Cycle Time
70
60
0
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCW
Chip Enable to End of Write
Address Set up Time
tAS
-
tAW
Address Valid to End of Write
Write Pulse Width
60
50
0
-
tWP
-
tWR
Write Recovery Time
-
tWHZ
tDW
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
Output Active from End of Write
-
25
-
30
0
tDH
-
tOW
5
-
Notes: tCHZ, tOHZ and tWHZ are defined as the time at which the outputs achieve the open circuit condition and are not
referred to output voltage levels.
PRELIMINARY
(July, 2002, Version 0.2)
5
AMIC Technology, Inc.
A625308A Series
Timing Waveforms
Read Cycle 1 (1)
tRC
Address
tAA
OE
tOE
tOH
5
tOLZ
CE
5
tOHZ
tACE
5
tCHZ
5
tCLZ
DOUT
Read Cycle 2 (1, 2, 4)
tRC
Address
tAA
tOH
tOH
DOUT
PRELIMINARY
(July, 2002, Version 0.2)
6
AMIC Technology, Inc.
A625308A Series
Timing Waveforms (continued)
Read Cycle 3 (1, 3, 4)
CE
tACE
5
tCLZ
5
tCHZ
DOUT
Notes: 1. WE is high for Read Cycle.
2. Device is continuously enabled, CE = VIL.
3. Address valid prior to or coincident with CE transition low.
4. OE = VIL.
5. Transition is measured ±500mV from steady state. This parameter is sampled and not 100% tested.
Write Cycle 1 (6)
(Write Enable Controlled)
tWC
Address
3
tAW
tWR
5
tCW
CE
WE
DIN
(4)
1
2
tAS
tWP
tDW
tDH
7
tWHZ
7
tOW
DOUT
PRELIMINARY
(July, 2002, Version 0.2)
7
AMIC Technology, Inc.
A625308A Series
Timing Waveforms (continued)
Write Cycle 2 (6)
(Chip Enable Controlled)
tWC
Address
3
tAW
tWR
5
tCW
CE
(4)
1
tAS
2
tWP
WE
tDW
tDH
DIN
7
tWHZ
DOUT
Notes: 1. tAS is measured from the address valid to the beginning of Write.
2. A Write occurs during the overlap (tWP) of a low CE and a low WE .
3. tWR is measured form the earliest of CE or WE going high to the end of the Write cycle.
4. If the CE low transition occurs simultaneously with the WE low transition or after the WE transition, outputs
remain in a high impedance state.
5. tCW is measured from the later of CE going low to the end of Write.
6. OE level is high or low.
7. Transition is measured ±500mV from steady. This parameter is sampled and not 100% tested.
PRELIMINARY
(July, 2002, Version 0.2)
8
AMIC Technology, Inc.
A625308A Series
AC Test Conditions
Input Pulse Levels
0V, 3V
Input Rise And Fall Time
Input and Output Timing Reference Levels
Output Load
5 ns
1.5V
See Figure 1 and 2
TTL
TTL
CL
CL
30pF
5pF
* Including scope and jig.
* Including scope and jig.
Figure 1. Output Load
Figure 2. Output Load for tCLZ1,
tCLZ2, tOHZ, tOLZ, tCHZ1,
tCHZ2, tWHZ, and tOW
Data Retention Characteristics (TA = 0°C to +70°C, -25°C to +85°C or -40°C to +85°C)
Symbol
Parameter
VCC for Data Retention
Min.
Max.
Unit
Conditions
VDR
2.0
5.5
V
CE ³ VCC - 0.2V
VCC = 2.0V,
ICCDR
Data Retention Current
-
3
mA
CE ³ VCC - 0.2V
VIN ³ 0V
tCDR
tR
Chip Disable to Data Retention Time
Operation Recovery Time
0
-
-
ns
ns
See Retention Waveform
tRC
PRELIMINARY
(July, 2002, Version 0.2)
9
AMIC Technology, Inc.
A625308A Series
Low VCC Data Retention Waveform
DATA RETENTION MODE
4.5V
4.5V
VCC
tCDR
tR
VDR
³ 2.0V
VIH
VIH
CE
CE
³
VDR - 0.2V
Ordering Information
Operating Current
Max. (mA)
Standby Current
Part No.
Access Time (ns)
Package
Max. (mA)
A625308A-70S
35
35
35
35
35
35
35
35
35
10
10
10
15
15
15
15
15
15
28L DIP
28L SOP
A625308AM-70S
A625308AV-70S
A625308A-70SI
A625308AM-70SI
A625308AV-70SI
A625308A-70SU
A625308AM-70SU
A625308AV-70SU
28L TSOP (Forward)
28L DIP
70
28L SOP
28L TSOP (Forward)
28L DIP
28L SOP
28L TSOP (Forward)
PRELIMINARY
(July, 2002, Version 0.2)
10
AMIC Technology, Inc.
A625308A Series
Package Information
P-DIP 28L Outline Dimensions
unit: inches/mm
D
28
15
1
14
E
S
Base Plane
Seating Plane
B
e
A
a
e1
B1
Dimensions in inches
Dimensions in mm
Symbol
Min
-
Nom
Max
0.210
-
Min
Nom
Max
5.33
A
-
-
-
-
-
A1
A2
0.010
0.150
0.25
3.81
-
0.155
0.160
3.94
4.06
B
0.016
0.058
0.018
0.060
0.022
0.064
0.41
1.47
0.46
1.52
0.56
1.63
0.36
B1
C
D
0.008
-
0.010
1.460
0.014
1.470
0.20
-
0.25
37.08
37.34
15.49
13.97
2.79
E
E1
e1
L
0.590
0.540
0.090
0.120
0°
0.600
0.545
0.100
0.130
-
0.610
0.550
0.110
0.140
15°
14.99
13.72
2.29
3.05
0°
15.24
13.84
2.54
3.30
-
3.56
15°
a
eA
S
0.630
-
0.650
-
0.670
0.090
16.00
-
16.51
-
17.02
2.29
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E1 does not include resin fins.
3. Dimension S includes end flash.
PRELIMINARY
(July, 2002, Version 0.2)
11
AMIC Technology, Inc.
A625308A Series
Package Information
SOP (W.B.) 28L Outline Dimensions
unit: inches/mm
28
15
q
L
Detail F
1
B
14
D
y
L1
S
e
y
See Detail F
Seating Plane
Dimensions in inches
Dimensions in mm
Symbol
Min
-
Nom
-
Max
Min
Nom
-
Max
A
A1
A2
B
0.112
2.85
-
0.10
2.36
0.36
0.20
-
0.004
0.093
0.014
0.008
-
-
-
-
-
0.098
0.016
0.010
0.713
0.331
0.050
0.465
0.036
0.067
-
0.103
0.020
0.012
0.728
0.336
0.056
0.477
0.044
0.075
0.047
0.004
8°
2.49
0.41
0.25
18.11
8.41
1.27
11.81
0.91
1.70
-
2.62
0.51
0.30
18.49
8.53
1.42
12.12
1.12
1.91
1.19
0.10
8°
C
D
E
0.326
0.044
0.453
0.028
0.059
-
8.28
1.12
11.51
0.71
1.50
-
e
H
L
L1
S
y
-
-
-
-
0°
0°
-
-
q
Notes:
1. The maximum value of dimension D includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
PRELIMINARY
(July, 2002, Version 0.2)
12
AMIC Technology, Inc.
A625308A Series
Package Information
TSOP 28L TYPE I (8 X 13.4mm) Outline Dimensions
unit: inches/mm
D
1
Detail "A"
1
28
q
L
14
15
D
Detail "A"
y
S
b
Dimensions in inches
Dimensions in mm
Symbol
Min
-
Nom
Max
0.049
-
Min
Nom
Max
A
A1
A2
b
-
-
-
1.25
-
0.002
0.037
0.007
0.005
0.311
0.012
0.520
0.461
-
0.039
0.009
-
0.05
0.95
0.17
0.12
7.90
0.30
13.20
11.70
-
1.00
0.22
-
0.041
0.011
0.008
0.319
0.028
0.536
0.469
1.05
0.27
0.21
8.10
0.70
13.60
11.90
c
E
L
0.315
0.020
0.528
0.465
0.022 BSC
0.017 TYP
-
8.00
0.50
13.40
11.80
0.55 BSC
0.425 TYP
-
D
D1
e
S
y
-
0.004
-
0.10
-
-
q
0°
5°
0°
5°
Notes:
1. The maximum value of dimension D1 includes end flash.
2. Dimension E does not include resin fins.
3. Dimension S includes end flash.
PRELIMINARY
(July, 2002, Version 0.2)
13
AMIC Technology, Inc.
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