AS1116_技术文档

Datasheet

AS1116

64 LED Driver with Detailed Error Detection

1 General Description

2 Key Features

ꢀ

10MHz SPI-Compatible Interface

Open and Shorted LED Error Detection

- Global or Individual Error Detection

The AS1116 is a compact LED driver for 64 single LEDs

or 8 digits of 7-segments. The devices can be pro-

grammed via an SPI compatible 3-wire interface.

ꢀ

Hexadecimal- or BCD-Code for 7-Segment Displays

200nA Low-Power Shutdown Current (typ; data

retained)

Individual Digit Brightness Control

Digital and Analog Brightness Control

Display Blanked on Power-Up

Drive Common-Cathode LED Displays

Supply Voltage Range: 2.7 to 5.5V

Software Reset

Every segment can be individually addressed and

updated separately. Only one external resistor (RSET) is

required to set the current. LED brightness can be con-

trolled by analog or digital means.

ꢀ

The devices include an integrated BCD code-B/HEX

decoder, multiplex scan circuitry, segment and display

drivers, and a 64-bit memory. Internal memory stores

the shift register settings, eliminating the need for contin-

uous device reprogramming.

Optional External Clock

Package:

Additionally the AS1116 offers a diagnostic mode for

easy and fast production testing and allows the use of

the AS1116 for critical applications. The diagnostic

allows to detect individual open or shorted LEDs.

- QSOP-24 and TQFN(4x4)-24

3 Applications

The AS1116 is ideal for seven-segment or dot matrix dis-

plays in public information displays at subway, train or

bus stations, at airports and also at displays in public

The AS1116 features a low shutdown current of typically

200nA, and an operational current of typically 350µA.

The number of digits can be programmed, the devices

can be reset by software, and an external clock is also

supported.

,

transportation like buses or trains mobile phones, per-

The device is available in a QSOP-24 and TQFN(4x4)-

24 package.

sonal electronic and toys.

Figure 1. Typical Application Diagram

8

DIG0 to

DIG7

AS1116

LD

SEGA-DP

VDD

8

2.7V to 5.5V

9.53kΩ

GND

ISET

SDI

AS1116

SDO

SDI

I/O

LD

SCL

I/O

µP

I/O

Diagnostic readback: open & shorted LEDs

www.austriamicrosystems.com

Revision 1.04

1 - 20

AS1116

Datasheet - Pinout

4 Pinout

Pin Assignments

Figure 2. Pin Assignments (Top View)

24 23 22 21 20 19

DIG2

DIG3

GND

DIG4

DIG5

N/C

1

2

3

4

5

6

18 SEG E

17 SEGC

16 VDD

AS1116

15 SEGG

14 SEGB

13 SEGF

7

8

9

10 11 12

Pin Descriptions

Table 1. Pin Descriptions

QSOP-24 TQFN(4x4)-24

Name

Description

Serial-Data Input. Data is loaded into the internal 16-bit shift register

on the rising edge of pin SCL.

1

22

SDI

Digit Drive Lines. Eight digit drive lines that sink current from the

display cathode.

1, 2, 4, 5, 7, 8,

23, 24

2-5, 7-10

DIG0:DIG7

GND

6

3

9

6

Ground.

Load. Serial Data is loaded into the shift register while this pin is low.

The last 16 bits of serial data are latched on the rising edge of this pin.

11

12

LD

Not Connected.

N/C

Set Segment Current. Connect to VDD or a reference voltage through

RSET to set the peak segment current (see Selecting RSET Resistor

Value and Using External Drivers on page 15).

Serial-Clock Input. 10MHz maximum rate. Data is shifted into the

internal shift register on the rising edge of this pin. Data is clocked out of

pin SDO on the rising edge of this pin.

13

14

10

11

ISET

SCL

Seven Segment and Decimal Point Drive Lines. 8 seven-segment

drives and decimal point drive that source current to the display.

SEGA:SEG

G, SEGDP

15-18,

20-23

12-15,

17-20

19

16

Positive Supply Voltage. Connect to +2.7 to +5.5V supply.

VDD

Serial-Data Output. The data into pin SDI is valid at pin SDO 16 clock

cycles later. This pin is used to daisy-chain several devices and is never

high-impedance.

24

21

SDO

www.austriamicrosystems.com

Revision 1.04

2 - 20

AS1116

Datasheet - Absolute Maximum Ratings

5 Absolute Maximum Ratings

Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only,

and functional operation of the device at these or any other conditions beyond those indicated in Section 6 Electrical

Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may

affect device reliability.

Table 2. Absolute Maximum Ratings

Parameter

Min

Max

Units

Notes

VDD to GND

-0.3

7

V

Input Voltage Range

Current

7 or

All other pins to GND

-0.3

V

VDD + 0.3

DIG0:DIG7 Sink Current

SEGA:SEGG, SEGDP

500

100

mA

%

Humidity

5

85

Non-condensing

Digital outputs

All other pins

1000

V

Electrostatic Discharge

Norm: MIL 833 E method 3015

V

Latch-Up Immunity

±100

mA

ºC/W

EIA/JESD78

88

on PCB, QSOP-24 package

Thermal Resistance Θ^JA

30.5

+85

150

ºC/W on PCB, TQFN(4x4)-24 package

Ambient Temperature

Storage Temperature

-40

-55

ºC

The reflow peak soldering

temperature (body temperature)

specified is in accordance with IPC/

JEDEC J-STD-020D “Moisture/

Reflow Sensitivity Classification for

Non-Hermetic Solid State Surface

Mount Devices”.

Package Body Temperature

+260

ºC

The lead finish for Pb-free leaded

packages is matte tin (100% Sn).

www.austriamicrosystems.com

Revision 1.04

3 - 20

AS1116

Datasheet - Electrical Characteristics

6 Electrical Characteristics

VDD = 2.7 to 5.5V, RSET = 9.53kΩ, TAMB = -40 to +85°C, typ. values @ TAMB = +25ºC, VDD = 5.0V (unless otherwise

specified).

Table 3. Electrical Characteristics

Symbol

Parameter

Conditions

Min

Typ Max

Unit

2.7

5.5

V

VDD

Operating Supply Voltage

All digital inputs at VDD or

GND, TAMB = +25ºC

0.2

0.35

335

0.8

2

µA

IDDSD

Shutdown Supply Current

RSET = open circuit.

0.6

IDD

Operating Supply Current

mA

All segments and decimal

point on; ISEG = -40mA.

0.6

320

-37

1.2

-47

47

kHz

mA

%

fOSC

IDIGIT

ISEG

Display Scan Rate

8 digits scanned

VOUT = 0.65V

Digit Drive Sink Current

-42

3

Segment Drive Source Current

Segment Drive Current Matching

Segment Drive Source Current

VDD = 5.0V, VOUT = (VDD -1V)

Average Current

ΔISEG

ISEG

mA

Table 4. Logic Inputs/Outputs Characteristics

Symbol

Parameter

Conditions

VIN = 0V or VDD

4.5V < VDD < 5.5V

2.7V < VDD < 4.5V

VDD = 5.0V

Min

-1

Typ

Max

Unit

µA

V

IIH, IIL

Input Current SDI, SCL, LD

1

0.6 x VDD

0.7 x VDD

VIH

VIL

Logic High Input Voltage

Logic Low Input Voltage

V

0.8

0.6

V

VDD = 3.0V

SDO, ISOURCE = -1mA,

VDD = 5.0V

VDD - 1

VOH

Output High Voltage

SDO, ISOURCE = -1mA,

VDD = 3.0V

VDD - 0.5

VOL

Output Low Voltage

Hysteresis Voltage

0.4

V

SDO, ISINK = 1mA

SDI, SCL, LD

ΔVI

1

0.7x

VDD

0.75x 0.8x

V

Open Detection Level Threshold

Short Detection Level Threshold

VDD

0.1x 0.15x

0.05x VDD

VDD

Table 5. SPI Timing Characteristics

Symbol

tCP

Parameter

Conditions

Min

100

20

25

10

0

Typ

Max

Unit

ns

ms

SCL Clock Period

SCL Pulse Width High

SCL Pulse Width Low

LD to SCL Rise Setup Time

tCH

tCL

tCSS

tCSH

tDS

SCL Rise to LD Rise Hold Time

SDI Setup Time

tDH

SDI Hold Time

5

tDO

Output Data Propagation Delay

LD Rising Edge to SCL Rising Edge

Minimum LD Pulse High

Data-to-Segment Delay

CLOAD = 50pF

25

tLDCK

tCSW

tDSPD

20

2.25

See Figure 18 on page 8 for more information.

www.austriamicrosystems.com

Revision 1.04

4 - 20

AS1116

Datasheet - Typical Operating Characteristics

7 Typical Operating Characteristics

RSET = 9.53kΩ, VRset = VDD;

Figure 3. Display Scan Rate vs. Supply Voltage;

Figure 4. Display Scan Rate vs. Temperature;

980

960

940

920

900

880

860

840

960

940

920

900

880

Vdd =2.7V

Vdd =4V

Vdd =5V

Tamb =- 40°C

Tamb = + 25°C

860

Vdd = 5.5V

Tamb = + 85°C

840

2.7

3.1

3.5

3.9

4.3

4.7

5.1

5.5

-40

-15

10

35

60

85

Vdd (V)

Tamb (°C)

Figure 5. Segment Current vs. Temperature;

Figure 6. Segment Current vs. RSET;

60

50

Vseg =4V; Vdd =5V

Vseg =3V; Vdd =5V

Vseg =2V; Vdd =5V

Vseg = 1.7V; Vdd = 2.7V

50

40

30

20

40

30

20

10

0

Vseg = 1.7V; Vdd = 2.7V

Vseg = 1.7V; Vdd = 5V

10

V seg = 3V ; V dd = 5V

V seg = 4V ; V dd = 5V

0

-40

-15

10

35

60

85

0

10 20 30 40 50 60 70 80 90

Rset (kOhm)

Tamb (°C)

Figure 7. Segment Current vs. Supply Voltage;

Figure 8. Segment Current vs. VDD; VRset = 2.8V

60

50

Vseg = 1.7V

45

Vseg =2V

50

40

30

20

Vseg =2.3V

40

Vseg =3.1V

35

30

25

20

15

10

5

Vseg = 1.7V

Vseg =3V

Vseg =4V

10

0

2.7

3.1

3.5

3.9

4.3

4.7

5.1

5.5

2.7

3

3.3

3.6

3.9

4.2

Vdd (V)

www.austriamicrosystems.com

Revision 1.04

5 - 20

AS1116

Datasheet - Typical Operating Characteristics

Figure 9. VDIGIT vs. IDIGIT

Figure 10. Input High Level vs. Supply Voltage

0.4

3.5

3

2.5

2

0.3

0.2

1.5

1

Vdd =2.7V

0.1

0

Vdd = 3.3V

Vdd =4V

Vdd =5V

0.5

0

Vdd = 5.5V

2.7

3.1

3.5

3.9

Vdd (V)

4.3

4.7

5.1

5.5

0

0.05 0.1 0.15 0.2 0.25 0.3 0.35

Idig (A)

Figure 11. ISEG vs. VSEG; VDD = 5V

Figure 12. ISEG vs. VSEG; VDD = 4V

50

Rext =10k

Rext =13k

Rext =18k

Rext =30k

Rext =56k

Rext =8k2

Rext =10k

Rext =13k

Rext =18k

Rext =30k

45

40

35

30

25

20

15

10

5

45

40

35

30

25

20

15

10

5

0

2

2.5

3

3.5

4

4.5

5

1

1.5

2

2.5

3

3.5

4

Vs eg (V)

Vseg (V)

Figure 13. ISEG vs. VSEG; VDD = 3.3V

Figure 14. ISEG vs. VSEG; VDD = 2.7V

50

Rext = 6k8

Rext = 8k2

Rext = 10k

Rext = 13k

Rext = 18k

Rext = 4k7

Rext = 5k6

Rext = 6k8

Rext = 10k

Rext = 13k

45

40

35

30

25

20

15

10

5

45

40

35

30

25

20

15

10

5

0

1

1.2 1.4 1.6 1.8

2

2.2 2.4 2.6 2.8

3

3.2

1

1.2 1.4 1.6 1.8

2

2.2 2.4 2.6

Vseg (V)

www.austriamicrosystems.com

Revision 1.04

6 - 20

AS1116

Datasheet - Detailed Description

8 Detailed Description

Block Diagram

Figure 15. Block Diagram (QSOP-24 Package)

Open/Short

Detection

VDD

+

–

R

SET

19

+

–

VDD

13

Oszillator

ISET

8

15-18, 20-23

SEGA-G,

SEGDP

Digital Control

Logic

8

2-5, 7-10

DIG0 to DIG7

(PWM, Debounce,....)

11

LD

1

SDI

14

Registers

SPI

Interface

6

Data - Registers

Control - Registers

Scan - Registers

SCL

GND

24

SDO

AS1116

Figure 16. ESD Structure

valid for the pins:

- SDI

VDD

- SCL

- SDO

- LD

- ISET

valid for the pins:

- DIG0 to DIG7

- SEGA-G, SEGDP

www.austriamicrosystems.com

Revision 1.04

7 - 20

AS1116

Datasheet - Detailed Description

Serial-Addressing Format

The AS1116 contains a 16bit SPI interface to access the internal data and control registers of the device (see Digit-

and Control-Registers on page 9). The SPI interface is driven with the rising edge of SCL. A falling edge on LD signal

indicates the beginning of an access on the SPI interface, the rising edge on LD determines an access on SPI. An

access must consist of exactly 16bits for write operation and 8bits for read operation. Timing restrictions on the SPI

interface pins are defined in Figure 18.

Table 6 shows the structure of the 16bit command word for writing data, Table 7 the 8bit command word for read oper-

ation.

D0 (write operation) / D8 (read operation) is the first bit to shift into the SPI interface after the falling edge of LD, is the

last bit to write to SPI before rising edge of LD.

At a read operation an 8bit operation is executed. At the first rising edge of SCL after the rising edge of LD D7 of

addressed register is written to SDO pin. At the next rising edge of SCL D6 is written to SDO pin. LD must be kept high

during reading data from a internal data or control register of AS1116.

Table 6. 16-Bit Serial Data Format

D0

D1

D2

D3

Data

D4

D5

D6

D7

D8

D9

D10

D11

D12 D13 D14 D15

R/W

LSB

MSB

Register Address (see Table 7)

0

X

Figure 17. Read operation

16

1

8

9

10

SCL

LD

SDO

D7

D6 D5 D4 D3 D2 D1 D0

Figure 18. Interface Timing

LD

tCSW

tCSH

tCP

tCSS

tLDCK

tCL

tCH

SCL

SDI

tDH

tDS

D0

D1

D14

D15

tDO

SDO

Initial Power-Up

On initial power-up, the AS1116 registers are reset to their default values, the display is blanked, and the device goes

into shutdown mode. At this time, all registers should be programmed for normal operation.

Note: The default settings enable only scanning of one digit; the internal decoder is disabled and the Intensity Control

Register (see page 13) is set to the minimum values.

www.austriamicrosystems.com

Revision 1.04

8 - 20

AS1116

Datasheet - Detailed Description

Shutdown Mode

The AS1116 devices feature a shutdown mode, where they consume only 200nA (typ) current. Shutdown mode is

entered via a write to the Shutdown Register (see Table 8). For the AS1116, at that point, all segment current sources

and digital drivers are switched off, so that all segments are blanked.

Note: During shutdown mode the Digit-Registers maintain their data.

Shutdown mode can either be used as a means to reduce power consumption or for generating a flashing display

(repeatedly entering and leaving shutdown mode). For minimum supply current in shutdown mode, logic input should

be at GND or VDD (CMOS logic level).

When entering or leaving shutdown mode, the Feature Register is reset to its default values (all 0s) when Shutdown

Register bit D7 (page 10) = 0.

Note: When Shutdown Register bit D7 = 1, the Feature Register is left unchanged when entering or leaving shut-

down mode. If the AS1116 is used with an external clock, Shutdown Register bit D7 should be set to 1 when

writing to the Shutdown Register.

Digit- and Control-Registers

The AS1116 devices contain 8 Digit-Registers,11 control-registers and 8 diagnostic-registers, which are listed in Table

7. All registers are selected using a 8-bit address word, and communication is done via the serial interface.

ꢀ

Digit Registers – These registers are realized with an on-chip 64-bit memory. Each digit can be controlled directly

without rewriting the whole register contents.

ꢀ

Control Registers – These registers consist of decode mode, display intensity, number of scanned digits, shut-

down, display test and features selection registers.

Table 7. Register Address Map

Address

D15 D14 D13 D12 D11 D10 D9

Register

Page

D8

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

D7:D0

No-Op

Digit 0

X

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

14

N/A

10

Digit 1

0

Digit 2

0

(see Table 10 on page 11,

Table 11 on page 11 and

Table 12 on page 11)

Digit 3

0

Digit 4

0

Digit 5

0

Digit 6

0

Digit 7

0

Decode-Mode

Global Intensity

Scan Limit

Shutdown

0

(see Table 9 on page 10)

(see Table 16 on page 13)

(see Table 18 on page 13)

(see Table 8 on page 10)

0

13

0

13

0

9

Not Used

0

N/A

14

Feature

0/1

0

(see Table 19 on page 14)

(see Table 13 on page 12)

(see Table 17 on page 13)

Display Test Mode

DIG0:DIG1 Intensity

DIG2:DIG3 Intensity

DIG4:DIG5 Intensity

DIG6:DIG7 Intensity

10

0

www.austriamicrosystems.com

Revision 1.04

9 - 20

AS1116

Datasheet - Detailed Description

Table 7. Register Address Map

Address

D15 D14 D13 D12 D11 D10 D9

Register

Page

D8

0

D7:D0

Diagnostic Digit 0

Diagnostic Digit 1

Diagnostic Digit 2

Diagnostic Digit 3

Diagnostic Digit 4

Diagnostic Digit 5

Diagnostic Digit 6

Diagnostic Digit 7

X

1

0

1

0

1

0

1

0

1

N/A

1

0

1

0

1

0

1

Note: Write operation: D14=0; Read operation: D14=1.

The Shutdown Register controls AS1116 shutdown mode.

Table 8. Shutdown Register Format (Address (HEX) = 0x0C))

Register Data

HEX

Code

Mode

D7 D6 D5 D4 D3 D2 D1 D0

Shutdown Mode, Reset Feature Register to Default Settings

Shutdown Mode, Feature Register Unchanged

0x00

0x80

0x01

0x81

0

1

0

1

X

0

1

Normal Operation, Reset Feature Register to Default Settings

Normal Operation, Feature Register Unchanged

Decode Enable Register (0x09)

The Decode Enable Register sets the decode mode. BCD/HEX decoding (either BCD code – characters 0:9, E, H, L,

P, and -, or HEX code – characters 0:9 and A:F) is selected by bit D2 (page 14) of the Feature Register. The Decode

Enable Register is used to select the decode mode or no-decode for each digit. Each bit in the Decode Enable Regis-

ter corresponds to its respective display digit (i.e., bit D0 corresponds to digit 0, bit D1 corresponds to digit 1 and so

on). Table 10 lists some examples of the possible settings for the Decode Enable Register bits.

Note: A logic high enables decoding and a logic low bypasses the decoder altogether.

When decode mode is used, the decoder looks only at the lower-nibble (bits D3:D0) of the data in the Digit-Registers,

disregarding bits D6:D4. Bit D7 sets the decimal point (SEG DP) independent of the decoder and is positive logic (bit

D7 = 1 turns the decimal point on). Table 10 lists the code-B font; Table 11 lists the HEX font.

When no-decode mode is selected, data bits D7:D0 of the Digit-Registers correspond to the segment lines of the

AS1116. Table 12 shows the 1:1 pairing of each data bit to the appropriate segment line.

Table 9. Decode Enable Register Format Examples

Register Data

HEX

Code

Decode Mode

D7 D6 D5 D4 D3 D2 D1 D0

No decode for digits 7:0

0x00

0x01

0x07

0x3F

0

1

0

1

0

1

0

1

0

1

0

1

Code-B/HEX decode for digit 0. No decode for digits 7:1

Code-B/HEX decode for digit 0:2. No decode for digits 7:3

Code-B/HEX decode for digits 0:5. No decode for digits 7:6

Code-B/HEX decode for digits 0,2,5. No decode for digits 1, 3, 4, 6, 7 0x25

www.austriamicrosystems.com

Revision 1.04

10 - 20

AS1116

Datasheet - Detailed Description

Table 10. Code-B Font

Register Data

Char-

Register Data

Char-

acter

Char-

acter

D7

D6:D4 D3 D2 D1 D0

X

0

1

0

1

0

1

0

1

0

1

X

0

1

0

1

0

1

0

1

0

1

0

1

X

1

X

1

X

0

1

X

0

1

0

1

X

1^*

^*The decimal point can be enabled with every character by setting bit D7 = 1.

Table 11. HEX Font

Register Data

D6:D4 D3 D2 D1 D0

Char-

acter

Char-

acter

Char-

acter

D7

D6:D4 D3 D2 D1 D0

X

0

1

0

1

0

1

0

1

0

1

X

0

1

0

1

0

1

0

1

0

1

0

1

X

1

X

1

X

0

1

X

0

1

0

1

X

1^*

^*The decimal point can be enabled with every character by setting bit D7 = 1.

Table 12. No-Decode Mode Data Bits and Corresponding Segment Lines

D7

D6

D5

D4

D3

D2

D1

D0

Corresponding Segment Line

DP

A

B

C

D

E

F

G

Figure 19. Standard 7-Segment LED

F

A

G

B

E

C

D

DP

www.austriamicrosystems.com

Revision 1.04

11 - 20

AS1116

Datasheet - Detailed Description

Display-Test Mode

The AS1116 can detect open or shorted LEDs. Readout of either open LEDs (D2=1) or short LEDs (D1=1) is possible,

as well as a OR relation of open and short (D1=D2=1). After a dignostic run bit D4 can be read to clearify if an error

occurred before reading out detailed diagnostic data.

Note: All settings of the digit- and control-registers are maintained.

Table 13. Testmode Register Summary

D7

D6

D5

D4

D3

D2

D1

D0

X

REXT_short REXT_open

LED_global

LED_test

LED_open

LED_short

DISP_test

Table 14. Testmode Register Bit Description (Address (HEX) = 0x0F))

Addr: 0x0F

Address

Bit

Bit Name

Default Access

D7:D0

Optical display test. (Testmode for external visual test.)

0: Normal operation; 1: Run display test (All digits are tested

independently from scan limit & shutdown register.)

D0

DISP_test

0

W

Starts a test for shorted LEDs. (Can be set together with D2)

0: Normal operation; 1: Activate testmode

D1

D2

D3

D4

D5

LED_short

LED_open

LED_test

0

W

R

Starts a test for open LEDs. (Can be set together with D1)

0: Normal operation; 1: Activate testmode

Indicates an ongoing open/short LED test

0: No ongoing LED test; 1: LED test in progress

Indicates that the last open/short LED test has detected an error

0: No error detected; 1: Error detected

LED_global

REXT_open

REXT_short

R

Checks if external resistor REXT is open

0: REXT correct; 1: REXT is open

R

Checks if external resistor REXT is shorted

0: REXT correct; 1: REXT is shorted

D6

D7

0

R

-

Not used

LED Diagnostic Registers

These eight registers contain the result of the LED open/short test for the individual LED of each digit.

Table 15. LED Diagnostic Register Address

Register

HEX

Address

Segment

Register

HEX

Address

Segment

Digit D7 D6 D5 D4 D3 D2 D1 D0

DIG0

DIG1

DIG2

DIG3

DIG4

DIG5

DIG6

DIG7

0x14

0x15

0x16

0x17

0x18

0x19

0x1A

0x1B

DP

A

B

C

D

E

F

G

DP

A

B

C

D

E

F

G

Note: If more than 2 shorts occure in the LED array, detection of individual LED fault could become limited to blocs.

Intensity Control Register (0x0A)

The brightness of the display can be controlled by digital means using the Intensity Control Registers and by analog

means using RSET (see Selecting RSET Resistor Value and Using External Drivers on page 15). The intensity can be

controlled globally for all digits, or for each digit individually. The global intensity command will write intensity data to all

four individual brightness registers, while the individual intesity command will only write to the associated individual

intensity register.

www.austriamicrosystems.com

Revision 1.04

12 - 20

AS1116

Datasheet - Detailed Description

Display brightness is controlled by an integrated pulse-width modulator which is controlled by the lower-nibble of the

Intensity Control Register. The modulator scales the average segment-current in 16 steps from a maximum of 15/16

down to 1/16 of the peak current set by RSET.

Table 16. Intensity Register Format

Register Data

MSB D2 D1 LSB

Register Data

MSB D2 D1 LSB

Duty Cycle

HEX Code

Duty Cycle

HEX Code

1/16 (min on)

2/16

0xX0

0xX1

0xX2

0xX3

0xX4

0xX5

0xX6

0xX7

0

1

0

1

0

1

0

1

0

1

0

1

0

1

9/16

10/16

11/16

12/16

13/16

0xX8

0xX9

0xXA

0xXB

0xXC

0xXD

0xXE

0xXF

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

3/16

4/16

5/16

6/16

7/16

8/16

14/16

15/16

15/16 (max on)

Table 17. Intensity Register Address

Register Data

Register HEX Address

Type

Global

Digit

D7:D4

X

Digit 1 Intensity

Digit 3 Intensity

Digit 5 Intensity

Digit 7 Intensity

D3:D0

0x0A

0x10

0x11

0x12

0x13

Global Intensity

Digit 0 Intensity

Digit 2 Intensity

Digit 4 Intensity

Digit 6 Intensity

Digit

Scan-Limit Register (0x0B)

The Scan-Limit Register controls which of the digits are to be displayed. When all 8 digits are to be displayed, the

update frequency is typically 0.8kHz. If the number of digits displayed is reduced, the update frequency is increased.

The frequency can be calculated using 8fOSC/N, where N is the number of digits. Since the number of displayed digits

influences the brightness, RSET should be adjusted accordingly.

Note: To avoid differences in brightness this register should not be used to blank parts of the display (leading zeros).

Table 18. Scan-Limit Register Format (Address (HEX) = 0x0B))

Register Data

HEX

Code

HEX

Code

Scan Limit

D7:D3 D2 D1 D0

Display digit 0 only

Display digits 0:1

Display digits 0:2

Display digits 0:3

0xX0

0xX1

0xX2

0xX3

X

0

1

0

1

0

1

Display digits 0:4

Display digits 0:5

Display digits 0:6

Display digits 0:7

0xX4

0xX5

0xX6

0xX7

X

1

0

1

0

1

0

1

www.austriamicrosystems.com

Revision 1.04

13 - 20

AS1116

Datasheet - Detailed Description

Feature Register (0x0E)

The Feature Register is used for enabling various features including switching the device into external clock mode,

applying an external reset, selecting code-B or HEX decoding, enabling or disabling blinking, enabling or disabling the

SPI-compatible interface, setting the blinking rate, and resetting the blink timing.

Note: At power-up the Feature Register is initialized to 0.

Table 19. Feature Register Summary

D7

D6

D5

D4

D3

D2

D1

D0

blink_

start

blink_

freq_sel

sync

blink_en

NU

decode_sel

reg_res

clk_en

Table 20. Feature Register Bit Descriptions (Address (HEX) = 0xXE)

Feature Register

Addr: 0xXE

Enables and disables various device features.

Bit

Bit Name

Default

Access

Bit Description

External clock active.

0 = Internal oscillator is used for system clock.

D0

clk_en

0

R/W

1 = Pin CLK of the serial interface operates as system clock input.

Resets all control registers except the Feature Register.

0 = Reset Disabled. Normal operation.

D1

reg_res

0

R/W

1 = All control registers are reset to default state (except the Feature

Register) identically after power-up.

Note: The Digit Registers maintain their data.

Selects display decoding for the selected digits (Table 9 on page 10).

0 = Enable Code-B decoding (see Table 10 on page 11).

1 = Enable HEX decoding (see Table 11 on page 11).

Not used

Enables blinking.

0 = Disable blinking. 1 = Enable blinking.

Sets blink with low frequency (with the internal oscillator enabled):

0 = Blink period typically is 1 second (0.5s on, 0.5s off).

1 = Blink period is 2 seconds (1s on, 1s off).

D2

decode_sel

D3

D4

NU

blink_en

0

R/W

D5 blink_freq_sel

Synchronizes blinking on the rising edge of pin LD. The multiplex and

blink timing counter is cleared on the rising edge of pin LD. By setting

this bit in multiple devices, the blink timing can be synchronized across

all the devices.

Start Blinking with display enabled phase. When bit D4 (blink_en) is set,

bit D7 determines how blinking starts.

D6

D7

sync

0

R/W

blink_start

0 = Blinking starts with the display turned off.

1 = Blinking starts with the display turned on.

No-Op Register (0xX0)

The No-Op Register is used when multiple AS1116 devices are cascaded in order to support displays with more than 8

digits. The cascading must be done in such a way that all SDO pins are connected to SDI of the next AS1116 (see Fig-

ure 20 on page 16). The LD and SCL signals are connected to all devices.

For example, if five devices are cascaded, in order to perform a write operation to the fifth device, the write-command

must be followed by four no-operation commands. When the LD signal goes high, all shift registers are latched. The

first four devices will receive no-operation commands and only the fifth device will receive the intended operation com-

mand, and subsequently update its register.

www.austriamicrosystems.com

Revision 1.04

14 - 20

AS1116

Datasheet - Typical Application

9 Typical Application

Selecting RSET Resistor Value and Using External Drivers

Brightness of the display segments is controlled via RSET. The current that flows between VDD and ISET defines the

current that flows through the LEDs.

Segment current is about 200 times the current in ISET. Typical values for RSET for different segment currents, operat-

ing voltages, and LED voltage drop (VLED) are given in Table 21 & Table 22. The maximum current the AS1116 can

drive is 47mA. If higher currents are needed, external drivers must be used, in which case it is no longer necessary

that the devices drive high currents.

Note: The display brightness can also be logically controlled (see Intensity Control Register (0x0A) on page 12).

Table 21. RSET vs. Segment Current and LED Forward Voltage, VDD = 2.7V & 3.3V & 3.6V

VLED

2.0V

VLED

2.0V

ISEG (mA)

1.5V

5kΩ

2.0V

4.4kΩ

5.9kΩ

9.6kΩ

20.7kΩ

1.5V

2.5V

5.7kΩ

8.1kΩ

12.6kΩ

26kΩ

1.5V

2.5V

6.6kΩ

9.2kΩ

14.3kΩ

3.0V

40

30

20

10

6.7kΩ

9.1kΩ

13.9kΩ

28.8kΩ

6.4kΩ

8.8kΩ

13.3kΩ

27.7kΩ

7.5kΩ

7.2kΩ

9.8kΩ

15kΩ

31kΩ

5.5kΩ

7.5kΩ

13kΩ

6.9kΩ

10.7kΩ

22.2kΩ

10.18kΩ

15.6kΩ

31.9kΩ

29.5kΩ 27.3kΩ

Table 22. RSET vs. Segment Current and LED Forward Voltage, VDD = 4.0V & 5.0V

VLED

2.5V

VLED

2.5V

ISEG

(mA)

1.5V

2.0V

3.0V

3.5V

1.5V

2.0V

3.0V

3.5V

4.0V

40

30

20

10

8.6kΩ

8.3kΩ

7.9kΩ

7.6kΩ 5.2kΩ

11.35kΩ 11.12kΩ 10.84kΩ 10.49kΩ 10.2kΩ 9.9kΩ

15.4kΩ 15.1kΩ 14.7kΩ 14.4kΩ 13.6kΩ 13.1kΩ

11.6kΩ 11.2kΩ 10.8kΩ 9.9kΩ 7.8kΩ

17.7kΩ 17.3kΩ 16.6kΩ 15.6kΩ 13.6kΩ

36.89kΩ 35.7kΩ 34.5kΩ 32.5kΩ 29.1kΩ

23.6kΩ 23.1kΩ 22.6kΩ

22kΩ 21.1kΩ 20.2kΩ

48.9kΩ 47.8kΩ 46.9kΩ 45.4kΩ 43.8kΩ 42kΩ

Calculating Power Dissipation

The upper limit for power dissipation (PD) for the AS1116 is determined from the following equation:

PD = (VDD x 5mA) + (VDD - VLED)(DUTY x ISEG x N)

(EQ 1)

Where:

VDD is the supply voltage.

DUTY is the duty cycle set by intensity register (page 13).

N is the number of segments driven (worst case is 8)

VLED is the LED forward voltage

ISEG = segment current set by RSET

Dissipation Example:

ISEG = 40mA, N = 8, DUTY = 15/16, VLED = 2.2V at 40mA, VDD = 5V

PD = 5V(5mA) + (5V - 2.2V)(15/16 x 40mA x 8) = 0.865W

(EQ 2)

(EQ 3)

Thus, for a QSOP-24 package ΘJA = +88°C/W, the maximum allowed TAMB is given by:

TJ,MAX = TAMB + PD x ΘJA = 150°C = TAMB + 0.865W x 88°C/W

(EQ 4)

In this example the maximum ambient temperature must stay below 73.88°C.

www.austriamicrosystems.com

Revision 1.04

15 - 20

AS1116

Datasheet - Typical Application

8x8 Dot Matrix Mode

The application example in Figure 20 shows the AS1116 in the 8x8 LED dot matrix mode.

The LED columns have common cathodes and are connected to the DIG0:7 outputs. The rows are connected to the

segment drivers. Each of the 64 LEDs can be addressed separately. The columns are selected via the digits as listed

in Table 7 on page 9.

The Decode Enable Register (see page 10) must be set to ‘00000000’ as described in Table 9 on page 10. Single

LEDs in a column can be addressed as described in Table 12 on page 11, where bit D0 corresponds to segment G and

bit D7 corresponds to segment DP.

Note: For a multiple-digit dot matrix, multiple AS1116 devices can be cascaded easily.

Figure 20. Application Example as LED Dot Matrix Driver

DIG0 to

DIG7

VDD

2.7 to 5V

9.53kΩ

SEG A to G

SEP DP

ISET

SDI

AS1116

I/O

SCL

LD

Diode Arrangement

I/O

µP

SDO

I/O

GND

Diagnostic

readback: open

& shorted LEDs

Supply Bypassing and Wiring

In order to achieve optimal performance the AS1116 should be placed very close to the LED display to minimize effects

of electromagnetic interference and wiring inductance.

Furthermore, it is recommended to connect a 10µF electrolytic and a 0.1µF ceramic capacitor between pins VDD and

GND to avoid power supply ripple (see Figure 20 on page 16).

www.austriamicrosystems.com

Revision 1.04

16 - 20

AS1116

Datasheet - Package Drawings and Markings

10 Package Drawings and Markings

The AS1116 is available in the QSOP-24 package.

Figure 21. QSOP-24 Package

Symbol

Min

1.35

0.10

1.37

0.20

0.19

8.55

5.79

3.81

Max

1.75

0.25

1.57

0.30

0.25

8.74

6.20

3.99

A

A1

A2

b

C

D

E

E1

e

0.635 BSC

h

0.22

0.40

0º

0.49

1.27

8º

L

θ

www.austriamicrosystems.com

Revision 1.04

17 - 20

AS1116

Datasheet - Package Drawings and Markings

Figure 22. TQFN(4x4)-24 Package

19

20

21

22

23

24

18

17

16

15

14

13

1

2

3

4

5

6

12

11

10

9

8

7

m

Symbol

Min

0.50

0.00

Typ

Max

0.60

0.05

Symbol

e

Min

Typ

Max

A

A1

A3

b

0.55

0.50BSC

0.35

L

0.30

0.00

0.40

0.10

0.152REF

0.23

L1

0.18

0.28

aaa

bbb

ccc

ddd

eee

0.10

0.05

0.08

D

4.00BSC

2.80

E

D2

E2

2.70

2.90

2.80

Notes:Unilateral coplanarity zone applies to the exposed heat sink slug as well as the terminals.

1. Dimensioning and tolerancing conform to ASME Y14.5M-1994.

2. All dimensions are in millimeters; angles in degrees.

3. Dimension b applies to metallized terminal and is measured between 0.25mm and 0.30mm from terminal tip.

Dimension L1 represents terminal full back from package edge up to 0.1mm is acceptable.

4. Coplanarity applies to the exposed heat slug as well as the terminal.

5. Radius on terminal is optional.

www.austriamicrosystems.com

Revision 1.04

18 - 20

AS1116

Datasheet - Ordering Information

11 Ordering Information

The devices are available as the standard products shown in Table 23.

Table 23. Ordering Information

Ordering Code

Marking

Desciption

Delivery Form

Package

64 LED Driver with Detailed

Error Detection

AS1116-BSST

AS1116

Tape and Reel

QSOP-24

64 LED Driver with Detailed

Error Detection

AS1116-BQFT

ASR9

Tape and Reel

TQFN(4x4)-24

All devices are RoHS compliant and free of halogene substances.

www.austriamicrosystems.com

Revision 1.04

19 - 20

AS1116

Datasheet

Copyrights

translated, stored, or used without the prior written consent of the copyright owner.

All products and companies mentioned are trademarks or registered trademarks of their respective companies.

Disclaimer

Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing

in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding

the information set forth herein or regarding the freedom of the described devices from patent infringement.

austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice.

Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for

current information. This product is intended for use in normal commercial applications. Applications requiring

extended temperature range, unusual environmental requirements, or high reliability applications, such as military,

medical life-support or life-sustaining equipment are specifically not recommended without additional processing by

austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show

deviations from the standard production flow, such as test flow or test location.

The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However,

austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to

personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or

consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the

technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of

austriamicrosystems AG rendering of technical or other services.

Contact Information

Headquarters

austriamicrosystems AG

Tobelbaderstrasse 30

A-8141 Unterpremstaetten - Graz, Austria

Tel: +43 (0) 3136 500 0

Fax: +43 (0) 3136 525 01

For Sales Offices, Distributors and Representatives, please visit:

http://www.austriamicrosystems.com/contact-us

www.austriamicrosystems.com

Revision 1.04

20 - 20


型号：	AS1116
厂家：	AMS(艾迈斯)
描述：	64 LED Driver with Detailed Error Detection 64 LED驱动器，详细的错误检测驱动器
文件：	总20页 (文件大小：1018K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

AS1116 [AMSCO]

相关型号：

AS1116-BQFT

AS1116-BSST

AS1116-XXX-I-A1-D

AS1116-XXX-I-A1-S

AS1116-XXX-I-A2-D

AS1116-XXX-I-A2-S

AS1116-XXX-I-A3-D

AS1116-XXX-I-A3-S

AS1116-XXX-I-L-A1-D

AS1116-XXX-I-L-A1-S

AS1116-XXX-I-L-A2-D

AS1116-XXX-I-L-A2-S