AP139-W [ANACHIP]
300mA Low-Noise CMOS LDO; 300mA低压噪声CMOS LDO
| 型号： | AP139-W |
| 厂家： | 
ANACHIP CORP |
| 描述： | 300mA Low-Noise CMOS LDO |
| 文件： | 总8页 (文件大小：183K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AP139
300mA Low-Noise CMOS LDO
Features
General Descriptions
- Very low dropout voltage
The AP139 is a positive voltage linear regulator
utilizing CMOS technology. The features that
include low quiescent current (45µA typ.), low
dropout voltage, and high output voltage accuracy,
make it ideal for battery applications. EN input
connected to CMOS has low bias current. The
space-saving SOT23-5L and TSOT23-5L package
is attractive for “Pocket” and “Hand Held”
applications.
- Low current consumption: Typ.45µA, Max. 60µA
- Output voltage: 1.5V,1.8V,2.0V, 2.5V, 2.8V, 3.0V
3.3V, and 3.5V
- Guaranteed 300mA output
- Input range up to 7.0V
- Thermal shutdown
- Current limiting
- Stability with low ESR capacitors
- Low temperature coefficient
- Pb-free package: SOT23-5L,TSOT23-5L
This rugged device has both thermal shutdown, and
current limit protections to prevent device failure
under the “Worst” operating conditions.
Applications
- Battery-powered devices
- Personal communication devices
- Home electric/electronic appliances
- PC peripherals
In a low noise, regulated supply application, a 10nF
capacitor is necessary to be placed in between
Bypass and Ground.
The AP139 is stable with a low ESR output
capacitor of 1.0µF or greater.
Pin Assignments
Pin Descriptions
(Top View)
VOUT
5
BYP
4
Pin
Pin
Function
Name No.
VIN
GND
EN
1
2
3
4
5
Power Supply
Ground
AP139
Enable Pin
Bypass Signal Pin
Output
BYP
VOUT
1
2
3
VIN
GND
EN
SOT23-5/TSOT23-5
Ordering Information
AP139 XX X X
Package
Packing
Output voltage
15: 1.5V
18: 1.8V
20: 2.0V
25: 2.5V
28: 2.8V
30: 3.0V
33: 3.3V
35: 3.5V
Blank: Tube
W : SOT23-5L
A: Taping
TW:TSOT23-5L
This datasheet contains new product information. Anachip Corp. reserves the rights to modify the product specification without notice. No liability is assumed as a result of the use of
this product. No rights under any patent accompany the sale of the product.
Rev.1.1 Jun 02, 2006
1/8
AP139
300mA Low-Noise CMOS LDO
Block Diagram
VIN
VOUT
Current
Limit
1uA
Thermal
R1
Shutdown
EN
BYP
-
AMP
+
Vref
R2
GND
Absolute Maximum Ratings
Symbol
Parameter
Rating
Unit
VIN
IOUT
VOUT
Input Voltage
Output Current
Output Voltage
+7
V
mA
V
PD/ (VIN-VO)
GND - 0.3 to VIN+ 0.3
B
ESD Classification
Ambient Temperature Range
Junction Temperature Range
TA
-40 to +85
-40 to +125
ºC
ºC
ThTeJrmal Information
Symbol
Parameter
Maximum
Unit
θjc
Thermal Resistance
SOT23-5L
SOT23-5L
160
250
150
300
ºC/W
mW
ºC
PD
Internal Power Dissipation (∆T=100 ºC)
Maximum Junction Temperature
Maximum Lead Temperature (10 sec)
TJ
TLead
ºC
Anachip Corp.
www.anachip.com.tw
Rev.1.1 Jun 02, 2006
2/8
AP139
300mA Low-Noise CMOS LDO
Electrical Characteristics
(TA=+25ºC, unless otherwise noted.)
Symbol
Parameter
Test Conditions
Min.
Typ. Max.
Unit
VIN
Input Voltage
Note 1
-
7
V
IQ
Quiescent Current
Standby Current
IO=0mA
VIN=5.0V, VOUT=0V, VEN < VEL
-
-
45
2.0
60
3.0
µA
µA
ISTB
VOUT
Output Voltage Accuracy IO=1mA, VIN=5V
-2
-
2
%
VOUT Temperature
Coefficient
-
50
-
ppm/ oC
VO =1.5V
O =1.8V
VO =2V
VO =2.5V
VO ≥2.8V
-
-
-
-
-
-
-
-
-
-
-
1.5
1.2
1
0.6
0.45
-
IO=1mA to 300mA,
VDROPOUT Dropout Voltage
V
V
OUT=VO(NOM)-1.5%
IOUT
Output Current
Current Limit
300
mA
mA
ILIMIT
VOUT > 1.05V
300
450
-
Ishort
Short Circuit Current
Line Regulation
Vcc=5V,Vout<1.05V
-
-
150
0.1
300
0.3
mA
%
△VLINE
△VLOAD
I
OUT=5mA, VIN=5~7V
Load Regulation
IO=1mA to 300mA, VIN=5V
-
0.3
60
50
40
75
55
30
-
1
-
-
-
-
-
-
-
0.8
<0.1
-
%
f=1KHz
-
IO=100mA,
PSRR Power Supply Rejection
dB
f=10KHz
f=100KHz
f=1KHz
-
CO=2.2µF ceramic
-
-
-
IO=100mA,
PSRR Power Supply Rejection CO=2.2µF ceramic,
dB
f=10KHz
f=100KHz
C
BYP=20nF
-
VEH
VEL
IEN
Output ON
1.7
V
V
µA
oC
EN Input Threshold
Output OFF
-
-
-
-
-
Enable Pin Current
Over Temperature
Shutdown
OTS
130
Over Temperature
Hysteresis
OTH
-
20
-
oC
Note 1. : VIN(MIN)=VOUT+VDROPOUT
Typical Application
VIN
VOUT
IN
OUT
AP139
GND
BYP
EN
C1
1uF
C2
10nF
C3
1uF
Anachip Corp.
www.anachip.com.tw
Rev.1.1 Jun 02, 2006
3/8
AP139
300mA Low-Noise CMOS LDO
Typical Performance Characteristics
Vcc Vs Quiescent Current
Vout Vs Dropout Voltage
100
1.6
1.4
1.2
1
90
80
70
60
50
40
30
20
0.8
0.6
0.4
0.2
0
Io=300mA
Io=200mA
TA=25℃
10
Io=100mA
0
3.5
4
4.5
5
5.5
6
6.5
7
1.5
1.8
2
2.5
2.8
3
3.3
3.5
Vcc (V)
Vout (V)
Power Supply Rejection Ratio
Power Supply Rejection Ratio
0
0
-10
-20
-30
-40
-50
-60
-70
BP=10nF
Iout=100mA
-10
-20
-30
-40
-50
-60
-70
-80
-90
100mA
10mA
BP=1nF
BP=5nF
1mA
BP=10nF
BP=20nF
-80
-90
1.0E+06
1.0E+04 1.0E+05
1.0E+00 1.0E+01 1.0E+02 1.0E+03
Frequency (Hz)
1.0E+00 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06
Frequency (Hz)
Power Supply Rejection Ratio
Vout Vs Current Limit
0
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
BP=0
-10
100mA
-20
-30
-40
10mA
-50
-60
1mA
-70
-80
Vcc=5V
3.5
-90
1.5
1.8
2
2.5
2.8
3
3.3
1.0E+00 1.0E+01 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06
Vout (V)
Frequency (Hz)
Anachip Corp.
www.anachip.com.tw
Rev.1.1 Jun 02, 2006
4/8
AP139
300mA Low-Noise CMOS LDO
Typical Performance Characteristics (Continued)
Vcc Vs Short Current
400
350
300
250
200
Top to bottom
Vout=1.5V
Vout=1.8V
Vout=2.5V
Vout=3.3V
150
100
50
0
3.5
4
4.5
5
5.5
6
6.5
7
Vcc (V)
Function Description
The AP139 of CMOS regulators contain a PMOS
pass transistor, voltage reference, error amplifier,
over-current protection, thermal shutdown.
Enable
The enable pin normally floats high. When actively,
pulled low, the PMOS pass transistor shut off, and
all internal circuits are powered down. In this state,
the quiescent current is less than 2µA. This pin
behaves much like an electronic switch.
The P-channel pass transistor receives data from
the error amplifier, over-current protection, and
thermal protection circuits. During normal operation,
the error amplifier compares the output voltage to a
precision reference. Over-current and thermal
shutdown circuits become active when the junction
temperature exceeds 130oC, or the current exceeds
300mA. During thermal shutdown, the output
voltage remains low. Normal operation is restored
when the junction temperature drops below 110oC.
External Capacitor
The AP139 is stable with a low ESR output
capacitor to ground of 1.0µF or greater. It can keep
stable even with higher ESR capacitors. A second
capacitor is recommended between the input and
ground to stabilize VIN. The input capacitor should
be larger than 0.1µF to have a beneficial effect. All
capacitors should be placed in close proximity to
the pins. A “quiet” ground termination is desirable.
The AP139 switches from voltage mode to current
mode when the load exceeds the rated output
current. This prevents over-stress.
Anachip Corp.
www.anachip.com.tw
Rev.1.1 Jun 02, 2006
5/8
AP139
300mA Low-Noise CMOS LDO
Marking Information
5
4
Appendix
Identification
XX : Identification code
(See Appendix)
Y : Year: 0-9
Output version
Code
N0
XX Y M
AP139-1.5V
AP139-1.8V
AP139-2.0V
AP139-2.5V
AP139-2.8V
AP139-3.0V
AP139-3.3V
AP139-3.5V
M : Month: A~L
N1
1
2
3
N2
N3
SOT23-5L
N4
5
4
N5
XX : Identification code
(See Appendix)
Y : Year: 0-9
N6
N7
XX Y M
M : Month: A~L
1
2
3
TSOT23-5L
Anachip Corp.
www.anachip.com.tw
Rev.1.1 Jun 02, 2006
6/8
AP139
300mA Low-Noise CMOS LDO
Package Information
(1)Package Type: SOT23-5L
D
GAUGE PLANE
θ
L
L1
e1
e
VIEW C
1(4x)
θ
SEE VIEW C
2(4x)
θ
b(5x)
Dimensions In Millimeters
Dimensions In Inches
Symbol
Min.
1.05
Nom.
Max.
1.35
Min.
0.041
0.002
0.039
0.010
0.003
0.106
0.059
0.102
0.012
0.020
0.071
0.033
0o
Nom.
-
Max.
0.053
0.006
0.047
0.020
0.008
0.118
0.067
0.118
0.024
0.028
0.079
0.041
10o
A
-
A1
A2
b
C
D
E
HE
L
L1
e
e1
θ
0.05
1.00
0.25
0.08
2.70
1.50
2.60
0.30
0.50
1.80
0.85
0o
-
0.15
1.20
0.50
0.20
3.00
1.70
3.00
0.60
0.70
2.00
1.05
10o
-
1.10
-
-
2.90
1.60
2.80
-
0.043
-
-
0.114
0.063
0.110
-
0.60
1.90
0.95
5o
0.024
0.075
0.037
5o
θ1
θ2
3o
6o
5o
8o
7o
3o
6o
5o
8o
7o
10o
10o
Anachip Corp.
www.anachip.com.tw
Rev.1.1 Jun 02, 2006
7/8
AP139
300mA Low-Noise CMOS LDO
Package Information (Continued)
(2) Package Type: TSOT23-5L
θ
D
R
b
C
L2
e
e1
θ2
y
4xθ1
Dimensions In Millimeters
Symbol
Dimensions In Inches
Min.
0.75
0.00
0.70
0.35
0.10
2.80
2.60
1.50
Nom.
Max.
Min.
Nom.
Max.
A
A1
A2
b
C
D
E
E1
e
-
-
0.90
0.10
0.80
0.51
0.25
3.00
3.00
1.70
0.030
-
0.035
0.004
0.031
0.020
0.010
0.118
0.118
0.067
0.000
0.028
0.014
0.004
0.110
0.102
0.059
-
0.030
-
0.75
-
-
2.90
2.80
1.60
-
0.114
0.110
0.063
0.037
0.075
-
0.95 BSC.
e1
L
1.90 BSC.
0.37
-
-
0.015
-
L1
L2
y
R
θ
0.60 REF.
0.25 BSC.
0.024
0.010
-
-
-
-
-
0.10
-
-
0.004
0.10
0.004
-
-
-
0o
8o
0o
8o
θ1
θ2
7o NOM.
5o NOM.
7o NOM.
5o NOM.
Anachip Corp.
www.anachip.com.tw
Rev.1.1 Jun 02, 2006
8/8
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