ATA00501D1C [ANADIGICS]
AGC TRANSIMPEDANCE AMPLIFIER; AGC阻放大器
| 型号： | ATA00501D1C |
| 厂家： | 
ANADIGICS, INC |
| 描述： | AGC TRANSIMPEDANCE AMPLIFIER |
| 文件： | 总8页 (文件大小：222K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ATA00501
AGC TransimpedanceAmplifier
SONET OC-1
PRELIMINARY DATA SHEET-Rev 1.5
FEATURES
·
·
·
·
·
Single +5 Volt Supply
Automatic Gain Control
-43 dBm Sensitivity
0 dBm Optical Overload
70 MHz Bandwidth
VDD2
VDD1
GND
GND
1992
19F
IIN
APPLICATIONS
VOUT
GND
GND
·
·
·
OC-1 Receiver
FITL
CAGC
CBY
CBY
GND
GND
GND
GND
Low Noise RF Amplifier
S2
D1C
12 Pin 4 Sided SQFP
Package
PRODUCT DESCRIPTION
The ANADIGICS ATA00501 is a 5V low noise
transimpedance amplifier with AGC designed to be
used in OC-1 fiber optic links. The device is used in
conjunction with a photodetector (PIN diode or
avalanche photodiode) to convert an optical signal
into an output voltage. TheATA00501 has a bandwidth
of 70MHz and a dynamic range in excess of 40dB. It
is manufactured in a GaAs MESFET process and
available in bare die form or a 12 pin SQFP package.
VDD
AGC
60K
70K
AGC
C
+
4pF
IIN
- 35
+ 0.8
VOUT
VGA
GND
or
neg.supply
GND
20pF
PATENT PENDING
BY
C
Photodetector cathode must be connected
To IIN for proper AGC operation
Figure 1:ATA00501 Equivalent Circuit
08/2001
1
ATA00501
Table 1: ATA00501D1C Pad Description (Die Only)
PAD
VDD1
VDD2
IIN
DESCRIPTION
VDD1
COMMENT
Positive supply for input gain stage
Positive supply for second gain stage
Connect detector cathode for proper operation
Requires external DC block
VDD2
TIA Input Current
TIA Output Voltage
External AGC Capacitor
VOUT
CAGC
CBY
70K * CAGC= AGC time constant
Input gain stage bypass capacitor >56 pF
11
12
10
VDD2
VDD1
GND
GND
1992
1
2
3
9
925 um
19F
IIN
8
OUT
V
7
GND
GND
CAGC
CBY
CBY
GND
GND
GND
GND
1250 um
4
5
6
Figure 3: Pin Layout
Figure 2: Bonding Pad Layout (Die Only)
Table 2:ATA00501S2C Pin Description
PIN DESCRIPTION PIN DESCRIPTION
1
NC
7
VOUT
GND
NC
2
3
GND
8
9
I
IN
4
10
CBY
VDD
GND
NC
5
6
GND
11
12
CAGC
ELECTRICAL CHARACTERISTICS
Table 3: Absolute Maximum Ratings
VDD1
VDD2
7.0 V
7.0 V
5 mA
I
IN
o
o
TA
TS
Operating Temp. - 40 C to 125
C
Storage Temp. - 65 C to 150 o C
o
Stresses in excess of the absolute ratings
may cause permanent damage. Functional
operation is not implied under these
conditions. Exposure to absolute ratings for
extended periods of time may adversely
affect reliability.
PRELIMINARY DATA SHEET - Rev 1.5
21.
08/2001
ATA00501
Table 4: Electrical Specifications
PARAMETER
MIN
TYP
MAX
UNIT
Transresistance(RL= ,Idc<500nA)
¥
55
K
W
15
50
28
70
K
(1)
W
Transresistance (R L=50
Bandwith -3dB
)
MHz
Input Resistance (2)
Output Resistance
Input Offset Voltage
Output Offset Voltage
Offset Voltage Drift
1500
50
W
30
60
W
1.5
1.6
1.8
1
1.9
Volts
Volts
mV/oC
5
10
A
m
AGC Threshold (I ) (3)
IN
Optical Overload (4)
-3
0
dBm
AGC Time Constant(6)
Optical Sensitivity - DIE (7)
16
sec
m
- 43
-41
dBm
dBm
Optical Sensitivity - SQFP (7)
Supply Current
30
45
+ 6.0
85
mA
Volts
oC
Operating Voltage Range
Operating Temperature Range
+ 4.5
- 40
+ 5.0
Notes:
(1) f=50MHz
(2) Measured with I below AGC Threshold. During AGC, input impedance will decrease propor-
IN
tionally to IIN
(3) Defined as the I where Transresistance has decreased by 50%.
IN
(4) See note on Indirect Measurement of Optical Overload.
(5) See note on Measurement of Input Referred Noise Current.
(6) CAGC = 56 pF
(7) Parameter is guaranteed (not tested) by design and characterization data @ 51Mb/s, assuming
detector responsivity of 0.9
PRELIMINARY DATA SHEET - Rev 1.5
3
08/2001
ATA00501
APPLICATION INFORMATION
VDD
0.1µF
NC
12
VDD
11
10
56pF
56pF
GND
NC
1
2
NC
9
VDD2
GND
V
DD
8
0.1µF
Vout
60C
GND
1992
IIN
PIN
7
3
I
IN
GND
GND
VOUT
OUT
GND
GND
C
BY
CBY
GND
or
C
AGC
4
GND
GND
5
6
Neg.Supply
56pF
56pF
56 pF
56 pF
Figure 4: ATA 00501D1C Typical Bonding
Figure 5: ATA 00501S2C External Circuit
Power Supplies and General Layout
degradation in bandwidth and sensitivity (see
Considerations
Bandwidth vs. C curves).
T
The ATA00501S2C may be operated from a positive
supply as low as + 4.5 V and as high as + 6.0 V.
Below + 4.5 V, bandwidth, overload and sensitivity
will degrade, while at + 6.0 V, bandwidth, overload
and sensitivity improve (see Bandwidth vs.
Temperature curves). Use of surface mount, low
inductance power supply bypass capacitors
(>=56pF) are essential for good high frequency and
low noise performance. The power supply bypass
capacitors should be mounted on or connected to a
good low inductance ground plane.
Figure 6: Bandwidth vs. Temperature
T
C = 0.5 pF
0.09
0.08
0.07
0.06
0.05
0.04
VDD
=
5.5 V
VDD
=
5.0 V
General Layout Considerations
Since the gain stages of the transimpedance
amplifier have an open loop bandwidth in excess
of 1.0 GHz, it is essential to maintain good high
frequency layout practices. To prevent oscillations,
a low inductance RF ground plane should be made
available for power supply bypassing. Traces that
can be made short should be made short, and the
utmost care should be taken to maintain very low
capacitance at the photodiode-TIA interface (IIN),
excess capacitance at this node will cause a
VDD=
4.5 V
-40
10
60
85
Temperature (C)
PRELIMINARY DATA SHEET - Rev 1.5
41.
08/2001
ATA00501
Figure 7: Bandwidth vs. CT
Figure 9: Bandwidth vs. IIN
1.44
1.24
1.04
.84
90
80
70
60
50
40
30
≈
π
in
t
B(3dB) A/ 2 Rf(C +C)
VDD = 5.5 V
VDD = 5.5 V
VDD= 5.0 V
.64
Rf
.44
VDD = 4.5 V
VDD= 4.5 V
.24
50
I
IN
.04
- 2.1
- 1.6
- 1.1
- 0.6
- 0.1
0
0.2
0.4 0.6
0.8
1
1.2
IIN (mA DC)
C (pF)
T
o
Note: All performance curves are typical @ T =25
A
C
V
Connection
OUT
unless otherwise noted.
The output pad should be connected via a coupling
capacitor to the next stage of the receiver channel
(filter or decision circuits), as the output buffers are
not designed to drive a DC coupled 50 ohm load
(this would require an output bias current of
approximately 36 mA to maintain a quiescent 1.8
I
Connection
IN
(Refer to the equivalent circuit diagram.) Bonding
the detector cathode to I (and thus drawing current
from the ATA00501) improves the dynamic range.
Although the detector may be used in the reverse
direction for input currents not exceeding 25mA, the
specifications for optical overload will not be met.
IN
Volts across the output load). If V
is connected
OUT
to a high input impedance decision circuit (>500
ohms), then a coupling capacitor may not be
required, although caution should be exercised
since DC offsets of the photo detector/TIA
combination may cause clipping of subsequent gain
or decision circuits.
Figure 8: Transimpedance vs. IIN
25
22
19
16
13
Figure 10: VOUT vs. IIN
3.4
3.2
Heavy AGC
3.0
Output Collapse
2.9
50
IN
I
2.7
2.5
(
10
7
2.4
VDD = 5.5 V
2.2
Linear Region
2.0 o
1.9
1.7
1.5
1.4
1.2
1.0
0.8
0.7
0.5
0.3
0.2
0.0
VDD = 5.5 V
f
R
4
IIN
VDD = 4.5 V
1
VDD = 4.5 V
-0.6
vOUT
-2.1
-1.6
-1.1
-0.1
-4
- 3
- 2
- 1
IN
I
(mA DC)
IIN (mA DC)
PRELIMINARY DATA SHEET - Rev 1.5
5
08/2001
ATA00501
Figure 11: Input Offset Voltage vs. Temperature
Indirect Measurement of Optical Overload
Optical overload can be defined as the maximum
1.9
optical power above which the BER (bit error rate)
10
increases beyond 1 error in 10
bits. The
1.85
1.8
ATA00501D1C is 100% tested at die sort by a DC
measurement which has excellent correlation with
an PRBS optical overload measurement. The
measurement consists of sinking a negative current
1.75
1.7
V
DD = 5.5 V
VDD =
5.0V
(see V
vs I figure) from the TIA and determining
OUT
IN
1.65
1.6
the point of output voltage collapse. Also the input
node virtual ground during heavy AGC is checked to
verify that the linearity (i.e. pulse width distortion) of
the amplifier has not been compromised.
1.55
1.5
VDD =
4.5V
Measurement of Input Referred Noise Current
The Input Noise Current is directly related to
sensitivity . It can be defined as the output noise
voltage (Vout), with no input signal, (including a 30
MHz lowpass filter at the output of the TIA) divided by
the AC transresistance.
- 40
10
Temperature oC
60
C
Connection
BY
The C
Figure 12: Input Referred Noise Spectral Density
pad must be connected via a low
BY
inductance path to a surface mount capacitor of at
least 56pF (additional capacitance can be added in
parallel with the 56 pF or 220 pF capacitors to
improve low frequency response and noise
performance). Referring to the equivalent circuit
diagram and the typical bonding diagram, it is critical
that the connection from CBY to the bypass capacitor
use two bond wires for low inductance, since any
high frequency impedance at this node will be fed
back to the open loop amplifier with a resulting loss
of transimpedance bandwidth. Two pads are
provided for this purpose.
7
R
f
6
5
4
3
2
1
CT
50
C
T
=1.0pF
CT =0.5pF
1000
- 0.1
1
10
100
Frequency (MHz)
Sensitivity and Bandwidth
In order to guarantee sensitivity and bandwidth
FIgure 13: Input Referred Noise vs Temperature
performance, the TIA is subjected to
a
10
comprehensive series of tests at the die sort level
(100% testing at 25 C) to verify the DC parametric
o
V
DD = 4.5 V
performance and the high frequency performance
(i.e. adequate |S21|) of the amplifier.Acceptably high
|S21| of the internal gain stages will ensure low
amplifier input capacitance and hence low input
referred noise current. Transimpedance sensitivity
and bandwidth are then guaranteed by design and
correlation with RF and DC die sort test results.
25dB
9
8
30
MHz
LPF
TIA
0.5pF
7
6
5
V
DD =5.5V
6500in
R
η
(dBm) = 10 LOG
-40
0
40
80
Temperature ( 0C)
PRELIMINARY DATA SHEET - Rev 1.5
61.
08/2001
ATA00501
AGC Capacitor
It is important to select an external AGC capacitor of
high quality and appropriate size. TheATA00501D1C
has an on-chip 70 KW resistor with a shunt 4 pF
capacitor to ground. Without external capacitance
the chip will provide an AGC time constant of 280
nS. For the best performance in a typical 51MB/s
SONET receiver, a minimumAGC capacitor of 56pF
is recommended. This will provide the minimum
amount of protection against pattern sensitivity and
pulse width distortion on repetitive data sequences
during high average optical power conditions.
Conservative design practices should be followed
when selecting an AGC capacitor, since unit to unit
variability of the internal time constant and various
data conditions can lead to data errors if the chosen
value is too small.
Phase Response
At frequencies below the 3dB bandwidth of the
device, the transimpedance phase response is
characteristic of a single pole transfer function (as
shown in the Phase vs Frequency curve). The output
impedance is essentially resistive up to 1000 MHz.
Figure 14: Phase (IIN to VOUT)
180
200
Rf
VOUT
220
240
IIN
0.5pF
50
100
150
Frequency (MHz)
PRELIMINARY DATA SHEET - Rev 1.5
7
08/2001
ATA00501
PACKAGE OUTLINE
0.245 (6.22)
0.230 (5.84)
0.065 (1.65)
0.055 (1.40)
0.165 (4.19)
0.152 (3.86)
7°
0o
0.047 (1.19)
0.032 (0.81)
0.035 (.89)
0.020 (.51)
11
10
12
0.018 (.460)
0.012 (.300)
0.021X45°
4 Sides
1
2
3
9
8
7
0.015 (.38)
0.000 (0.00)
0.000 (0.00)
0.020 (.51)
4
5
6
4X 0.023X45°
0.024 (.61)
0.018 (.46)
0.011 (.28)
0.007 (.18)
0.032 BSC
(0.81)
Figure 15:ATA00501S2C Package Pin-Out (S2C)
Dimensions in Inches (Millimeters)
ORDERING INFORMATION
PART NUMBER
ATA00501D1C
ATA00501S2C
PACKAGE OPTION
PACKAGE DESCRIPTION
Die
D1C
S2C
12 Pin 4 Sided SQFP Package
ANADIGICS, Inc.
141 Mount Bethel Road
Warren, New Jersey 07059, U.S.A.
Tel: +1 (908) 668-5000
Fax: +1 (908) 668-5132
URL: http://www.anadigics.com
E-mail: Mktg@anadigics.com
IMPORTANT NOTICE
ANADIGICS, Inc. reserves the right to make changes to its products or to discontinue any product at any time without
notice. The product specifications contained in Advanced Product Information sheets and Preliminary Data Sheets are
subject to change prior to a products formal introduction. Information in Data Sheets have been carefully checked and are
assumed to be reliable; however, ANADIGICS assumes no responsibilities for inaccuracies. ANADIGICS strongly urges
customers to verify that the information they are using is current before placing orders.
WARNING
ANADIGICS products are not intended for use in life support appliances, devices or systems. Use of an ANADIGICS
product in any such application without written consent is prohibited.
PRELIMINARY DATA SHEET - REV 1.5
8
08/2001
相关型号：
©2020 ICPDF网 联系我们和版权申明