AM40N04-20D [ANALOGPOWER]
N-Channel 40-V (D-S) MOSFET; N通道40 -V （D -S ）的MOSFET
| 型号： | AM40N04-20D |
| 厂家： | 
ANALOG POWER |
| 描述： | N-Channel 40-V (D-S) MOSFET |
| 文件： | 总5页 (文件大小：347K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Analog Power
AM40N04-20D
N-Channel 40-V (D-S) MOSFET
PRODUCT SUMMARY
Key Features:
rDS(on) (mΩ)
VDS (V)
40
ID(A)
39
• Low rDS(on) trench technology
• Low thermal impedance
• Fast switching speed
22 @ VGS = 10V
27 @ VGS = 4.5V
36
Typical Applications:
• White LED boost converters
• Automotive Systems
• Industrial DC/DC Conversion Circuits
ABSOLUTE MAXIMUM RATINGS (TA = 25°C UNLESS OTHERWISE NOTED)
Parameter
Symbol
VDS
VGS
ID
Limit
40
Units
Drain-Source Voltage
Gate-Source Voltage
V
±20
Continuous Drain Current a
TA=25°C
TA=25°C
39
A
Pulsed Drain Current b
IDM
100
Continuous Source Current (Diode Conduction) a
IS
47
A
Power Dissipation a
PD
50
W
°C
Operating Junction and Storage Temperature Range
TJ, Tstg
-55 to 150
THERMAL RESISTANCE RATINGS
Parameter
Symbol Maximum Units
Maximum Junction-to-Ambient a
Maximum Junction-to-Case
RθJA
40
°C/W
RθJC
3
Notes
a.
Surface Mounted on 1” x 1” FR4 Board.
b.
Pulse width limited by maximum junction temperature
© Preliminary
1
Publication Order Number:
DS_AM40N04-20D_1A
Analog Power
AM40N04-20D
Electrical Characteristics
Parameter
Symbol
Test Conditions
Static
Min
Typ
Max
Unit
VGS(th)
IGSS
VDS = VGS, ID = 250 uA
VDS = 0 V, VGS = ±20 V
VDS = 32 V, VGS = 0 V
VDS = 32 V, VGS = 0 V, TJ = 55°C
VDS = 5 V, VGS = 10 V
VGS = 10 V, ID = 20 A
VGS = 4.5 V, ID = 18 A
VDS = 15 V, ID = 20 A
IS = 23.5 A, VGS = 0 V
Dynamic
Gate-Source Threshold Voltage
Gate-Body Leakage
1
V
±100
1
nA
IDSS
ID(on)
Zero Gate Voltage Drain Current
On-State Drain Current
uA
A
25
39
22
27
rDS(on)
Drain-Source On-Resistance
mΩ
gfs
Forward Transconductance
Diode Forward Voltage
25
S
V
VSD
0.96
Qg
Qgs
Qgd
td(on)
tr
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
Turn-On Delay Time
Rise Time
8
3.9
3.8
5
VDS = 20 V, VGS = 4.5 V,
ID = 20 A
nC
ns
VDS = 20 V, RL = 1 Ω,
ID = 20 A,
VGEN = 10 V, RGEN = 6 Ω
5
td(off)
tf
Turn-Off Delay Time
Fall Time
20
6
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
822
76
67
VDS = 15 V, VGS = 0 V, f = 1 MHz
pF
Notes
a. Pulse test: PW <= 300us duty cycle <= 2%.
b. Guaranteed by design, not subject to production testing.
Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty,
representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out
of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special,
consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary
in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL
products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation
where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application,
Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs,
damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated
with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part.
APL is an Equal Opportunity/Affirmative Action Employer.
© Preliminary
2
Publication Order Number:
DS_AM40N04-20D_1A
Analog Power
AM40N04-20D
Typical Electrical Characteristics
0.05
0.04
0.03
0.02
0.01
0
30
TJ = 25°C
24
18
12
4V
4.5V
6V
8V,10V
6
0
0
1
2
3
4
5
6
7
0
5
10
ID-Drain Current (A)
1. On-Resistance vs. Drain Current
15
20
25
30
VGS - Gate-to-Source Voltage (V)
2. Transfer Characteristics
0.08
0.07
0.06
0.05
0.04
0.03
0.02
0.01
0
100
10
TJ = 25°C
ID = 20A
TJ = 25°C
1
0.1
0.01
0
2
4
6
8
10
0.2
0.4
0.6
0.8
1
1.2
1.4
VSD - Source-to-Drain Voltage (V)
VGS - Gate-to-Source Voltage (V)
3. On-Resistance vs. Gate-to-Source Voltage
4. Drain-to-Source Forward Voltage
30
24
18
12
6
1400
1200
1000
800
600
400
200
0
F = 1MHz
10V,8V
Ciss
6V
4.5V
4V
Coss
Crss
0
0
0.2
0.4
0.6
0.8
0
5
10
15
20
VDS - Drain-to-Source Voltage (V)
VDS-Drain-to-Source Voltage (V)
5. Output Characteristics
6. Capacitance
© Preliminary
3
Publication Order Number:
DS_AM40N04-20D_1A
Analog Power
AM40N04-20D
Typical Electrical Characteristics
10
2
VDS = 20V
9
ID = 20A
8
7
6
5
4
3
2
1
1.5
1
0
0
0.5
5
10
15
-50 -25
0
25
50
75 100 125 150
Qg - Total Gate Charge (nC)
TJ -JunctionTemperature(°C)
7. Gate Charge
8. Normalized On-Resistance Vs
Junction Temperature
1000
100
10
60
50
40
30
20
10
0
10 uS
100 uS
1 mS
10 mS
100 mS
1 SEC
10 SEC
100 SEC
DC
1
0.1
Idm limit
Limited by
RDS
0.01
0.1
1
10
100
1000
0.001 0.01
0.1
1
10
100
1000
VDS Drain to Source Voltage (V)
t1 TIME (SEC)
9. Safe Operating Area
10. Single Pulse Maximum Power Dissipation
1
0.1
D = 0.5
0.2
RθJA(t) = r(t) + RθJA
RθJA = 40 °C /W
0.1
0.05
0.02
Single Pulse
P(pk)
t1
t2
0.01
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
0.001
0.0001
0.001
0.01
0.1
t1 TIME (sec)
1
10
100
1000
11. Normalized Thermal Transient Junction to Ambient
© Preliminary
4
Publication Order Number:
DS_AM40N04-20D_1A
Analog Power
AM40N04-20D
Package Information
Note:
1. All Dimension Are In mm.
2. Package Body Sizes Exclude Mold Flash, Protrusion Or Gate Burrs. Mold Flash, Protrusion Or Gate Burrs Shall
Not Exceed 0.10 mm Per Side.
3. Package Body Sizes Determined At The Outermost Extremes Of The Plastic Body Exclusive Of Mold Flash, Gate
Burrs And Interlead Flash, But Including Any Mismatch Between The Top And Bottom Of The Plastic Body.
© Preliminary
5
Publication Order Number:
DS_AM40N04-20D_1A
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