APL431LAAI-PB [ANPEC]
Low Voltage Adjustable Precision Shunt Regulator; 低电压可调精密并联稳压器
| 型号： | APL431LAAI-PB |
| 厂家： | 
ANPEC ELECTRONICS COROPRATION |
| 描述： | Low Voltage Adjustable Precision Shunt Regulator |
| 文件： | 总15页 (文件大小：212K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
APL431L
Low Voltage Adjustable Precision Shunt Regulator
Features
General Description
The APL431L is a 3-terminal low voltage adjustable
precision reference with specified thermal stability
•
•
Precise Reference Voltage to 1.24V
Guaranteed 0.5% or 1% Reference Voltage
over applicable commercial temperature ranges. Out-
put voltage may be set to any value between Vref (1.
24 V) and 20 V with two external resistors (see Fig-
ure 2). When used with an photocoupler, the
APL431L is an ideal voltage reference in isolated feed-
back circuits for 3V to 12V switching-mode power
supplies. This device has a typical output imped-
ance of 0.1Ω. Active output circuitry provides a very
sharp turn-on characteristic,making the APL431L ex-
cellent replacements for zener diodes in many
applications, including on-board regulation and ad-
justable power supplies.
Tolerance
•
•
•
•
Sink Current Capability, 80uA to 100mA
Quick Turn-on
Adjustable Output Voltage, VO = VREF to 20V
Low Operational Cathode Current, 80µA
Typical
•
•
0.1Ω Typical Output Impedance
SOT-23-3, SOT-23-5, TO-92 and SOT-89
ANODE
3
NC
NC
4
Packages
•
Lead Free Available (RoHS Compliant)
5
1
1
2
2
3
Applications
REF CATHODE
REF ANODE CATHODE
SOT-23-3 (Top View)
SOT-23-5 (Top View)
•
•
•
Linear Regulators
3
2
1
CATHODE
ANODE
Adjustable Power Supply
Switching Power Supply
1
2
3
REF
REF
ANODE CATHODE
TO-92 (Top View)
SOT-89 (Top View)
Symbol
Functional Diagram
REF
Anode
Cathode
Cathode
+
_
REF
Vref
Anode
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
1
www.anpec.com.tw
APL431L
Ordering and Marking Information
Elec. Grade
APL431L
A : 0.5% Reference Voltage Tolerance
B : 1% Reference Voltage Tolerance
Package Code
Lead Free Code
Handling Code
Tem p. Range
Package Code
Elec. Grade
A : SOT-23-3
D : SOT-89
Y:Chip Form
B : SOT-23-5
E : TO-92
Tem p. Range
°
°
C : 0 to 70
C
I : -40 to 85
C
Handling Code
PB : Plastic Bag
TR : Tape & Reel
Lead Free Code
TB : Tape & Box
L : Lead Free Device Blank : Original Device
APL
431L
431L
XXXXX
APL431L A/B :
APL431L D :
APL431L E :
XXXXX
- Date Code
APL431L
XXXXX
- Date Code
XXXXX
Notes： ANPEC lead-free products contain molding compounds/die attach materials and 100% matte in plate
termination finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering
operations. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for
MSL classification at lead-free peak reflow temperature.
Absolute Maximum Ratings
Symbol
Parameter
Rating
20
Unit
V
VKA
Cathode voltage
IK
Continuous cathode current range
Reference current range
100
3
mA
mA
°C/W
IREF
θJA
Thermal Resistance from Junction to Ambient in Free Air
SOT-23-3
SOT-23-5
416
357
SOT-89
TO-92
250
250
T J
Operating Junction Temperature Range
Storage Temperature Range
-40 to 150
-65 to 150
260
°C
°C
°C
TSTG
TSOL
Lead temperature range, Ts (Soldering, 10sec)
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
2
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APL431L
Electrical Characteristics TA= 25°C ( unless otherwise noted)
APL431L
Min. Typ. Max.
Symbol
Parameter
Test Conditions
Unit
APL431LA 1.234 1.240 1.246
VKA=VREF, IK=10mA
1.228 1.240 1.252
APL431LB
TA =25°C, (Fig. 1)
VREF
Reference voltage
V
APL431LA 1.222 1.240 1.258
APL431LB 1.215 1.240 1.265
TA =full range(see
Note1), (Fig.1)
VDEF
VDEF Temp Deviation
TA =full range (see Note1)
VKA=VREF, IK=10mA (Fig. 1)
mV
5
15
Ratio of Change in VREF
to Change in Cathods
Votage
IK=10mA, VKA=16V to VREF (Fig.
2)
-0.2
-1.0 mV/V
∆VREF / ∆VKA
IREF
Reference Input Current
0.15
0.5
0.3
IK=10mA,R1 =10kΩ,R2 =∞ (Fig. 2)
TK=full range (see Note 1),
R1=10kΩ, R2=∞, IK=10mA,
(Fig. 2)
µA
µA
IREF(DEV)
IREF Temp Deviation
0.05
VK=6V
0.01
0.01
0.1
0.5
IK(off)
ZKA
off-state cathode current VREF=0V, (Fig. 3)
µA
Ω
VK=16V
VKA=VREF , IK=1mA to 100mA,
Dynamic Output
Impedance
0.1
80
0.4
f ≤1kHz (Fig. 1)
Minimum Operating
Current
IK(MIN)
VKA=VREF (Fig. 1)
100
µA
Notes : 1.Full temperature range is 0°C to 70°C for APL431LXXC,and -40°C to 85°C for APL431LXXl.
Test Figures
V
IN
V
o
V
IN
V
o
I
K(off)
I
K
V
REF
Figure 1. Test Circuit for VKA=VREF , VO=VKA=VREF
Figure 3. Test Circuit for IK(off)
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
3
www.anpec.com.tw
Figure 2. Test Circuit for V>V
,
APL431L
Test Figures (Cont.)
Application Schematic
V
IN
V
o
Precision Voltage Reference
I
K
R1
R2
B
R
I
REF
VIN
Vo
1
R
V
REF
REF
V
0.1µ F
2
R
Figure 2. Test Circuit for VKA>VREF
,
VO= VKA= VREF× (1+R1/R2) + IREF × R1
Precision High-Current Series Regulator
VIN
Vo
RB
R1
VREF
0.1µ F
R2
Notes for Application Circuits:
1) To improve the stability of output voltage, a 0.1µF
capacitor between cathode and anode of
APL431L is strongly recommended.
2)Set VOUT according to the following equation:
VOUT = VREF(1+R1/R2)+lREF R1
3)Choose the value for R
A)The maximum limit for R
the cathode current(l ) is greater than the mini
B
as follows:
B
should be such that
K
mum operating current (80µA) at VIN(MIN)
.
B)The minimum limit for RB should be such that
the cathode current (l ) does not exceed 100mA
K
under all load conditions, and the instantaneous
turnon value for lk does not exceed 150mA. Both
of the following conditions must. be met:
V
IN(MAX)
R
B,Min
≥
(to limit instantaneous turn-on l )
K
150mA
V
IN(MAX)-VOUT
R
B,Min
≥
l
OUT(MIN)+100mA
(to limit l
K
under normal operating conditions)
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
4
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APL431L
Typical Characteristics
Cathode Current vs. Cathode Voltage
Cathode Current vs. Cathode Voltage
100
50
250
VKA=VREF
VKA=VREF
TA=25°C
200
TA=25°C
150
100
50
0
0
-50
-100
-150
-200
-250
-50
-100
-1
-0.5
0
0.5
1
1.5
-1.5
-1
-0.5
0
0.5
1
1.5
Cathode Voltage (V)
Cathode Voltage (V)
Reference Input Current vs.
Junction Temperature
Referemce Voltage vs.
Junction Temperature
1.26
1.25
1.24
1.23
1.22
0.18
IKA=10mA
IKA=10mA
R1=10kΩ, R2=∞
0.16
0.14
0.12
0.10
0.08
-50
-25
0
25
50
75
100 125 150
-50
-25
0
25
50
75
100 125 150
Junction Temperature (°C)
Junction Temperature (°C)
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
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APL431L
Typical Characteristics
Off State Cathode Current vs.
Junction Temperature
∆VREF/∆VKA vs. Junction Temperature
0.5
0.4
0.3
0.2
0.1
0
0
VREF =0V
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.7
-0.8
-0.9
-1
IKA=10mA
VKA =16V
∆VKA=VREF to 20V
VKA =6V
-50
-25
0
25
50
75
100 125 150
-50
-25
0
25
50
75
100 125 150
Junction Temperature (°C)
Junction Temperature (°C)
IKA =1mA
TA =25°C
IKA =0.1mA
TA =25°C
3V
3V
Input
Input
0
0
1V
1V
Output
Output
0
0
0
µS
5µS
0
µ
S
5 S
µ
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
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APL431L
Typical Characteristics
Gain vs. Phase Shift vs. Frequency
Zka vs. Frequency
100
10
60
50
40
30
20
10
0
0
IKA=10mA
VKA=VREF
TA =25°C
IKA=10mA
TA =25°C
50
100
150
200
250
300
350
1
0.1
0.01
-10
10
100
1000
10000 100000 1000000
10
100
1000
10000
100000 1000000
Frequency (Hz)
Frequency (Hz)
Stability Boundary Conditions
100
90
80
70
60
50
40
30
20
10
0
TA =25°C
Unstable
VKA =VREF
VKA =2.5V
VKA =3.3V
Stable
0.0001
0.001
0.01
0.1
1
Load Capacitance (µF)
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
7
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APL431L
Package Information
SOT-23
D
B
3
E
H
2
1
e
A
L
A1
C
M illim eters
In ch es
D im
M in .
1.00
0.00
0.35
0.10
2.70
1.40
M ax.
M in .
0.039
0.000
0.014
0.004
0.106
0.055
M ax.
0.051
0.004
0.020
0.010
0.122
0.071
A
A 1
B
1.30
0.10
0.51
0.25
3.10
1.80
C
D
E
e
1.90/2.1 B S C
0.075/0.083 B S C
H
L
2.40
0.37
3.00
0.094
0.015
0.118
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
8
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APL431L
Package Information
SOT-23-5
e1
5
4
3
E1
E
1
2
e
b
D
A2
L 1
A
a
A1
L 2
L
Millimeters
Inches
Dim
Min.
Max.
1.45
0.15
1.30
0.50
3.00
3.00
1.70
Min.
0.037
0.002
0.035
0.011
0.110
0.102
0.059
Max.
0.057
0.006
0.051
0.019
0.118
0.118
0.067
A
A1
A2
b
D
E
E1
e
e1
L
L1
L2
N
0.95
0.05
0.90
0.30
2.8
2.6
1.5
0.037BSC
0.074BSC
0.95BSC
1.90BSC
0.014
0.020
0°
0.022
0.028
10°
0.35
0.5
0°
0.55
0.7
0.20 BSC
5
0.008 BSC
5
α
10°
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
9
www.anpec.com.tw
APL431L
Package Information
TO-92
3
2
1
J
e
D
e1
S
L1
b2
b
S
Q
E
A
L
SEATING PLANE
M i l l i m e t e r s
I n c h e s
D i m
M i n .
M a x .
5 . 3 3 4
0 . 5 5 9
0 . 5 5 9
5 . 2 0 7
4 . 1 9 1
2 . 6 6 7
1 . 3 9 7
M i n .
M a x .
A
4 . 3 1 8
0 . 4 0 6
0 . 4 0 6
4 . 4 4 5
3 . 1 7 5
2 . 4 1 3
1 . 1 4 3
3 . 4 2 9
1 2 . 7 0
0 . 1 7 0
0 . 0 1 6
0 . 0 1 6
0 . 1 7 5
0 . 1 2 5
0 . 0 9 5
0 . 0 4 5
0 . 1 3 5
0 . 5 0 0
0 . 2 1 0
0 . 0 2 2
0 . 0 2 2
0 . 2 0 5
0 . 1 6 5
0 . 1 0 5
0 . 0 5 5
b
b 2
D
φ
φ
φ
E
e
e 1
J
L
L 1
Q
1 . 2 7
0 . 0 5 0
0 . 1 0 5
2 . 9 2 1
2 . 0 3 2
0 . 1 1 5
0 . 0 8 0
S
2 . 6 6 7
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
10
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APL431L
Package Information
SOT-89 (Reference EIAJ ED-7500A Reg stration SC-62)
D
D1
a
E
H
1
2
3
L
C
B1
B
e
e1
A
a
Millimeters
Inches
Dim
Min.
Max.
1.60
0.56
0.48
0.44
4.60
1.83
Min.
0.055
0.016
0.014
0.014
0.173
0.053
Max.
0.063
0.022
0.019
0.017
0.181
0.072
A
B
B1
C
D
D1
e
e1
E
H
1.40
0.40
0.35
0.35
4.40
1.35
1.50 BSC
3.00 BSC
0.059 BSC
0.118 BSC
2.29
3.75
0.80
2.60
4.25
1.20
0.090
0.148
0.031
0.102
0.167
0.047
L
10
10
°
α
°
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
11
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APL431L
Physical Specifications
Terminal Material
Lead Solderability
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition (IR/Convection or VPR Reflow)
tp
TP
Critical Zone
TL to TP
Ramp-up
TL
tL
Tsmax
Tsmin
Ramp-down
ts
Preheat
25
°
t 25 C to Peak
Time
Classificatin Reflow Profiles
Sn-Pb Eutectic Assembly
Large Body Small Body
Pb-Free Assembly
Profile Feature
Large Body
Small Body
Average ramp-up rate
(TL to TP)
3°C/second max.
3°C/second max.
Preheat
- Temperature Min (Tsmin)
- Temperature Mix (Tsmax)
- Time (min to max)(ts)
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
Tsmax to TL
3°C/second max
- Ramp-up Rate
Tsmax to TL
- Temperature(TL)
- Time (tL)
183°C
60-150 seconds
217°C
60-150 seconds
Peak Temperature(Tp)
225 +0/-5°C
240 +0/-5°C
245 +0/-5°C
250 +0/-5°C
Time within 5°C of actual Peak
Temperature(tp)
10-30 seconds
10-30 seconds
10-30 seconds 20-40 seconds
Ramp-down Rate
Time 25°C to Peak Temperature
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
12
www.anpec.com.tw
APL431L
Reliability Test Program
Test item
SOLDERABILITY
HOLT
Method
Description
245°C, 5 SEC
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B,A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
1000 Hrs Bias @125°C
168 Hrs, 100%RH, 121°C
-65°C~150°C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms, 1tr > 100mA
PCT
TST
ESD
Latch-Up
Carrier Tape & Reel Dimensions
t
D
P
Po
E
P1
Bo
F
W
Ko
Ao
D1
T2
J
C
A
B
T1
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
13
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APL431L
Carrier Tape & Reel Dimensions
Application
A
B
C
J
T1
T2
W
P
E
13.5 ±
12 + 0.3
12 - 0.1
178 ±1
70 ± 2
3 ± 0.15
14 ± 2
1.3 ± 0.3
8 ± 0.1 1.75± 0.1
Ko
0.15
SOT-89
F
D
D1
Po
P1
Ao
Bo
t
5.5 ± 0.05 1.5± 0.1 1.5± 0.1 4.0 ± 0.1 2.0 ± 0.1 4.8 ± 0.1 4.5± 0.1 1.80± 0.1 0.3±0.013
Application
SOT-23
A
B
C
J
T1
T2
W
P
E
8.0+ 0.3
- 0.3
178±1
60 ± 1.0
12.0
2.5 ± 0.15 9.0 ± 0.5
1.4
4.0
1.75
F
D
D1
Po
P1
Ao
Bo
Ko
t
3.5 ± 0.05 1.5 +0.1 φ0.1MIN
4.0
J
2.0 ± 0.05
3.1
T2
3.0
W
1.3
P
0.2±0.03
Application
SOT-23-5
A
B
C
T1
E
178 ±1
72 ± 1.0 13.0 + 0.2 2.5 ± 0.15 8.4 ± 2
D1 Po P1
1.5 ± 0.3 8.0 ± 0.3
Ao Bo
4 ± 0.1 1.75± 0.1
Ko
F
D
t
3.5 ± 0.05 1.5± 0.1 1.5± 0.1 4.0 ± 0.1 2.0 ± 0.1 3.15 ± 0.1 3.2± 0.1 1.4± 0.1 0.2±0.033
Carrier Tape & Reel Dimensions
H2A H2
D2
H2 H2
A
H3
H4
W2
L
H
L1
W1
H1
W
D
F1F2
P1
T2
T
T1
D1
P
P2
A
3.18~12
H3
D
D1
4.0±0.2 0.36~0.53 9.0 MAX
H4 L1
D2
F1,F2
H
H1
H2
0.5 MAX 0.5 MAX
T1
H2A
Application
TO-92
2.5+0.2
-0.1
16±0.5
P1
9±0.5
P2
L
P
T
27.0 MAX 20.0 MAX 11.0 MAX 2.5 MIN 12.7±0.2 6.35±0.4 50.8±0.5 0.55 MAX 1.42 MAX
T2 W1 W2
0.36~0.68 17.5~19 5.0~7.0 0.5 MAX
W
(mm)
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
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APL431L
Cover Tape Dimensions
Application
SOT- 23
SOT-23-5
SOT- 89
TO-92
Carrier Width
Cover Tape Width
Devices Per Reel
8
8
12
5.3
5.3
9.3
3000
3000
1000
2000
17.5~19
5.0~7.0
Customer Service
Anpec Electronics Corp.
Head Office :
5F, No. 2 Li-Hsin Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, Taipei Hsien, Taiwan, R. O. C.
Tel : 886-2-89191368
Fax : 886-2-89191369
Copyright ANPEC Electronics Corp.
Rev. B.8 - Mar., 2005
15
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