APL78L05DC-TRG [ANPEC]

Three-Terminal Low Current Positive Voltage Regulator; 三端低电流正电压稳压器
APL78L05DC-TRG
型号: APL78L05DC-TRG
厂家: ANPEC ELECTRONICS COROPRATION    ANPEC ELECTRONICS COROPRATION
描述:

Three-Terminal Low Current Positive Voltage Regulator
三端低电流正电压稳压器

稳压器 调节器 输出元件
文件: 总17页 (文件大小:344K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
APL78L05/12  
Three-Terminal Low Current Positive Voltage Regulator  
Features  
General Description  
·
·
·
·
·
·
·
·
·
·
Three-Terminal Regulators  
These series of fixed-voltage monolithic integrated-cir-  
cuit voltage regulators are designed for a wide range of  
applications. These applications include on-card regula-  
tion for elimination of noise and distribution problems  
associated with single-point regulation. In addition, they  
can be used with power-pass elements to make high-  
current voltage regulators. Each of these regulators can  
deliver up to 100mA of output current. The internal limit-  
ing and thermal shutdown features of these regulators  
make them essentially immune to overload. When used  
as a replacement for a Zener diode-resistor combination,  
an effective improvement in output impedance can be  
obtained together with lower-bias current.  
Maximum Input Voltage : 30V  
Output Voltages of 5V, 12V  
Output Current Up to 100mA  
No External Components  
Internal Thermal Overload Protection  
Internal Short-Circuit Limiting  
Output Voltage Offered in 4% Tolerance  
SOP-8, SOT-89, and TO-92/TO-92A Packages  
Lead Free and Green Devices Available  
(RoHS Compliant)  
Pin Configuration  
Applications  
·
·
Battery-Powered Circuitry  
Post Regulator for Switching Power Supply  
VOUT  
1
8 VIN  
GND 2  
GND 3  
NC 4  
7 GND  
6 GND  
5 NC  
1
2
3
VOUT  
VIN  
GND  
SOP-8 (Top View)  
SOT-89 (Front View)  
VIN  
VIN  
GND  
VOUT  
GND  
VOUT  
TO-92A (Top View)  
TO-92 (Top View)  
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and  
advise customers to obtain the latest version of relevant information to verify before placing orders.  
1
www.anpec.com.tw  
Copyright ã ANPEC Electronics Corp.  
Rev. A.11 - Jun., 2011  
APL78L05/12  
Ordering and Marking Information  
Package Code  
APL78L05/12  
E : TO-92/TO-92A  
K : SOP-8  
D : SOT-89  
Operating Ambient Temperature Range  
Assembly Material  
Handling Code  
C : 0 to 70 oC  
Handling Code  
Temperature Range  
Package Code  
TR : Tape & Reel  
TB : Tape & Box (only for TO-92A Bent Legs)  
PB : Plastic & Box  
Assembly Material  
G : Halogen and Lead Free Device  
APL  
78L05/12  
XXXXX  
XXXXX - Date Code  
APL78L05/12 E :  
APL78L05/12  
APL78L05/12 D :  
XXXXX - Date Code  
XXXXX - Date Code  
XXXXX  
APL78L05/12  
APL78L05/12 K :  
XXXXX  
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which  
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for  
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen  
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by  
weight).  
Absolute Maximum Ratings (Note 1)  
Symbol  
Parameter  
Rating  
Unit  
VIN  
Input Voltage  
30  
VDC  
Operating Junction Temperature Range  
0 to 125  
0 to 150  
TJ  
Control Section  
Power Transistor  
°C  
°C  
TSTG  
Storage Temperature Range  
-65 to +150  
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute  
maximum rating conditions for extended periods may affect device reliability.  
Thermal Characteristics  
Symbol  
Parameter  
Typical Value  
Unit  
Thermal Resistance from Junction to Ambient in Free Air (Note 2)  
160  
180  
SOP-8  
qJA  
°C/W  
SOT-89/TO-92/TO-92A  
Thermal Resistance from Junction to Case  
30  
80  
SOP-8  
SOT-89/TO-92/TO-92A  
qJC  
°C/W  
Note 2: qJA is measured with the component mounted on a high effective thermal conductivity test board in free air.  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Electrical Characteristics  
VIN = 10V, IOUT = 40mA, TA = 25°C, CIN = 0.33mF, COUT = 0.1mF, unless otherwise specified.  
APL78L05  
Typ.  
Symbol  
Parameter  
Output Voltage  
Test Conditions  
Unit  
Vdc  
mV  
Min.  
Max.  
4.8  
5.0  
5.2  
1.0mA£IOUT£40mA  
VO  
Output Voltage (0° to +125°C)  
4.75  
5
5.25  
7.0Vdc£VIN£20Vdc  
VIN = 10V, 1.0mA£IOUT£40mA  
7.0Vdc£VIN£20Vdc  
8.0Vdc£VIN£20Vdc  
1.0mA£IOUT£100mA  
1.0mA£IOUT£40mA  
-
-
-
-
-
29  
26  
9
150  
100  
60  
Regline Line Regulation  
Regload Load Regulation  
mV  
mA  
5
30  
IB  
Quiescent Current  
2.8  
6.0  
APL78L12  
Typ.  
Symbol  
Parameter  
Test Conditions  
Unit  
Min.  
Max.  
1.5  
0.1  
-
-
0.15  
8.0Vdc£VIN£20Vdc  
1.0mA£IOUT£40mA  
IOUT = 100mA  
Quiescent Current Change  
mA  
D IB  
-
-
0.08  
VIN-VO Dropout Voltage  
1.9  
VO  
Output Voltage  
11.5  
12  
12.5  
Vdc  
mV  
1.0mA£IOUT£40mA  
VO  
Output Voltage (0° to +125°C)  
11.4  
12  
12.6  
14Vdc£VIN£27Vdc  
VIN = 19V, 1.0mA£IOUT£40mA  
14.5Vdc£VIN£27Vdc  
1.0mA£IOUT£100mA  
1.0mA£IOUT£40mA  
Regline Line Regulation  
Regload Load Regulation  
-
-
-
-
-
-
-
-
250  
100  
50  
6.5  
1.5  
-
-
-
IB  
Quiescent Current  
-
-
mA  
16Vdc£VIN£27Vdc  
1.0mA £IOUT£40mA  
IOUT = 100mA  
Quiescent Current Change  
D IB  
-
VIN-VO Dropout Voltage  
1.9  
-
Vdc  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Typical Operating Characteristics  
Output Voltage vs. Input Voltage  
Dropout Voltage vs. Junction Temperature  
8
2.25  
7
6
2
IO=70mA  
5
1.75  
IO=1mA  
4
IO=40mA  
1.5  
1.25  
1
IO=1mA  
3
2
1
0
IO=40mA  
IO=100mA  
Dropout of Regulation is  
defined as when  
DVo=1% of Vo  
0
2
4
6
8
10  
0
25  
50  
75  
100  
125  
Input Voltage (V)  
Junction Temperature (°C)  
Quiescent Current vs. Ambient Temperature  
Quiescent Current vs. Input Voltage  
3 .5  
3
3.0  
No Load  
VIN=10V  
IO=40mA  
2.8  
2.6  
2.4  
2.2  
2 .5  
2
1 .5  
1
0 .5  
0
0
25  
50  
75  
100  
125  
0
5
1 0  
1 5  
2 0  
2 5  
3 0  
3 5  
Ambient Temperature (°C)  
Input Voltage (V)  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Typical Operating Characteristics (Cont.)  
Quiescent Current vs. Output Current  
Dropout Voltage vs. Output Current  
3
2.5  
2
1.9  
1.85  
1.8  
VIN=10V  
1.75  
1.7  
1.5  
1
Dropout of  
Regulation is  
defined as when  
DVo=1% of Vo  
0.5  
0
1.65  
1.6  
0
20  
40  
60  
80  
100  
0
20  
40  
60  
80  
100  
Output Current (mA)  
Output Current (mA)  
PSRR vs. Frequency  
Load-Transient Response  
+0  
-10  
-20  
-30  
-40  
-50  
-60  
C
=0.1mF  
OUT
VIN=10V  
IOUT=10mA  
V(100mv/div)  
OUT  
IOUT=10mA~80mA  
-70  
-80  
10  
100  
1k  
10k  
100k  
Frequency (Hz)  
Time (20ms/div)  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Typical Operating Characteristics (Cont.)  
Maximum Power Dissipation vs.  
Ambient Temperature  
Line Transient Response  
TO-92 Type Package  
No Heat Sink  
1300  
1100  
VIN=9.5V~10.5V  
COUT=0.1mF  
IOUT=10mA  
900  
700  
500  
300  
VOUT=10(mV/div)  
100  
25  
50  
75  
100  
125  
150  
Time (100ms/div)  
Ambient Temperature (°C)  
Region of Stable ESR vs. Output  
Current  
Output Voltage vs.  
Ambient Temperature  
5.02  
10  
VIN=10V  
IO=40mA  
COUT=0.1mF  
5.015  
1
5.01  
Stable Region  
5.005  
0.1  
5
Untested  
0.01  
4.995  
0
20  
40  
60  
80  
100  
0
25  
50  
75  
100  
125  
Ambient Temperature (°C)  
Output Current (mA)  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Pin Description  
PIN  
NO.  
FUNCTION  
NAME  
SOP-8 TO-92 SOT-89  
1
1
2
-
1
2
-
VOUT  
GND  
NC  
Output Voltage Output Pin.  
2,3,6,7  
4,5  
Ground. A common ground is required between the input and the output voltage.  
No Internal Connection  
Power input pin of the device. The maximum Input Voltage can be 30V. It should be  
bypassed with a 0.33µF (minimum) capacitor to the GND.  
8
3
3
VIN  
Typical Application Circuit  
VIN  
APL78L05/12  
VOUT  
COUT=  
CIN=  
0.1mF  
0.33mF  
Note  
a : A common ground is required between the input and the output voltage. The input voltage must remain typically 2V above the  
output voltage even during the low point on the input ripple voltage.  
b : CIN is required if regulator is located an appreciable distance from power supply filter.  
c : COUT is not needed for stability; however, it improves transient response.  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Application Information  
The APL78L05/12, series of fixed voltage regulators, are  
designed with thermal overload protection that shuts down  
the circuit when subjected to an excessive power overload  
condition. In addition, the APL78L05/12 have the func-  
tion of internal short circuit protection to limit the maxi-  
mum current the circuit will pass.  
For example, a 100mA current source would require R to  
be a 50W, 1/2W resistor and the output voltage compli-  
ance would be the input voltage less 7V.  
+V  
O
+20V  
APL78L05  
0.33mF  
10K  
In many low current applications, compensation capaci-  
tors are not required. However, it is recommended that  
the regulator input will be bypassed with a capacitor if the  
regulator connects to the power supply filter with long  
wire lengths, or if the output load capacitance is large. The  
input bypass capacitor should be selected to provide  
good high-frequency characteristics to insure stable  
operation under all load conditions. If the value of the  
capacitor is greater than 0.33mF, the capacitor with tan-  
talum or mylar, or other capacitor having low internal im-  
pedance at high frequencies should be chosen. The by-  
pass capacitor should be mounted with the shortest pos-  
sible leads directly across the regulators input terminals.  
Good construction techniques should be used to mini-  
mize ground loops and lead resistance drops since the  
regulator has no external sense lead. Bypassing the out-  
put is also recommended.  
2
3
7
6
MC1741  
4
10K  
0.33mF  
MPSA70  
6.5  
20V  
-V  
O
MPSU55  
Figure 2. ±15V Tracking Voltage Regulator  
+VO  
+VI  
0.33mF  
APL78LXX  
APL79LXX  
0.1mF  
0.1mF  
-VI  
0.33mF  
-VO  
Input  
APL78L05  
R
Constant  
Current to  
Grounded  
Load  
Figure 3. Positive and Negative Regulator  
0.33mF  
lO  
Figure 1. Current Regulator  
The APL78L05 regulators can also be used as a cur-  
rent source when connected as above. In order to mini-  
mize dissipation, the APL78L05 is chosen in this  
application. Resistor R determines the current as be-  
low :  
5.0V  
R
IO =  
+ IB  
IB =3.8mA over line and load changes  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Package Information  
SOP-8  
D
SEE VIEW A  
°
b
c
e
GAUGE PLANE  
SEATING PLANE  
L
VIEW A  
SOP-8  
S
Y
M
B
O
L
MILLIMETERS  
INCHES  
MIN.  
MAX.  
MIN.  
MAX.  
0.069  
0.010  
A
1.75  
0.25  
0.004  
0.049  
0.012  
0.007  
A1  
A2  
b
0.10  
1.25  
0.31  
0.17  
0.020  
0.010  
0.51  
0.25  
5.00  
6.20  
4.00  
c
D
4.80  
5.80  
3.80  
0.189  
0.228  
0.150  
0.197  
0.244  
0.157  
E
E1  
e
h
L
1.27 BSC  
0.050 BSC  
0.010  
0.016  
0
°  
0.020  
0.050  
0.25  
0.40  
0
°  
0.50  
1.27  
°
°
8
0
8
Note: 1. Follow JEDEC MS-012 AA.  
2. Dimension “D” does not include mold flash, protrusions or gate burrs.  
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.  
3. Dimension “E” does not include inter-lead flash or protrusions.  
Inter-lead flash and protrusions shall not exceed 10 mil per side.  
Copyright ã ANPEC Electronics Corp.  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Package Information  
SOT-89  
D
A
C
D1  
e
e1  
B
B1  
SOT-89  
S
Y
M
B
O
L
MILLIMETERS  
MIN.  
INCHES  
MAX.  
1.60  
0.56  
0.48  
0.44  
4.60  
MIN.  
MAX.  
0.063  
0.022  
0.019  
0.017  
0.181  
0.072  
0.102  
0.090  
A
1.40  
0.44  
0.36  
0.35  
4.40  
0.055  
0.017  
0.014  
0.014  
0.173  
0.064  
0.090  
0.084  
B
B1  
C
D
D1  
E
1.62  
2.29  
1.83  
2.60  
E1  
e
2.13  
2.29  
1.50 BSC  
3.00 BSC  
0.059 BSC  
0.118 BSC  
e1  
H
0.155  
0.035  
0.167  
0.047  
3.94  
0.89  
4.25  
1.20  
L
Note : Follow JEDEC TO-243 AA.  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Package Information  
TO-92  
D
j
e1  
b
e
TO-92  
S
Y
M
B
O
L
MILLIMETERS  
INCHES  
MIN.  
4.32  
0.41  
4.45  
3.18  
MAX.  
5.33  
0.53  
5.20  
4.19  
MIN.  
MAX.  
0.210  
0.021  
0.205  
0.165  
0.105  
0.055  
A
0.170  
0.016  
0.175  
0.125  
0.095  
0.045  
0.135  
0.500  
0.080  
b
D
E
e
2.42  
1.15  
3.43  
12.70  
2.03  
2.66  
1.39  
e1  
j
4.00  
15.00  
2.66  
0.157  
L
S
0.591  
0.105  
Note : Follow JEDEC TO-92.  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Package Information  
TO-92A  
D
e1  
e
J
b
F
TO-92A  
S
Y
M
B
O
L
MILLIMETERS  
INCHES  
MIN.  
MAX.  
5.33  
0.53  
5.20  
4.19  
MIN.  
MAX.  
0.210  
0.021  
0.205  
0.165  
0.110  
0.105  
A
4.32  
0.41  
4.45  
3.18  
0.170  
0.016  
0.175  
0.125  
0.098  
0.095  
0.045  
0.135  
0.500  
0.067  
0.080  
b
D
E
F
e
2.50  
2.42  
1.15  
3.34  
12.70  
1.70  
2.03  
2.80  
2.66  
1.39  
4.00  
e1  
J
0.055  
0.157  
L
L1  
S
3.30  
2.66  
0.130  
0.105  
Note : Follow JEDEC TO-92A  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Carrier Tape & Reel Dimensions  
P0  
P2  
P1  
A
OD0  
K0  
A0  
OD1  
A
B
B
SECTION A-A  
SECTION B-B  
d
T1  
Application  
SOP-8  
A
H
T1  
C
d
D
W
E1  
F
12.4+2.00 13.0+0.50  
-0.00 -0.20  
330.0±2.00 50 MIN.  
1.5 MIN.  
D1  
20.2 MIN. 12.0±0.30 1.75±0.10  
5.5±0.05  
K0  
P0  
4.0±0.10  
A
P1  
8.0±0.10  
H
P2 D0  
T
A0  
B0  
1.5+0.10  
-0.00  
0.6+0.00  
-0.40  
2.0±0.05  
1.5 MIN.  
d
6.40±0.20 5.20±0.20 2.10±0.20  
Application  
SOT-89  
T1  
C
D
W
E1  
F
5.50±0.05  
K0  
12.4+2.00 13.0+0.50  
-0.00 -0.20  
P2 D0  
178.0±2.00 50 MIN.  
1.5 MIN.  
D1  
20.2 MIN. 12.0±0.30 1.75±0.10  
P0  
P1  
T
A0  
B0  
1.5+0.10  
-0.00  
0.6+0.00  
-0.40  
4.0±0.10  
8.0±0.10  
2.0±0.05  
1.5 MIN.  
4.80±0.20 4.50±0.20 1.80±0.20  
(mm)  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Carrier Tape & Box Dimensions  
Application  
TO-92A  
A0  
4.32~5.33  
H2  
D
D1  
0.36~0.53 4.45~5.20  
H3 H4  
D2  
F1=F2  
F1-F2  
±0.3  
M
1.7~3.3  
L1  
H
H1  
9±0.5  
P1  
2.5+0.2  
-0.1  
4.0±0.2  
H2A  
16±0.5  
P
H5=H0+M  
18.5±0.5  
W
L
12.7±0.3  
W
6.35±0.4  
W1  
0.5 MAX  
P2  
0.5 MAX 27.0 MAX 20.0 MAX  
T1 T2  
0.55 MAX 1.42 MAX 0.36~0.68  
11.0 MAX  
W1  
2.5 MIN  
W2  
T
50.8±0.5  
18.0±0.2  
6.0±0.2  
1  
18.0±0.2  
6.0±0.2  
(mm)  
Devices Per Unit  
Package Type  
Unit  
Quantity  
SOP-8  
Tape & Reel  
Tape & Reel  
Tape & Box  
Plastic & Box  
2500  
1000  
2000  
1000  
SOT-89  
TO-92A  
TO-92  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Taping Direction Information  
SOP-8  
USER DIRECTION OF FEED  
SOT-89  
USER DIRECTION OF FEED  
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Rev. A.11 - Jun., 2011  
APL78L05/12  
Classification Profile  
Classification Reflow Profiles  
Profile Feature  
Sn-Pb Eutectic Assembly  
Pb-Free Assembly  
Preheat & Soak  
100 °C  
150 °C  
60-120 seconds  
150 °C  
200 °C  
60-120 seconds  
Temperature min (Tsmin  
)
Temperature max (Tsmax  
)
Time (Tsmin to Tsmax) (ts)  
Average ramp-up rate  
(Tsmax to TP)  
3 °C/second max.  
3°C/second max.  
Liquidous temperature (TL)  
Time at liquidous (tL)  
183 °C  
60-150 seconds  
217 °C  
60-150 seconds  
Peak package body Temperature  
(Tp)*  
See Classification Temp in table 1  
20** seconds  
See Classification Temp in table 2  
30** seconds  
Time (tP)** within 5°C of the specified  
classification temperature (Tc)  
Average ramp-down rate (Tp to Tsmax  
)
6 °C/second max.  
6 °C/second max.  
6 minutes max.  
8 minutes max.  
Time 25°C to peak temperature  
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.  
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.  
Copyright ã ANPEC Electronics Corp.  
16  
www.anpec.com.tw  
Rev. A.11 - Jun., 2011  
APL78L05/12  
Classification Reflow Profiles (Cont.)  
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)  
Volume mm3  
350  
Package  
Thickness  
<2.5 mm  
³ 2.5 mm  
Volume mm3  
<350  
235 °C  
220 °C  
220 °C  
220 °C  
Table 2. Pb-free Process – Classification Temperatures (Tc)  
Package  
Thickness  
<1.6 mm  
Volume mm3  
Volume mm3  
350-2000  
260 °C  
Volume mm3  
<350  
260 °C  
260 °C  
250 °C  
>2000  
260 °C  
245 °C  
245 °C  
1.6 mm – 2.5 mm  
³ 2.5 mm  
250 °C  
245 °C  
Reliability Test Program  
Test item  
SOLDERABILITY  
HOLT  
Method  
JESD-22, B102  
JESD-22, A108  
JESD-22, A102  
JESD-22, A104  
MIL-STD-883-3015.7  
JESD-22, A115  
JESD 78  
Description  
5 Sec, 245°C  
1000 Hrs, Bias @ Tj=125°C  
168 Hrs, 100%RH, 2atm, 121°C  
500 Cycles, -65°C~150°C  
VHBM2KV  
PCT  
TCT  
HBM  
MM  
VMM200V  
10ms, 1tr100mA  
Latch-Up  
Customer Service  
Anpec Electronics Corp.  
Head Office :  
No.6, Dusing 1st Road, SBIP,  
Hsin-Chu, Taiwan, R.O.C.  
Tel : 886-3-5642000  
Fax : 886-3-5642050  
Taipei Branch :  
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,  
Sindian City, Taipei County 23146, Taiwan  
Tel : 886-2-2910-3838  
Fax : 886-2-2917-3838  
Copyright ã ANPEC Electronics Corp.  
Rev. A.11 - Jun., 2011  
17  
www.anpec.com.tw  

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