APW7037AKC-TRG [ANPEC]

8-PIN Synchronous Buck PWMController; 8 -PIN同步降压PWMController
APW7037AKC-TRG
型号: APW7037AKC-TRG
厂家: ANPEC ELECTRONICS COROPRATION    ANPEC ELECTRONICS COROPRATION
描述:

8-PIN Synchronous Buck PWMController
8 -PIN同步降压PWMController

文件: 总11页 (文件大小:221K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
APW7037A/B  
8-PIN Synchronous Buck PWM Controller  
Features  
General Description  
The APW7037 series are designed to provide a low cost  
synchronous Buck regulator for on-board DC to DC con-  
verter applications. The APW7037 series together with  
dual N-channel MOSFETs such as APM7313, provide a  
low cost solution for such applications. Each device fea-  
tures an internal 200/400kHz oscillator, Power-On-Reset  
(POR) for both VCC and VC supplies, an external pro-  
grammable soft-start function as well as output under-  
voltage detection that latches off the device when an out-  
put short is detected.  
·
·
·
Operating with Single 5V or 12V Input  
Drives N-Channel MOSFETs  
Simple Single-Loop Control Design  
- Voltage-Mode PWM Control  
- Full 0% to 100% DutyRatio  
- Fast Transient Response  
·
·
·
±2% Output Voltage Accuracy Over Temperature  
Under-Voltage Protection for Output  
200/400kHz Constant Frequency Operation  
- 200kHz for APW7037B  
- 400kHz for APW7037A  
·
Small size, 8-PIN Package (SOIC or TSSOP)  
·
Lead Free and Green Devices Available  
(RoHS Compliant)  
Pin Configuration  
FB  
VCC  
1
2
3
4
8
7
6
5
SS  
COMP  
VC  
Applications  
LDRV  
GND  
HDRV  
·
·
·
·
Graphics Cards  
DDR Memory Power Supply  
DDR Memory Termination Voltage  
Low-Voltage Distributed Power Supplies  
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise  
customers to obtain the latest version of relevant information to verify before placing orders.  
Copyright ã ANPEC Electronics Corp.  
1
www.anpec.com.tw  
Rev. A.7 - Jun. , 2008  
APW7037A/B  
Ordering and Marking Information  
Package Code  
K : SOP-8  
APW7037A/B  
O : TSSOP-8  
Operating Junction Temperature Range  
Assembly Material  
C : 0 to 70oC  
Handling Code  
Handling Code  
TR : Tape & Reel  
Assembly Material  
Temperature Range  
Package Code  
L : Lead Free Device  
G : Halogen and Lead Free Device  
APW7037A/B  
APW7037A/B K :  
APW7037A/B O :  
XXXXX - Date Code  
XXXXX  
APW7037A/B  
XXXXX  
XXXXX - Date Code  
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish;  
which are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-  
020C for MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and  
halogen free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed  
1500ppm by weight).  
Absolute Maximum Ratings  
Symbol  
VCC  
Parameter  
Rating  
-0.2~30  
-0.2~30  
0~125  
-65~150  
260  
Unit  
V
VCC to GND  
VC  
VC to GND  
V
TJ  
Operating Junction Temperature  
Storage Temperature  
°C  
°C  
°C  
TSTG  
TSDR  
Maximum Lead Soldering Temperature, 10 Seconds  
Thermal Characteristics  
Symbol  
Parameter  
Typical Value  
Unit  
Thermal Resistance in Free Air  
SOP-8  
TSSOP-8  
160  
124  
qJA  
°
C/W  
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Rev. A.7 - Jun., 2008  
APW7037A/B  
Electrical Characteristics  
°
°
Unless otherwise specified, these specifications apply over VCC=5V, VC=12V and TA =0 to 70 C. Typical values refer to TA =25 C.  
APW7037/A/B  
Unit  
Parameter  
Test Conditions  
Symbol  
Min.  
Max.  
Typ.  
SUPPLY CURRENT  
VCC Dynamic Supply  
Current  
2
3
5
mA  
ICC  
FOSC=200kHz, CL=1500pF  
VC Dynamic Supply Current  
2
5.5  
1.5  
0.4  
8
3
1
mA  
mA  
mA  
IC  
FOSC=200kHz, CL=1500pF  
SS=GND  
VCC Static Supply Current  
VC Static Supply Current  
0.5  
0.2  
ICCQ  
ICQ  
SS=GND  
POWER-ON-RESET  
Rising VCC Threshold  
4.0  
-
4.2  
0.25  
3.3  
4.4  
-
V
V
V
V
VCC POR Hysteresis  
Rising VC Threshold  
VC POR Hysteresis  
3.1  
-
3.5  
-
0.2  
OSCILLATOR  
APW7037A 360  
400  
200  
1.10  
440  
220  
-
Free Running Frequency  
kHz  
V
FOSC  
APW7037B  
180  
-
Ramp Amplitude  
D
VOSC  
ERROR AMPLIFIER  
IFB1  
IFB2  
GM  
FB Pin Input Bias Current  
SS=3V, VFB=1V  
SS=0V, VFB=1V  
-
-
1
-
-
nA  
FB Pin Input Bias Current  
Transconductance  
-64  
600  
m
A
450  
750  
m
mho  
REFERENCE VOLTAGE  
APW7037A  
0. 784  
0.784  
-
0. 800  
0.800  
0.2  
0. 816  
0.816  
0.35  
FB Pin Regulation Voltage  
VFB Line Regulation  
V
VFB  
APW7037B  
%
VCC = 5~12V  
LREG  
GATE DRIVERS  
HDRV Rising Time  
CL = 1500pF  
CL = 1500pF  
CL = 1500pF  
CL = 1500pF  
-
-
20  
15  
50  
50  
nS  
nS  
nS  
HDRV Falling Time  
LDRV Rising Time  
LDRV Falling Time  
Dead Band Time  
-
25  
50  
-
25  
50  
nS  
nS  
50  
150  
250  
PROTECTION  
FB Under-Voltage Threshold  
VFB Falling  
VFBUV  
APW7037A  
APW7037B  
0.3  
0.3  
-
0.4  
0.4  
0.5  
0.5  
0.5  
-
V
V
Shutdown Threshold Voltage  
Soft-Start Current  
Pull the voltage of SS pin  
SS=0  
VSD  
ISS  
10  
20  
30  
m
A
Copyright ã ANPEC Electronics Corp.  
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Rev. A.7 - Jun., 2008  
APW7037A/B  
Function Pin Description  
FB (Pin 1)  
SS (Pin 8)  
Connect this pin to the output (VOUT) of the PWM con-  
verter via an external resistor divider to provide a voltage  
feedback path for the converter. The output voltage set by  
the resistor divider is determined using the following for-  
Connect a capacitor from this pin to ground.This capacitor,  
along with an internal 20mA current source, sets the soft-  
start interval of the PWM converter and prevents the out-  
puts from overshoot as well as limits the input current.  
Pull this pin below 0.5V can shutdown the converter.  
mula :  
ROUT  
(
)
VOUT = VREF x  
1+  
RGND  
where ROUT is the resistor connected from VOUT to FB  
, and RGND is the resistor connected from FB to ground.  
The voltage at this pin is also monitored for Under-Volt-  
age protection.  
VCC (Pin 2)  
Connect this pin to input voltage from 5V to 20V. This pin  
provides the bias for the control circuitry and the low-side  
power MOSFET driver (LDRV). The voltage at this pin is  
monitored for Power-On-Reset (POR) purpose.  
LDRV (Pin 3)  
Connect this pin to the gate of the low-side power  
MOSFET. This pin provides the gate drive for the MOSFET.  
GND (Pin 4)  
Signal and power ground for the IC. All voltage levels are  
measured with respect to this pin.  
HDRV (Pin 5)  
Connect this pin to the gate of the high-side power  
MOSFET. This pin provides the gate drive for the  
MOSFET.  
VC (Pin 6)  
This pin provides bias voltage to the high-side MOSFET  
driver. A bootstrap circuit may be used to pump a boot  
voltage for enforcing the driving capability of the gate driver  
and improving the performance of the MOSFET.  
COMP (Pin 7)  
This pin is the output of the error amplifier. Add an exter-  
nal resistor-capacitor network to provide a loop compen-  
sation for the PWM converter.  
Copyright ã ANPEC Electronics Corp.  
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Rev. A.7 - Jun., 2008  
APW7037A/B  
Block Diagram  
SS  
VCC  
20uA  
4.5V  
Regulator  
POR  
3.3V  
Max.  
64uA  
Pow er  
On Reset  
VC  
HDRV  
Under-Voltage  
VFBUV  
Gate  
Control  
25k  
FB  
PWM  
VCC  
Error  
Amp.  
25k  
LDRV  
VREF  
OSC  
FOSC  
COMP  
GND  
Typical Application Circuit  
1. Dual supply voltage(5V and 12V) application  
R4  
3
+12V  
C1  
1uF  
VIN  
+5V  
C2  
1uF  
L3  
1uH  
C4  
100uF  
C3  
47uF  
C5  
1uF  
VCC  
VC  
Q2  
APM2300  
A
8
L4  
3.3uH  
Q1A  
APM7313  
SS  
5
HDRV  
U1  
C7  
0.1uF  
VOUT  
APW7037A/B  
1.5V/5 A  
Shutdown  
C6,C9  
2 x 150uF  
Q1B  
APM7313  
3
1
LDRV  
7
COMP  
R1  
249  
R3  
24k  
FB  
GND  
R2  
C8  
1.24k  
2200pF  
Copyright ã ANPEC Electronics Corp.  
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Rev. A.7 - Jun., 2008  
APW7037A/B  
Typical Application Circuit (Cont.)  
2. Single supply voltage(5V) application  
R4  
3
D2  
1N4148  
D1  
1N4148  
D3  
1N4148  
C1  
1uF  
C2  
VIN  
1uF  
+5V  
L3  
1uH  
C5  
100uF  
C4  
47uF  
C6  
1uF  
VCC  
VC  
C3  
0.1uF  
Q2  
APM2300  
A
8
L4  
Q1A  
SS  
5
HDRV  
3.3uH  
APM7312  
U1  
APW7037A/B  
C8  
0.1uF  
VOUT  
1.5V/5 A  
Shutdown  
C7,C10  
Q1B  
APM7312  
3
1
2
LDRV  
7
COMP  
x150uF  
R1  
249  
R3  
24k  
FB  
GND  
R2  
C9  
1.24k  
2200pF  
3. LCD Monitor Application Circuit  
R8 0  
R4  
3
Extra Circuit for VIN>15V Application  
Q2  
2N3904  
R7 1k  
C11  
1uF  
C12  
0.1uF  
R5  
18k  
D2  
1N4148  
U2  
APL431  
R6  
10k  
D1  
1N4148  
C1  
1uF  
C2  
1uF  
VIN  
9V~22V  
L3  
1uH  
C5  
470uF  
C4  
47uF  
C6  
1uF  
VCC  
VC  
C3  
0.1uF  
8
L4  
50uH  
Q1A  
APM7313  
SS  
5
HDRV  
U1  
APW7037A/B  
C8  
0.1uF  
R9  
12  
VOUT  
5V / 0.2~5 A  
Q1B  
APM7313  
C7,C10  
2 x470uF  
3
1
LDRV  
7
COMP  
R10  
12  
R1  
3k  
R3  
24k  
FB  
GND  
C9  
2200pF  
R2  
1k  
Copyright ã ANPEC Electronics Corp.  
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Rev. A.7 - Jun., 2008  
APW7037A/B  
Package Information  
SOP-8  
D
SEE VIEW A  
°
b
c
e
GAUGE PLANE  
SEATING PLANE  
L
VIEW A  
SOP-8  
S
Y
M
B
O
L
MILLIMETERS  
INCHES  
MIN.  
MAX.  
MIN.  
MAX.  
0.069  
0.010  
A
1.75  
0.25  
0.004  
0.049  
0.012  
0.007  
0.10  
1.25  
0.31  
0.17  
4.80  
5.80  
3.80  
A1  
A2  
b
0.020  
0.010  
0.51  
0.25  
5.00  
6.20  
4.00  
c
D
0.189  
0.228  
0.150  
0.197  
0.244  
0.157  
E
E1  
e
1.27 BSC  
0.050 BSC  
0.010  
0.016  
0.020  
0.050  
0.25  
0.40  
0.50  
1.27  
h
L
°
°
°
°
0
0
8
0
8
Note: 1. Follow JEDEC MS-012 AA.  
2. Dimension “D” does not include mold flash, protrusions or gate burrs.  
Mold flash, protrusion or gate burrs shall not exceed 6 mil per side.  
3. Dimension “E” does not include inter-lead flash or protrusions.  
Inter-lead flash and protrusions shall not exceed 10 mil per side.  
Copyright ã ANPEC Electronics Corp.  
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Rev. A.7 - Jun., 2008  
APW7037A/B  
Package Information  
TSSOP-8  
D
SEE VIEW A  
C
e
b
GAUGE PLANE  
SEATING PLANE  
L
VIEW  
A
TSSOP-8  
S
Y
M
B
O
L
MILLIMETERS  
INCHES  
MIN.  
MAX.  
1.20  
0.15  
1.05  
0.30  
0.20  
3.10  
6.60  
4.50  
MIN.  
MAX.  
A
0.047  
0.006  
0.041  
0.012  
0.008  
0.05  
0.002  
0.031  
0.007  
0.004  
A1  
A2  
b
0.80  
0.19  
0.09  
2.90  
6.20  
4.30  
c
D
0.114  
0.244  
0.122  
0.260  
E
E1  
0.169  
0.177  
0.65 BSC  
e
L
0.026 BSC  
0.018  
0.030  
0.45  
0.75  
0
0
8
°  
0
8
°
°
°
Note : 1. Follow JEDEC MO-153 AA  
2. Dimension "D" does not include mold flash, protrusions  
or gate burrs. Mold flash, protrusion or gate burrs shall not  
exceed 6 mil per side.  
3. Dimension "E1" does not include inter-lead flash or protrusions.  
Inter-lead flash and protrusions shall not exceed 10 mil per side.  
Copyright ã ANPEC Electronics Corp.  
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Rev. A.7 - Jun., 2008  
APW7037A/B  
Carrier Tape & Reel Dimensions  
P0  
P2  
P1  
OD0  
A
K0  
A0  
A
OD1  
B
B
SECTION A-A  
SECTION B-B  
d
T1  
A
H
T1  
C
d
D
W
E1  
F
Application  
SOP-8  
12.4+2.00 13.0+0.50  
330.0±2.00 50 MIN.  
P0 P1  
1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 5.5±0.05  
-0.00  
-0.20  
P2  
D0  
D1  
1.5 MIN.  
d
T
A0  
6.40±0.20 5.20±0.20 2.10±0.20  
E1  
B0  
K0  
1.5+0.10  
-0.00  
0.6+0.00  
-0.40  
4.0±0.10 8.0±0.10 2.0±0.05  
T1  
A
H
C
D
W
F
Application  
TSSOP-8  
12.4+2.00 13.0+0.50  
330.0±2.00 50 MIN.  
P0 P1  
1.5 MIN. 20.2 MIN. 12.0±0.30 1.75±0.10 5.5±0.10  
-0.00  
-0.20  
P2  
D0  
D1  
T
A0  
B0  
K0  
1.5+0.10  
-0.00  
0.6+0.00  
-0.40  
4.00±0.10 8.00±0.10 2.00±0.05  
1.5 MIN.  
6.90±0.20 3.40±0.20 1.60±0.20  
(mm)  
Devices Per Unit  
Package Type  
Unit  
Quantity  
SOP-8  
Tape & Reel  
Tape & Reel  
2500  
2500  
TSSOP-8  
Copyright ã ANPEC Electronics Corp.  
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Rev. A.7 - Jun., 2008  
APW7037A/B  
Reflow Condition (IR/Convection or VPR Reflow)  
tp  
TP  
Critical Zone  
TL to TP  
Ramp-up  
TL  
tL  
Tsmax  
Tsmin  
Ramp-down  
ts  
Preheat  
25  
°
t 25 C to Peak  
Time  
Reliability Test Program  
Test item  
SOLDERABILITY  
Method  
Description  
245°C, 5 sec  
MIL-STD-883D-2003  
MIL-STD-883D-1005.7  
JESD-22-B, A102  
MIL-STD-883D-1011.9  
MIL-STD-883D-3015.7  
JESD 78  
HOLT  
PCT  
TST  
ESD  
1000 Hrs Bias @125°C  
168 Hrs, 100%RH, 121°C  
-65°C~150°C, 200 Cycles  
VHBM > 2KV, VMM > 200V  
10ms, 1tr > 100mA  
Latch-Up  
Classification Reflow Profiles  
Profile Feature  
Sn-Pb Eutectic Assembly  
Pb-Free Assembly  
Average ramp-up rate  
(TL to TP)  
Preheat  
3°C/second max.  
3°C/second max.  
100°C  
150°C  
60-120 seconds  
150°C  
200°C  
60-180 seconds  
- Temperature Min (Tsmin)  
- Temperature Max (Tsmax)  
- Time (min to max) (ts)  
Time maintained above:  
- Temperature (TL)  
183°C  
60-150 seconds  
217°C  
60-150 seconds  
- Time (tL)  
Peak/Classification Temperature (Tp)  
See table 1  
See table 2  
Time within 5°C of actual  
Peak Temperature (tp)  
10-30 seconds  
20-40 seconds  
Ramp-down Rate  
6°C/second max.  
6°C/second max.  
6 minutes max.  
8 minutes max.  
Time 25°C to Peak Temperature  
Note: All temperatures refer to topside of the package. Measured on the body surface.  
Copyright ã ANPEC Electronics Corp.  
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Rev. A.7 - Jun., 2008  
APW7037A/B  
Classification Reflow Profiles (Cont.)  
Table 1. SnPb Eutectic Process – Package Peak Reflow Temperatures  
Package Thickness  
Volume mm3  
<350  
Volume mm3  
350  
<2.5 mm  
³ 2.5 mm  
240 +0/-5°C  
225 +0/-5°C  
225 +0/-5°C  
225 +0/-5°C  
Table 2. Pb-free Process – Package Classification Reflow Temperatures  
Package Thickness  
Volume mm3  
<350  
Volume mm3  
350-2000  
Volume mm3  
>2000  
<1.6 mm  
1.6 mm – 2.5 mm  
³ 2.5 mm  
260 +0°C*  
260 +0°C*  
250 +0°C*  
260 +0°C*  
250 +0°C*  
245 +0°C*  
260 +0°C*  
245 +0°C*  
245 +0°C*  
*Tolerance: The device manufacturer/supplier shall assure process compatibility up to and including the  
stated classification temperature (this means Peak reflow temperature +0°C. For example 260°C+0°C)  
at the rated MSL level.  
Customer Service  
Anpec Electronics Corp.  
Head Office :  
No.6, Dusing 1st Road, SBIP,  
Hsin-Chu, Taiwan  
Tel : 886-3-5642000  
Fax : 886-3-5642050  
Taipei Branch :  
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,  
Sindian City, Taipei County 23146, Taiwan  
Tel : 886-2-2910-3838  
Fax : 886-2-2917-3838  
Copyright ã ANPEC Electronics Corp.  
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Rev. A.7 - Jun., 2008  

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