APW7037AKC-TRL [ANPEC]
8-PIN Synchronous Buck PWM Controller; 8 -PIN同步降压PWM控制器型号: | APW7037AKC-TRL |
厂家: | ANPEC ELECTRONICS COROPRATION |
描述: | 8-PIN Synchronous Buck PWM Controller |
文件: | 总11页 (文件大小:123K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
APW7037/A/B
8-PIN Synchronous Buck PWM Controller
Features
General Description
•
•
•
Operating with Single 5V or 12V Input
Drives N-Channel MOSFETs
Simple Single-Loop Control Design
− Voltage-Mode PWM Control
− Full 0% to 100% Duty Ratio
− Fast Transient Response
The APW7037 series are designed to provide a low
cost synchronous Buck regulator for on-board DC to
DC converter applications. The APW7037 series to-
gether with dual N-channel MOSFETs such as
APM7313, provide a low cost solution for such
applications. Each device features an internal 200/
•
•
•
±2% Output Voltage Accuracy Over Temperature 400kHzoscillator,Power-On-Reset(POR)forbothVCC
Under-Voltage Protection for Output
200/400kHz Constant Frequency Operation
-200kHz for APW7037 & APW7037B
-400kHz for APW7037A
and VC supplies, an external programmable soft-start
function as well as output under-voltage detection that
latches off the device when an output short is detected.
•
•
Small size, 8-PIN Package (SOIC or TSSOP)
Lead Free Available (RoHS Compliant)
Pin Description
Applications
FB
VCC
1
2
3
4
8
7
6
5
SS
COMP
VC
•
•
•
•
Graphics Cards
LDRV
GND
DDR Memory Power Supply
DDR Memory Termination Voltage
Low-Voltage Distributed Power Supplies
HDRV
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright ANPEC Electronics Corp.
Rev. A.6 - Apr , 2005
1
www.anpec.com.tw
APW7037/A/B
Ordering and Marking Information
Package Code
K : SO-8
APW7037/A/B
R : TSSOP-8
Operating Junction Temp. Range
C : 0 to 70°C
Handling Code
TU : Tube
TR : Tape & Reel
Lead Free Code
Lead Free Code
Handling Code
Temp. Range
Package Code
L : Lead Free Device Blank : Original Device
APW7037/A/B
APW7037/A/B K :
APW7037/A/B R :
XXXXX - Date Code
XXXXX - Date Code
XXXXX
APW7037/A/B
XXXXX
Notes: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte in plate termi-
nation finish; which are fully compliant with RoHS and compatible with both SnPb and lead-free soldiering operations.
ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J STD-020C for MSL classifica-
tion at lead-free peak reflow temperature.
Block Diagram
SS
VCC
20uA
4.5V
Regulator
POR
3.3V
Max.
64uA
Pow er
On Reset
VC
HDRV
Under-V oltage
V FBUV
Gate
Control
25k
PWM
V CC
FB
Error
A mp.
25k
LDRV
VREF
OSC
FOSC
COMP
GND
Absolute Maximum Ratings
Description
VCC to GND
VC to GND
Operating Junction Temperature
Storage Temperature
Soldering Temperature (10 Seconds)
Minimum ESD Rating
Rating
Unit
V
V
°C
°C
°C
kV
-0.2~30
-0.2~30
0~125
-65~150
300
±2
Copyright ANPEC Electronics Corp.
Rev. A.6 - Apr, 2005
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APW7037/A/B
Thermal Characteristics
Symbol
Parameter
Value
Unit
Thermal Resistance in Free Air
8-pin SOIC
θJA
160
124
°C/W
8-pin TSSOP
Electrical Characteristics
A
Unless otherwise specified, these specifications apply over VCC=5V, VC=12V and T =0 to 70°C. Typical
A
values refer to T =25°.
APW7037/A/B
Unit
Symbol
SUPPLY CURRENT
VCC Dynamic Supply
Parameter
Test Conditions
Min. Typ. Max.
CC
I
FOSC=200KHz, CL=1500pF
2
3
5
mA
Current
C
FOSC=200KHz, CL=1500pF
SS=GND
I
VC Dynamic Supply Current
VCC Static Supply Current
VC Static Supply Current
2
5.5
1.5
0.4
8
3
1
mA
mA
mA
CCQ
I
0.5
0.2
CQ
SS=GND
I
POWER-ON RESET
Rising VCC Threshold
4.0
3.1
4.2
0.25
3.3
4.4
3.5
V
V
V
V
VCC POR Hysteresis
Rising VC Threshold
VC POR Hysteresis
0.2
OSCILLATOR
APW7037 180
APW7037A 360
APW7037B 180
200
400
200
1.10
220
OSC
F
Free Running Frequency
440 KHz
220
V
Ramp Amplitude
∆VOSC
ERROR AMPLIFIER
FB1
I
FB
FB Pin Input Bias Current
SS=3V, V =1V
1
nA
FB2
FB
I
FB Pin Input Bias Current
Transconductance
SS=0V, V =1V
-64
600
µA
GM
450
750
µmho
REFERENCE VOLTAGE
APW7037 1.225 1.250 1.275
APW7037A 0. 784 0. 800 0. 816
APW7037B 0.784 0.800 0.816
FB
V
FB Pin Regulation Voltage
V
LREG VFB Line Regulation
VCC = 5~12V
0.2
0.35
%
Copyright ANPEC Electronics Corp.
Rev. A.6 - Apr, 2005
3
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APW7037/A/B
Electrical Characteristics (Cont.)
A
Unless otherwise specified, these specifications apply over VCC=5V, VC=12V and T =0 to 70°C. Typical
A
values refer to T =25°C.
APW7037/A/B
Unit
Symbol
Parameter
Test Conditions
Min. Typ. Max.
GATE DRIVERS
L
HDRV Rising Time
HDRV Falling Time
LDRV Rising Time
LDRV Falling Time
Dead Band Time
C = 1500pF
20
15
50
50
nS
nS
nS
L
C = 1500pF
L
C = 1500pF
25
50
L
C = 1500pF
25
50
nS
nS
50
150
250
PROTECTION
FBUV
FB
V
FB Under-Voltage Threshold V Falling
APW7037
0.4
0.6
0. 4
0.4
0.5
20
0.8
0. 5
0.5
APW7037A 0.3
APW7037B 0.3
V
SD
V
Shutdown Threshold Voltage Pull the voltage of SS pin
Soft-Start Current SS=0
V
10
30
SS
I
µA
Functional Pin Description
FB (Pin 1)
Connect this pin to the output (VOUT) of the PWM con- are measured with respect to this pin.
verter via an external resistor divider to provide a volt-
HDRV (Pin 5)
age set by the resistor divider is determined using the Connect this pin to the gate of the high-side power
age feedback path for the converter. The output volt-
MOSFET. This pin provides the gate drive for the
MOSFET.
following formula :
ROUT
VOUT = VREF x
(
)
1+
RGND
VC (Pin 6)
where ROUT is the resistor connected from VOUT to FB
, and RGND is the resistor connected from FB to ground.
This pin provides bias voltage to the high-side
The voltage at this pin is also monitored for Under- MOSFET driver. A bootstrap circuit may be used to
pump a boot voltage for enforcing the driving capabil-
ity of the gate driver and improving the performance of
the MOSFET.
Voltage protection.
VCC (Pin 2)
Connect this pin to input voltage from 5V to 20V. This
pin provides the bias for the control circuitry and the
COMP (Pin 7)
low-side power MOSFET driver (LDRV). The voltage This pin is the output of the error amplifier. Add an
external resistor-capacitor network to provide a loop
compensation for the PWM converter.
at this pin is monitored for Power-On Reset (POR)
purpose.
SS (Pin 8)
LDRV (Pin 3)
Connect a capacitor from this pin to ground.This
Connect this pin to the gate of the low-side power
MOSFET. This pin provides the gate drive for the capacitor, along with an internal 20uA current source,
sets the soft-start interval of the PWM converter and
prevents the outputs from overshoot as well as limits
the input current. Pull this pin below 0.5V can shut-
down the converter.
MOSFET.
GND (Pin 4)
Signal and power ground for the IC. All voltage levels
Copyright ANPEC Electronics Corp.
Rev. A.6 - Apr, 2005
4
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APW7037/A/B
Typical Applications
1. Dual supply voltage(5V and 12V) application
R4
3
+12V
VIN
C1
C2
+5V
1uF
1uF
L3
C4
C3
C5
1uH
100uF
47uF
1uF
VCC
VC
Q2
APM2300A
8
L4
Q1A
SS
5
HDRV
3.3uH
APM7313
U1
C7
VOUT
APW 7037
0.1uF
1.5V/5 A
Shutdown
Q1B
C6,C9
3
1
APM7313
2 x 150uF
LDRV
FB
7
CO M P
R1
R3
249
24k
G ND
R2
C8
1.24k
2200pF
2. Single supply voltage(5V) application
R4
3
D2
D1
D3
1N4148
1N4148
1N4148
C1
IN
C2
V
1uF
1uF
+5V
L3
C5
C4
C6
1uH
100uF
47uF
1uF
VCC
VC
C3
Q2
0.1uF
APM2300A
8
L4
Q1A
SS
5
HDRV
3.3uH
APM7312
U1
C8
OUT
V
APW 7037
0.1uF
1.5V/5 A
Shutdown
Q1B
APM7312
C7,C10
3
1
LDRV
FB
2 x150uF
7
COM P
R1
R3
249
24k
GND
R2
C9
1.24k
2200pF
Copyright ANPEC Electronics Corp.
Rev. A.6 - Apr, 2005
5
www.anpec.com.tw
APW7037/A/B
Typical Applications (Cont.)
3. LCD Monitor Application Circuit
R8
0
R4
3
Extra Circuit for VIN>15V Application
Q2
R7 1k
C11
C12
2N3904
R5
D2
1uF
0.1uF
18k
1N4148
U2
APL431
R6
10k
D1
1N4148
C1
1uF
C2
VIN
L3
1uF
C5
9V~22V
C4
C6
1uH
470uF
47uF
1uF
VCC
VC
C3
0.1uF
8
Q1A
L4
SS
5
HDRV
APM7313
50uH
U1
C8
R9
12
VOUT
APW 7037
0.1uF
5V / 0.2~5 A
Q1B
C7,C10
3
1
APM7313
LDRV
FB
2 x470uF
7
CO M P
R10
12
R1
3k
R3
24k
G ND
C9
R2
1k
2200pF
Copyright ANPEC Electronics Corp.
Rev. A.6 - Apr, 2005
6
www.anpec.com.tw
APW7037/A/B
Package Information
SOP-8 pin ( Reference JEDEC Registration MS-012)
E
H
e1
e2
D
A1
A
1
L
0.004max.
Millimeters
Inches
Dim
Min.
Max.
Min.
Max.
0.069
0.010
0.197
0.157
0.244
0.050
0.020
A
A1
D
1.35
0.10
4.80
3.80
5.80
0.40
0.33
1.75
0.25
5.00
4.00
6.20
1.27
0.51
0.053
0.004
0.189
0.150
0.228
0.016
0.013
E
H
L
e1
e2
1.27BSC
0.50BSC
1
8
8
°
φ
°
Copyright ANPEC Electronics Corp.
Rev. A.6 - Apr, 2005
7
www.anpec.com.tw
APW7037/A/B
Package Information
TSSOP-8
e
8
7
2 x E / 2
(
2)
E1
E
GAUGE
PLANE
S
1
2
e/2
0.25
L
D
1
A2
(L1)
A
(
3)
b
A1
Millimeters
Inches
Dim
Min.
Max.
1.2
0.15
1.05
0.30
Min.
Max.
0.047
0.006
0.041
0.012
A
A1
A2
b
0.00
0.80
0.19
0.000
0.031
0.007
D
e
E
2.9
3.1
0.114
0.122
0.65 BSC
6.40 BSC
0.026 BSC
0.252 BSC
E1
L
L1
4.30
0.45
4.50
0.75
0.169
0.018
0.177
0.030
1.0 REF
0.039REF
R
R1
S
0.09
0.09
0.2
0.004
0.004
0.008
1
2
φ
0
°
8
°
0
°
8
°
φ
12 REF
12 REF
°
°
3
φ
12 REF
12 REF
°
°
Copyright ANPEC Electronics Corp.
Rev. A.6 - Apr, 2005
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APW7037/A/B
Physical Specifications
Terminal Material
Lead Solderability
Solder-Plated Copper (Solder Material : 90/10 or 63/37 SnPb), 100%Sn
Meets EIA Specification RSI86-91, ANSI/J-STD-002 Category 3.
Reflow Condition (IR/Convection or VPR Reflow)
tp
TP
Critical Zone
TL to TP
Ramp-up
TL
tL
Tsmax
Tsmin
Ramp-down
ts
Preheat
25
°
t 25 C to Peak
Tim e
Classificatin Reflow Profiles
Sn-Pb Eutectic Assembly
Large Body Small Body
Pb-Free Assembly
Profile Feature
Large Body
Small Body
Average ramp-up rate
(TL to TP)
3°C/second max.
3°C/second max.
Preheat
- Temperature Min (Tsmin)
- Temperature Mix (Tsmax)
- Time (min to max)(ts)
100°C
150°C
60-120 seconds
150°C
200°C
60-180 seconds
Tsmax to TL
3°C/second max
- Ramp-up Rate
Tsmax to TL
- Temperature(TL)
- Time (tL)
183°C
60-150 seconds
217°C
60-150 seconds
Peak Temperature(Tp)
225 +0/-5°C
240 +0/-5°C
245 +0/-5°C
250 +0/-5°C
Time within 5°C of actual Peak
Temperature(tp)
10-30 seconds
10-30 seconds
10-30 seconds 20-40 seconds
Ramp-down Rate
Time 25°C to Peak Temperature
6°C/second max.
6 minutes max.
6°C/second max.
8 minutes max.
Note: All temperatures refer to topside of the package. Measured on the body surface.
Copyright ANPEC Electronics Corp.
Rev. A.6 - Apr, 2005
9
www.anpec.com.tw
APW7037/A/B
Reliability test program
Test item
SOLDERABILITY
HOLT
PCT
TST
Method
Description
MIL-STD-883D-2003
MIL-STD-883D-1005.7
JESD-22-B, A102
MIL-STD-883D-1011.9
MIL-STD-883D-3015.7
JESD 78
245 C , 5 SEC
°
1000 Hrs Bias @ 125 C
°
168 Hrs, 100 % RH , 121 C
°
-65 C ~ 150 C, 200 Cycles
VHBM > 2KV, VMM > 200V
10ms , Itr > 100mA
°
°
ESD
Latch-Up
Carrier Tape & Reel Dimensions
t
D
P
Po
E
P1
Bo
F
W
Ko
Ao
D1
T2
J
C
A
B
T1
A
B
C
J
T1
2 + 0.5 12.4 +0.2
Po P1
T2
W
P
E
Application
12.75
+0.15
12 + 0.3
- 0.1
330 1
62 1.5
2 0.2
±
8 0.1
±
1.75 0.1
±
±
±
F
D
D1
Ao
Bo
Ko
t
SOP-8
1.55+0.25
5.5 0.1 1.55 +0.1
4.0 0.1 2.0 0.1 6.4 0.1 5.2 0.1 2.1 0.1 0.3 0.013
±
±
±
±
±
±
±
±
Application
TSSOP-8
A
B
C
J
T1
T2
W
P
E
12.75+
0.15
330
1
62 +1.5
2 + 0.5 12.4 0.2
2
0.2
12 0. 3
8 0.1 1.75 0.1
± ±
±
±
±
±
F
D
D1
Po
P1
Ao
Bo
Ko
t
5.5 0. 1 1.5 + 0.1 1.5 + 0.1 4.0 0.1 2.0 0.1 7.0 0.1 3.6 0.3 1.6 0.1 0.3 0.013
±
±
±
±
±
±
±
(mm)
Copyright ANPEC Electronics Corp.
Rev. A.6 - Apr, 2005
10
www.anpec.com.tw
APW7037/A/B
Cover Tape Dimensions
Application
SOP- 8
TSSOP- 8
Carrier Width
Cover Tape Width
Devices Per Reel
12
12
9.3
9.3
2500
2500
Customer Service
Anpec Electronics Corp.
Head Office :
5F, No. 2 Li-Hsin Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
7F, No. 137, Lane 235, Pac Chiao Rd.,
Hsin Tien City, Taipei Hsien, Taiwan, R. O. C.
Tel : 886-2-89191368
Fax : 886-2-89191369
Copyright ANPEC Electronics Corp.
Rev. A.6 - Apr, 2005
11
www.anpec.com.tw
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