AT24C08A-10TI-2.7 [ATMEL]
2-Wire Serial EEPROM; 2线串行EEPROM
| 型号： | AT24C08A-10TI-2.7 |
| 厂家： | 
ATMEL |
| 描述： | 2-Wire Serial EEPROM |
| 文件： | 总13页 (文件大小：185K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• Write Protect Pin for Hardware Data Protection
– Utilizes Different Array Protection Compared to the AT24C02/04/08
• Low Voltage and Standard Voltage Operation
– 5.0 (VCC = 4.5V to 5.5V)
– 2.7 (VCC = 2.7V to 5.5V)
– 2.5 (VCC = 2.5V to 5.5V)
– 1.8 (VCC = 1.8V to 5.5V)
• Internally Organized 256 x 8 (2K), 512 x 8 (4K) or 1024 x 8 (8K)
• 2-Wire Serial Interface
• Schmitt Trigger, Filtered Inputs for Noise Supperssion
• Bidirectional Data Transfer Protocol
• 100 kHz (1.8V, 2.5V, 2.7V) and 400 kHz (5V) Compatibility
• 8-Byte Page (2K), 16-Byte Page (4K, 8K) Write Modes
• Partial Page Writes Are Allowed
2-Wire Serial
EEPROM
2K (256 x 8)
• Self-Timed Write Cycle (10 ms max)
• High Reliability
– Endurance: 1 Million Write Cycles
– Data Retention: 100 Years
4K (512 x 8)
– ESD Protection: >3000V
• Automotive Grade and Extended Temperature Devices Available
• 8-Pin and 14-Pin JEDEC SOIC, 8-Pin PDIP, and 8-Pin TSSOP Packages
8K (1024 x 8)
AT24C02A
AT24C04A
AT24C08A
Description
The AT24C02A/04A/08A provides 2048/4096/8192 bits of serial electrically erasable
and programmable read only memory (EEPROM) organized as 256/512/1024 words
of 8 bits each. The device is optimized for use in many industrial and commercial
applications where low power and low voltage operation are essential. The
AT24C02A/04A/08A is available in space saving 8-pin PDIP, 8-pin, 14-pin SOIC, and
8-pin TSSOP packages and is accessed via a 2-wire serial interface. In addition, the
entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to 5.5V), 2.5V (2.5V to
5.5V) and 1.8V (1.8V to 5.5V) versions.
8-Pin PDIP
Pin Configurations
Pin Name
A0 to A2
SDA
Function
Address Inputs
Serial Data
AT24C02A/04A/
08A
SCL
Serial Clock Input
Write Protect
No Connect
WP
8-Pin SOIC
NC
14-Pin SOIC
8-Pin TSSOP
Rev. 0976B–07/98
Absolute Maximum Ratings*
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Operating Temperature.................................. -55°C to +125°C
Storage Temperature..................................... -65°C to +150°C
Voltage on Any Pin
with Respect to Ground.....................................-1.0V to +7.0V
Maximum Operating Voltage........................................... 6.25V
DC Output Current........................................................ 5.0 mA
Block Diagram
Pin Description
SERIAL CLOCK (SCL): The SCL input is used to positive
edge clock data into each EEPROM device and negative
edge clock data out of each device.
The AT24C04A uses the A2 and A1 inputs for hard wire
addressing and a total of four 4K devices may be
addressed on a single bus system. The A0 pin is a no con-
nect.
SERIAL DATA (SDA): The SDA pin is bidirectional for
serial data transfer. This pin is open-drain driven and may
be wire-ORed with any number of other open-drain or open
collector devices.
The AT24C08A only uses the A2 input for hardwire
addressing and a total of two 8K devices may be
addressed on a single bus system. The A0 and A1 pins are
no connects.
DEVICE/PAGE ADDRESSES (A2, A1, A0): The A2, A1
and A0 pins are device address inputs that are hard wired
for the AT24C02A. As many as eight 2K devices may be
addressed on a single bus system (device addressing is
discussed in detail under the Device Addressing section).
WRITE PROTECT (WP): The AT24C02A/04A/08A has a
Write Protect pin that provides hardware data protection.
The Write Protect pin allows normal read/write operations
when connected to ground (GND). When the Write Protect
AT24C02A/04A/08A
2
AT24C02A/04A/08A
pin is connected to VCC, the write protection feature is
enabled and operates as shown in the following table.
Memory Organization
AT24C02A, 2K SERIAL EEPROM: Internally organized
with 256 pages of 1-byte each, the 2K requires an 8 bit
data word address for random word addressing.
Part of the Array Protected
WP Pin
AT24C04A, 4K SERIAL EEPROM: The 4K is internally
organized with 256 pages of 2-bytes each. Random word
addressing requires a 9 bit data word address.
Status
At VCC
At GND
24C02A
24C04A
24C08A
Upper Half
(1K) Array
Upper Half
(2K) Array
Full (8K)
Array
AT24C08A, 8K SERIAL EEPROM: The 8K is internally
organized with 4 blocks of 256 pages of 4-bytes each.
Random word addressing requires a 10 bit data word
address.
Normal Read/Write Operations
Pin Capacitance
Applicable over recommended operating range from TA = 25°C, f = 1.0 MHz, VCC = +1.8V.
Symbol
CI/O
Test Condition
Max
8
Units
pF
Conditions
VI/O = 0V
VIN = 0V
Input/Output Capacitance (SDA)
Input Capacitance (A0, A1, A2, SCL)
CIN
6
pF
Note:
1. This parameter is characterized and is not 100% tested.
DC Characteristics
Applicable over recommended operating range from: TAI = -40°C to +85°C, VCC = +1.8V to +5.5V, TAC = 0°C to +70°C,
VCC = +1.8V to +5.5V (unless otherwise noted).
Symbol
VCC1
VCC2
VCC3
VCC4
ICC
Parameter
Test Condition
Min
1.8
2.5
2.7
4.5
Typ
Max
5.5
Units
V
Supply Voltage
Supply Voltage
5.5
V
Supply Voltage
5.5
V
Supply Voltage
5.5
V
Supply Current VCC = 5.0V
Supply Current VCC = 5.0V
Standby Current VCC = 1.8V
Standby Current VCC = 2.5V
Standby Current VCC = 2.7V
Standby Current VCC = 5.0V
Input Leakage Current
Output Leakage Current
Input Low Level (1)
READ at 100 kHz
WRITE at 100 kHz
VIN = VCC or VSS
VIN = VCC or VSS
VIN = VCC or VSS
VIN = VCC or VSS
VIN = VCC or VSS
VOUT = VCC or VSS
0.4
2.0
1.0
mA
mA
µA
µA
µA
µA
µA
µA
V
ICC
3.0
ISB1
ISB2
ISB3
ISB4
ILI
0.6
3.0
1.4
4.0
1.6
4.0
8.0
18.0
3.0
0.10
0.05
ILO
3.0
VIL
-0.6
VCC x 0.3
VCC + 0.5
0.4
VIH
Input High Level (1)
VCC x 0.7
V
VOL2
VOL1
Output Low Level VCC = 3.0V
Output Low Level VCC = 1.8V
IOL = 2.1 mA
IOL = 0.15 mA
V
0.2
V
Note:
1. VIL min and VIH max are reference only and are not tested.
3
AC Characteristics
Applicable over recommended operating range from TA = -40°C to +85°C, VCC = +1.8V to +5.5V, CL = 1 TTL Gate and
100 pF (unless otherwise noted).
2.7-, 2.5-, 1.8-volt
5.0-volt
Symbol
fSCL
Parameter
Min
Max
Min
Max
Units
kHz
µs
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
Noise Suppression Time(1)
Clock Low to Data Out Valid
100
400
tLOW
tHIGH
tI
4.7
4.0
1.2
0.6
µs
100
4.5
50
ns
tAA
0.1
4.7
0.1
1.2
0.9
µs
Time the bus must be free before
a new transmission can start(1)
tBUF
µs
tHD.STA
tSU.STA
tHD.DAT
tSU.DAT
tR
Start Hold Time
4.0
4.7
0
0.6
0.6
0
µs
µs
µs
ns
µs
ns
µs
ns
ms
Start Set-up Time
Data In Hold Time
Data In Set-up Time
Inputs Rise Time(1)
Inputs Fall Time(1)
Stop Set-up Time
Data Out Hold Time
Write Cycle Time
200
100
1.0
0.3
tF
300
300
tSU.STO
tDH
4.7
0.6
50
100
tWR
10
10
Write
Cycles
Endurance(1)
5.0V, 25°C, Page Mode
1M
1M
Note:
1. This parameter is characterized and is not 100% tested.
Device Operation
CLOCK and DATA TRANSITIONS: The SDA pin is nor-
mally pulled high with an external device. Data on the SDA
pin may change only during SCL low time periods (refer to
Data Validity timing diagram). Data changes during SCL
high periods will indicate a start or stop condition as
defined below.
ACKNOWLEDGE: All addresses and data words are seri-
ally transmitted to and from the EEPROM in 8 bit words.
The EEPROM sends a zero to acknowledge that it has
received each word. This happens during the ninth clock
cycle.
STANDBY MODE: The AT24C02A/04A/08A features a low
power standby mode which is enabled: (a) upon power-up
and (b) after the receipt of the STOP bit and the completion
of any internal operations.
START CONDITION: A high-to-low transition of SDA with
SCL high is a start condition which must precede any other
command (refer to Start and Stop Definition timing dia-
gram).
MEMORY RESET: After an interruption in protocol, power
loss or system reset, any 2-wire part can be reset by follow-
ing these steps:(a) Clock up to 9 cycles, (b) look for SDA
high in each cycle while SCL is high and then (c) create a
start condition as SDA is high.
STOP CONDITION: A low-to-high transition of SDA with
SCL high is a stop condition. After a read sequence, the
stop command will place the EEPROM in a standby power
mode (refer to Start and Stop Definition timing diagram).
AT24C02A/04A/08A
4
AT24C02A/04A/08A
Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O)
Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O)
SCL
SDA
8th BIT
WORD n
ACK
(1)
tWR
STOP
START
CONDITION
CONDITION
Note:
1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the interval
clear/write cycle.
5
Data Validity
Start and Stop Definition
Output Acknowledge
AT24C02A/04A/08A
6
AT24C02A/04A/08A
The data word address lower three (2K) or four (4K, 8K)
bits are internally incremented following the receipt of each
data word. The higher data word address bits are not incre-
mented, retaining the memory page row location. When the
word address, internally generated, reaches the page
boundary, the following byte is placed at the beginning of
the same page. If more than eight (2K) or sixteen (4K, 8K)
data words are transmitted to the EEPROM, the data word
address will “roll over” and previous data will be overwrit-
ten.
Device Addressing
The 2K, 4K and 8K EEPROM devices all require an 8 bit
device address word following a start condition to enable
the chip for a read or write operation (refer to Figure 1).
The device address word consists of a mandatory one,
zero sequence for the first four most significant bits as
shown. This is common to all the EEPROM devices.
The next 3 bits are the A2, A1 and A0 device address bits
for the 2K EEPROM. These 3 bits must compare to their
corresponding hard-wired input pins.
ACKNOWLEDGE POLLING: Once the internally-timed
write cycle has started and the EEPROM inputs are dis-
abled, acknowledge polling can be initiated. This involves
sending a start condition followed by the device address
word. The read/write bit is representative of the operation
desired. Only if the internal write cycle has completed will
the EEPROM respond with a zero allowing the read or
write sequence to continue.
The 4K EEPROM only uses the A2 and A1 device address
bits with the third bit being a memory page address bit. The
two device address bits must compare to their correspond-
ing hard-wired input pins. The A0 pin is no connect.
The 8K EEPROM only uses the A2 device address bit with
the next 2 bits being for memory page addressing. The A2
bit must compare to its corresponding hard-wired input pin.
The A1 and A0 pins are no connect.
Read Operations
The eighth bit of the device address is the read/write opera-
tion select bit. A read operation is initiated if this bit is high
and a write operation is initiated if this bit is low.
Read operations are initiated the same way as write opera-
tions with the exception that the read/write select bit in the
device address word is set to one. There are three read
operations: current address read, random address read
and sequential read.
Upon a compare of the device address, the EEPROM will
output a zero. If a compare is not made, the chip will return
to a standby state.
CURRENT ADDRESS READ: The internal data word
address counter maintains the last address accessed dur-
ing the last read or write operation, incremented by one.
This address stays valid between operations as long as the
chip power is maintained. The address “roll over” during
read is from the last byte of the last memory page to the
first byte of the first page. The address “roll over” during
write is from the last byte of the current page to the first
byte of the same page.
Write Operations
BYTE WRITE: A write operation requires an 8 bit data
word address following the device address word and
acknowledgement. Upon receipt of this address, the
EEPROM will again respond with a zero and then clock in
the first 8 bit data word. Following receipt of the 8 bit data
word, the EEPROM will output a zero and the addressing
device, such as a microcontroller, must terminate the write
sequence with a stop condition. At this time the EEPROM
enters an internally-timed write cycle , tWR, to the nonvola-
tile memory. All inputs are disabled during this write cycle
and the EEPROM will not respond until the write is com-
plete (refer to Figure 2).
Once the device address with the read/write select bit set
to one is clocked in and acknowledged by the EEPROM,
the current address data word is serially clocked out. The
microcontroller does not respond with an input zero but
does generate a following stop condition (refer to Figure 4).
RANDOM READ: A random read requires a “dummy” byte
write sequence to load in the data word address. Once the
device address word and data word address are clocked in
and acknowledged by the EEPROM, the microcontroller
must generate another start condition. The microcontroller
now initiates a current address read by sending a device
address with the read/write select bit high. The EEPROM
acknowledges the device address and serially clocks out
the data word. The microcontroller does not respond with a
zero but does generate a following stop condition (refer to
Figure 5).
PAGE WRITE: The 2K EEPROM is capable of an 8-byte
page write, and the 4K and 8K devices are capable of 16-
byte page writes.
A page write is initiated the same as a byte write, but the
microcontroller does not send a stop condition after the first
data word is clocked in. Instead, after the EEPROM
acknowledges receipt of the first data word, the microcon-
troller can transmit up to seven (2K) or fifteen (4K, 8K)
more data words. The EEPROM will respond with a zero
after each data word received. The microcontroller must
terminate the page write sequence with a stop condition
(refer to Figure 3).
SEQUENTIAL READ: Sequential reads are initiated by
either a current address read or a random address read.
After the microcontroller receives a data word, it responds
7
with an acknowledge. As long as the EEPROM receives an
acknowledge, it will continue to increment the data word
address and serially clock out sequential data words. When
the memory address limit is reached, the data word
address will “roll over” and the sequential read will con-
tinue. The sequential read operation is terminated when
the microcontroller does not respond with a zero but does
generate a following stop condition (refer to Figure 6).
Figure 1. Device Address
A
A
A
A
A
A
R/W
LSB
2K
4K
8K
1
0
0
0
1
1
1
0
0
0
0
2
2
2
1
1
MSD
R/W
1
1
P0
R/W
P1 P0
Figure 2. Byte Write
S
T
A
R
T
W
R
I
S
T
T
E
O
P
DEVICE
ADDRESS
WORD ADDRESS
DATA
SDA LINE
M
S
B
L R A
M
S
B
L
S
B
A
C
K
A
C
K
/
S
C
W
B
K
Figure 3. Page write
S
T
W
R
I
S
T
A
R
T
E
O
P
DEVICE
ADDRESS
T
WORD ADDRESS (n)
DATA (n)
DATA (n + 1)
DATA (n + x)
SDA LINE
M
S
B
L R A
A
C
K
A
C
K
A
C
K
A
C
K
/
S
C
B W K
AT24C02A/04A/08A
8
AT24C02A/04A/08A
Figure 4. Current Address Read
S
T
A
R
T
R
E
A
D
S
T
O
P
DEVICE
ADDRESS
SDA LINE
M
S
B
L R A
DATA
N
O
/
S
C
B
K
W
A
C
K
Figure 5. Random Read
S
T
A
R
T
W
R
I
S
T
A
R
T
R
E
A
D
S
T
DEVICE
ADDRESS
T
E
O
P
DEVICE
ADDRESS
WORD
ADDRESS n
SDA LINE
M
S
B
L R A
L A
S C
B K
A
C
K
DATA n
N
O
M
M
S
B
L
S
B
/
S
C
S
B
K
W
B
A
C
K
DUMMY WRITE
Figure 6. Sequential Read
9
AT24C02A Ordering Information
tWR (max)
(ms)
ICC (max)
ISB (max)
(µA)
fMAX
(kHz)
(µA)
Ordering Code
Package
Operation Range
10
10
10
10
3000
3000
1500
1500
1000
1000
800
18
18
4
400
400
100
100
100
100
100
100
AT24C02A-10PC
AT24C02AN-10SC
AT24C02A-10SC
AT24C02A-10TC
8P3
8S1
14S
8T
Commercial
(0°C to 70°C)
AT24C02A-10PI
AT24C02AN-10SI
AT24C02A-10SI
AT24C02A-10TI
8P3
8S1
14S
8T
Industrial
(-40°C to 85°C)
AT24C02A-10PC-2.7
AT24C02AN-10SC-2.7
AT24C02A-10SC-2.7
AT24C02A-10TC-2.7
8P3
8S1
14S
8T
Commercial
(0°C to 70°C)
4
AT24C02A-10PI-2.7
AT24C02AN-10SI-2.7
AT24C02A-10SI-2.7
AT24C02A-10TI-2.7
8P3
8S1
14S
8T
Industrial
(-40°C to 85°C)
4
AT24C02A-10PC-2.5
AT24C02AN-10SC-2.5
AT24C02A-10SC-2.5
AT24C02A-10TC-2.5
8P3
8S1
14S
8T
Commercial
(0°C to 70°C)
4
AT24C02A-10PI-2.5
AT24C02AN-10SI-2.5
AT24C02A-10SI-2.5
AT24C02A-10TI-2.5
8P3
8S1
14S
8T
Industrial
(-40°C to 85°C)
3
AT24C02A-10PC-1.8
AT24C02AN-10SC-1.8
AT24C02A-10SC-1.8
AT24C02A-10TC-1.8
8P3
8S1
14S
8T
Commercial
(0°C to 70°C)
800
3
AT24C02A-10PI-1.8
AT24C02AN-10SI-1.8
AT24C02A-10SI-1.8
AT24C02A-10TI-1.8
8P3
8S1
14S
8T
Industrial
(-40°C to 85°C)
Package Type
8P3
8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
14-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (SOIC)
8-Lead, 0.170” Wide, Thin Shrink Small Outline Package (TSSOP)
Options
8S1
14S
8T
Blank
-2.7
Standard Operation (4.5V to 5.5V)
Low-Voltage (2.7V to 5.5V)
-2.5
Low-Voltage (2.5V to 5.5V)
-1.8
Low-Voltage (1.8V to 5.5V)
AT24C02A/04A/08A
10
AT24C02A/04A/08A
AT24C04A Ordering Information
tWR (max)
(ms)
ICC (max)
ISB (max)
(µA)
fMAX
(kHz)
(µA)
Ordering Code
Package
Operation Range
10
10
10
10
3000
3000
1500
1500
1000
1000
800
18
18
4
400
400
100
100
100
100
100
100
AT24C04A-10PC
AT24C04AN-10SC
AT24C04A-10SC
AT24C04A-10TC
8P3
8S1
14S
8T
Commercial
(0°C to 70°C)
AT24C04A-10PI
AT24C04AN-10SI
AT24C04A-10SI
AT24C04A-10TI
8P3
8S1
14S
8T
Industrial
(-40°C to 85°C)
AT24C04A-10PC-2.7
AT24C04AN-10SC-2.7
AT24C04A-10SC-2.7
AT24C04A-10TC
8P3
8S1
14S
8T
Commercial
(0°C to 70°C)
4
AT24C04A-10PI-2.7
AT24C04AN-10SI-2.7
AT24C04A-10SI-2.7
AT24C04A-10TI-2.7
8P3
8S1
14S
8T
Industrial
(-40°C to 85°C)
4
AT24C04A-10PC-2.5
AT24C04AN-10SC-2.5
AT24C04A-10SC-2.5
AT24C04A-10TC-2.5
8P3
8S1
14S
8T
Commercial
(0°C to 70°C)
4
AT24C04A-10PI-2.5
AT24C04AN-10SI-2.5
AT24C04A-10SI-2.5
AT24C04A-10TI-2.5
8P3
8S1
14S
8T
Industrial
(-40°C to 85°C)
3
AT24C04A-10PC-1.8
AT24C04AN-10SC-1.8
AT24C04A-10SC-1.8
AT24C04A-10TC-1.8
8P3
8S1
14S
8T
Commercial
(0°C to 70°C)
800
3
AT24C04A-10PI-1.8
AT24C04AN-10SI-1.8
AT24C04A-10SI-1.8
AT24C04A-10TI-1.8
8P3
8S1
14S
8T
Industrial
(-40°C to 85°C)
Package Type
8P3
8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
14-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (SOIC)
8-Lead, 0.170” Wide, Thin Shrink Small Outline Package (TSSOP)
Options
8S1
14S
8T
Blank
-2.7
Standard Operation (4.5V to 5.5V)
Low-Voltage (2.7V to 5.5V)
-2.5
Low-Voltage (2.5V to 5.5V)
-1.8
Low-Voltage (1.8V to 5.5V)
11
AT24C08A Ordering Information
tWR (max)
(ms)
ICC (max)
ISB (max)
(µA)
fMAX
(kHz)
(µA)
Ordering Code
Package
Operation Range
10
10
10
10
3000
3000
1500
1500
1000
1000
800
18
18
4
400
400
100
100
100
100
100
100
AT24C08A-10PC
AT24C08AN-10SC
AT24C08A-10SC
AT24C08A-10TC
8P3
8S1
14S
8T
Commercial
(0°C to 70°C)
AT24C08A-10PI
AT24C08AN-10SI
AT24C08A-10SI
AT24C08A-10TI
8P3
8S1
14S
8T
Industrial
(-40°C to 85°C)
AT24C08A-10PC-2.7
AT24C08AN-10SC-2.7
AT24C08A-10SC-2.7
AT24C08A-10TC-2.7
8P3
8S1
14S
8T
Commercial
(0°C to 70°C)
4
AT24C08A-10PI-2.7
AT24C08AN-10SI-2.7
AT24C08A-10SI-2.7
AT24C08A-10TI-2.7
8P3
8S1
14S
8T
Industrial
(-40°C to 85°C)
4
AT24C08A-10PC-2.5
AT24C08AN-10SC-2.5
AT24C08A-10SC-2.5
AT24C08A-10TC-2.5
8P3
8S1
14S
8T
Commercial
(0°C to 70°C)
4
AT24C08A-10PI-2.5
AT24C08AN-10SI-2.5
AT24C08A-10SI-2.5
AT24C08A-10TI-2.5
8P3
8S1
14S
8T
Industrial
(-40°C to 85°C)
3
AT24C08A-10PC-1.8
AT24C08AN-10SC-1.8
AT24C08A-10SC-1.8
AT24C08A-10TC-1.8
8P3
8S1
14S
8T
Commercial
(0°C to 70°C)
800
3
AT24C08A-10PI-1.8
AT24C08AN-10SI-1.8
AT24C08A-10SI-1.8
AT24C08A-10TI-1.8
8P3
8S1
14S
8T
Industrial
(-40°C to 85°C)
Package Type
8P3
8-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
8-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
14-Lead, 0.150" Wide, Plastic Gull Wing Small Outline (SOIC)
8-Lead, 0.170” Wide, Thin Shrink Small Outline Package (TSSOP)
Options
8S1
14S
8T
Blank
-2.7
Standard Operation (4.5V to 5.5V)
Low-Voltage (2.7V to 5.5V)
-2.5
Low-Voltage (2.5V to 5.5V)
-1.8
Low-Voltage (1.8V to 5.5V)
AT24C02A/04A/08A
12
AT24C02A/04A/08A
Packaging Information
8P3, 8-Lead, 0.300" Wide,
8S1, 8-Lead, 0.150" Wide,
Plastic Dual Inline Package (PDIP)
Dimensions in Inches and (Millimeters)
JEDEC STANDARD MS-001 BA
Plastic Gull Wing Small Outline (JEDEC SOIC)
Dimensions in Inches and (Millimeters)
.020 (.508)
.013 (.330)
.400 (10.16)
.355 (9.02)
PIN
1
.244 (6.20)
.228 (5.79)
.157 (3.99)
.150 (3.81)
.280 (7.11)
.240 (6.10)
PIN 1
.037 (.940)
.027 (.690)
.050 (1.27) BSC
.300 (7.62) REF
.210 (5.33) MAX
.196 (4.98)
.189 (4.80)
.100 (2.54) BSC
SEATING
PLANE
.068 (1.73)
.053 (1.35)
.015 (.380) MIN
.150 (3.81)
.115 (2.92)
.010 (.254)
.004 (.102)
.022 (.559)
.014 (.356)
.070 (1.78)
.045 (1.14)
0
8
REF
.010 (.254)
.007 (.203)
.325 (8.26)
.300 (7.62)
0
.050 (1.27)
.016 (.406)
REF
15
.012 (.305)
.008 (.203)
.430 (10.9) MAX
14S, 14-Lead, 0.150" Wide,
Plastic Gull Wing Small Outline (SOIC)
Dimensions in Inches and (Millimeters)
8T, 8-Lead, 0.170” Wide, Plastic Thin Small Outline
Package (TSSOP)
Dimensions in Millimeters and (Inches)*
PIN 1
.020 (.508)
.013 (.330)
6.50 (.256)
6.25 (.246)
.158 (4.01)
.152 (3.86)
.244 (6.20)
.228 (5.79)
PIN 1
0.30 (.012)
0.19 (.008)
.050 (1.27) BSC
.344 (8.74)
3.10 (.122)
2.90 (.114)
1.05 (.041)
0.80 (.033)
1.20 (.047) MAX
.068 (1.73)
.053 (1.35)
.337 (8.56)
.65 (.026) BSC
0.15 (.006)
0.05 (.002)
.010 (.249)
.004 (.102)
4.5 (.177)
4.3 (.169)
0.20 (.008)
0.09 (.004)
0
8
REF
.010 (.249)
.008 (.191)
0.75 (.030)
0.45 (.018)
0
8
REF
.050 (1.27)
.016 (.406)
*Controlling dimension: millimeters
13
相关型号：
AT24C08A-10TQ-2.7
EEPROM, 1KX8, Serial, CMOS, PDSO8, 4.40 MM, LEAD FREE AND HALOGEN FREE, PLASTIC, MO-153AA, TSSOP-8
ATMEL
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