AT24CM01 [ATMEL]
I2C-Compatible (2-wire) Serial EEPROM 1-Mbit (131,072 x 8);
| 型号： | AT24CM01 |
| 厂家： | 
ATMEL |
| 描述： | I2C-Compatible (2-wire) Serial EEPROM 1-Mbit (131,072 x 8) 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 |
| 文件： | 总21页 (文件大小：885K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Atmel AT24CM01
I2C-Compatible (2-wire) Serial EEPROM
1-Mbit (131,072 x 8)
DATASHEET
Features
Low voltage and standard voltage operation available
1.7V (VCC = 1.7V to 5.5V)
2.5V (VCC = 2.5V to 5.5V)
Internally organized 131,072 x 8
2-wire serial interface
Schmitt Triggers, filtered inputs for noise suppression
Bidirectional data transfer protocol
400kHz (1.7V) and 1MHz (5V, 2.5V) compatibility
Write Protect pin for hardware data protection
256-byte Page Write mode
Partial page writes allowed
Random and Sequential Read modes
Self-timed write cycle (5ms max)
High reliability
Endurance: 1,000,000 write cycles
Data retention: 40 years
Green package options (Pb/Halide-free/RoHS Compliant)
8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, and 8-ball WLCSP
Die sale options: wafer form and tape and reel available
Description
The Atmel® AT24CM01 provides 1,048,576 bits of Serial Electrically Erasable and
Programmable Read-Only Memory (EEPROM) organized as 131,072 words of eight
bits each. The device’s cascadable feature allows up to four devices to share a
common 2-wire bus. The device is optimized for use in many industrial and commercial
applications where low power and low voltage operation are essential. The devices are
available in space-saving 8-lead JEDEC SOIC, 8-lead EIAJ SOIC, 8-lead TSSOP, and
8-ball WLCSP. In addition, the entire family is available in 1.7V (1.7V to 5.5V) and 2.5V
(2.5V to 5.5V) versions.
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
1.
Pin Configurations and Pinouts
8-lead SOIC
8-lead TSSOP
Pin Name
NC
Function
1
2
3
4
8
7
6
5
NC
V
CC
1
2
3
4
8
7
6
5
V
CC
WP
SCL
SDA
No Connect
Address Input
Address Input
Ground
NC
A
WP
1
A
A
1
A1
2
A
SCL
SDA
2
GND
A2
GND
GND
SDA
SCL
WP
Top View
Top View
Serial Data
8-ball WLCSP
Serial Clock Input
Write Protect
Power Supply
VCC
WP
NC
SDA
A2
SCL
A1
VCC
GND
Bottom View
Note:
Drawings are not to scale.
2.
Absolute Maximum Ratings*
*Notice: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent
damage to the device. This is a stress rating only
and functional operation of the device at these or
any other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Operating Temperature . . . . . . . . . . .–55C to +125C
Storage Temperature . . . . . . . . . . . .–65C to +150C
Voltage on any pin
with respect to ground . . . . . . . . . . . . . –1.0V to +7.0V
Maximum Operating Voltage. . . . . . . . . . . . . . . 6.25V
DC Output Current. . . . . . . . . . . . . . . . . . . . . . . 5.0mA
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
2
3.
Block Diagram
VCC
GND
WP
Start
Stop
Logic
SCL
SDA
Serial
Control
Logic
EN
H.V. Pump/Timing
Data Recovery
LOAD
COMP
Device
Address
Comparator
LOAD
INC
A2
A1
R/W
Data Word
Addr/counter
EEPROM
Serial MUX
Y DEC
DOUT/ACK
Logic
DIN
DOUT
4.
Pin Description
Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge
clock data out of each device.
Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open drain driven and may be
wire-ORed with any number of other open drain or open collector devices.
Device Addresses (A2 and A1): The A2 and A1 pins are device address inputs that can be hardwired or left not
connected for hardware compatibility with other Atmel AT24Cxx devices. When the A2 and A1 pins are hardwired, as
many as four 1-Mbit devices may be addressed on a single bus system (See “Device Addressing” on page 9 for more
details). If the A2 and A1 pins are left floating, the A2 and A1 pin will be internally pulled down to GND if the capacitive
coupling to the circuit board VCC plane is <3pF. If coupling is >3pF, Atmel recommends connecting the A2 and A1 pin to
GND.
Write Protect (WP): The Write Protect input, when connected to GND, allows normal write operations. When WP is
connected high to VCC, all write operations to the memory are inhibited. If the pin is left floating, the WP pin will be
internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is <3pF. If coupling is >3pF, Atmel
recommends connecting the pin to GND. Switching WP to VCC prior to a write operation creates a software write protect
function.
Table 4-1. Write Protect
Part of the Array Protected
WP Pin
Status
AT24CM01
At VCC
Full Array
At GND
Normal Read/Write Operations
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
3
5.
Memory Organization
AT24CM01, 1-Mbit Serial EEPROM: The 1-Mbit is internally organized as 512 pages of 256 bytes each. Random word
addressing requires a 17-bit data word address.
Table 5-1. Pin Capacitance(1)
Applicable over recommended operating range from TA = 25C, f = 1.0MHz, VCC = 5.5V
Symbol
CI/O
Test Condition
Max
8
Units
pF
Conditions
VI/O = 0V
VIN = 0V
Input/Output Capacitance (SDA)
Input Capacitance (A2, A1, SCL)
CIN
6
pF
Note: 1. This parameter is characterized and is not 100% tested.
Table 5-2. DC Characteristics
Applicable over recommended operating range from: TAI = –40°C to +85°C, VCC = 1.7V to 5.5V (unless otherwise noted)
Symbol
Parameter
Test Condition
Min
Typ
Max
Units
Supply Voltage,
1.7V Option
VCC1
1.7
5.5
V
Supply Voltage,
2.5V Option
VCC2
2.5
5.5
V
ICC
ICC
Supply Current
Supply Current
VCC = 5.0V
VCC = 5.0V
VCC = 1.7V
VCC = 2.5V
VCC = 3.6V
VCC = 5.5V
VIN = VCC or VSS
Read at 400kHz
2.0
3.0
1.0
2.0
3.0
6.0
3.0
mA
mA
μA
μA
μA
μA
μA
Write at 400kHz
VIN = VCC or VSS
VIN = VCC or VSS
ISB
Standby Current
ILI
Input Leakage Current
0.10
0.05
Output Leakage
Current
ILO
VOUT = VCC or VSS
3.0
μA
VIL
Input Low Level(1)
Input High Level(1)
Output Low Level
Output Low Level
–0.6
VCC x 0.3
VCC + 0.5
0.2
V
V
V
V
VIH
VCC x 0.7
VOL1
VOL2
VCC = 1.7V
VCC = 3.0V
IOL = 0.15mA
IOL = 2.1mA
0.4
Note: 1. VIL min and VIH max are reference only and are not tested.
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
4
Table 5-3. AC Characteristics
Applicable over recommended operating range from TAI = -40C to +85C, VCC = 1.7V to 5.5V (where applicable),
CL = 100pF (unless otherwise noted). Test conditions are listed in Note 2.
1.7V
2.5V, 5.0V
Symbol
fSCL
Parameter
Min
Max
Min
Max
Units
kHz
ns
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
Noise Suppression Time(1)
Clock Low to Data Out Valid
400
1000
tLOW
tHIGH
tI
1300
600
400
400
ns
100
900
50
ns
tAA
50
50
550
ns
Time the bus must be free before a new
transmission can start(1)
tBUF
1300
500
ns
tHD.STA
tSU.STA
tHD.DAT
tSU.DAT
tR
Start Hold Time
600
600
0
250
250
0
ns
Start Set-up Time
Data In Hold Time
Data In Set-up Time
Inputs Rise Time(1)
Inputs Fall Time(1)
Stop Set-up Time
Data Out Hold Time
Write Cycle Time
25°C, Page Mode, 3.3V
ns
ns
100
100
ns
300
300
300
100
ns
tF
ns
tSU.STO
tDH
600
50
250
50
ns
ns
tWR
5
5
ms
Endurance(1)
1,000,000
Write Cycles
Notes: 1. This parameter is ensured by characterization only.
2. AC measurement conditions:
RL (connects to VCC): 1.3 k (2.5V, 5V), 10 k (1.7V)
Input pulse voltages: 0.3 VCC to 0.7 VCC
Input rise and fall times: 50ns
Input and output timing reference voltages: 0.5 VCC
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
5
6.
Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may
change only during SCL low time periods (see Figure 6-4 on page 8). Data changes during SCL high periods will indicate
a Start or Stop condition as defined below.
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any other
command (see Figure 6-5 on page 8).
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the Stop
command will place the EEPROM in a standby power mode (see Figure 6-5 on page 8).
Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in eight bit words. The
EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word (see Figure 6-6 on
page 8).
Standby Mode: The AT24CM01 features a low power standby mode which is enabled:
Upon power-up
After the receipt of the stop bit and the completion of any internal operations
Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be protocol reset by
following these steps:
1. Create a start bit condition
2. Clock nine cycles
3. Create another start bit followed by stop bit condition as in Figure 6-1.
The device is ready for the next communication after above steps have been completed.
Figure 6-1. Software Reset
Dummy Clock Cycles
SCL
SDA
1
2
3
8
9
Start
Bit
Stop
Bit
Start
Bit
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
6
Figure 6-2. Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
tHIGH
tF
tR
tLOW
tLOW
SCL
tSU.STA
tHD.STA
tHD.DAT
tSU.DAT
tSU.STO
SDA IN
tAA
tDH
tBUF
SDA OUT
Figure 6-3. Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
SCL
8th Bit
ACK
SDA
WORDN
(1)
t
WR
Start
Stop
Condition
Condition
Notes: 1. The write cycle time tWR is the time from a valid Stop condition of a write sequence to the end of the internal
clear/write cycle.
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
7
Figure 6-4. Data Validity
SDA
SCL
Data Stable
Data Stable
Data
Change
Figure 6-5. Start and Stop Definition
SDA
SCL
Start
Stop
Figure 6-6. Output Acknowledge
1
8
9
SCL
Data In
Data Out
Start
Acknowledge
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
8
7.
Device Addressing
The 1-Mbit EEPROM requires an 8-bit device address word following a Start condition to enable the chip for a read or
write operation (see Figure 7-1 below). The device address word consists of a mandatory ‘1010’ sequence for the first
four most significant bits. This is common to all 2-wire EEPROM devices.
The 1-Mbit uses the two device address bits, A2 and A1, to allow up to four devices on the same bus. These A2 and A1
bits must compare to the corresponding hardwired input pins, A2 and A1. The A2 and A1 pins uses an internal proprietary
circuit that biases it to a logic low condition if the pin is allowed to float.
The seventh bit (P0) of the device address is a memory page address bit. This memory page address bit is the most
significant bit of the data word address that follows. The eighth bit of the device address is the read/write operation select
bit. A read operation is initiated if this bit is high and a write operation is initiated if this bit is low.
Upon a compare of the device address, the EEPROM will output a zero. If a valid compare is not made, the device will
return to a standby state.
Figure 7-1. Device Address
1
0
1
0
A2 A1 P0 R/W
LSB
MSB
8.
Write Operations
Byte Write: To select a data word in the 1-Mbit memory requires a 17-bit word address. The word address field consists
of the P0 bit in the device address byte, then the most significant word address followed by the least significant word
address (see Figure 8-1).
A write operation requires the P0 bit and two 8-bit data word addresses following the device address word and
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then the part is to
receive the first 8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero. The addressing
device, such as a microcontroller, then must terminate the write sequence with a Stop condition. At this time the
EEPROM enters an internally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during this write
cycle and the EEPROM will not respond until the write is complete (see Figure 8-1).
Figure 8-1. Byte Write
S
T
A
R
T
W
R
I
T
E
S
T
O
P
Device
Address
First Word
Address
Second Word
Address
Data
SDA LINE
M
S
B
P R
A
C
K
L A
S C
B K
L
A
A
C
K
0
/
S C
B K
W
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
9
Page Write: The 1-Mbit EEPROM is capable of a 256-byte Page Write.
A Page Write is initiated the same way as a Byte Write, but the microcontroller does not send a Stop condition after the
first data word is clocked in. Instead, after the EEPROM acknowledges receipt of the first data word, the microcontroller
can transmit up to 255 more data words. The EEPROM will respond with an acknowledge after each data word is
received. The microcontroller must terminate the page write sequence with a Stop condition (see Figure 8-2) and the
internally timed write cycle will begin.
The data word address lower 8 bits are internally incremented following the receipt of each data word. The higher data
word address bits are not incremented, retaining the memory page row location. When the internally generated word
address, reaches the page boundary, the following byte is placed at the beginning of the same page. If more than
256 data words are transmitted to the EEPROM, the data word address will “roll over” and previous data will be
overwritten. The address “rollover” during write is from the last byte of the current page to the first byte of the same page.
Figure 8-2. Page Write
S
T
A
R
T
W
R
I
T
E
S
T
O
P
Device
Address
First Word
Address
Second Word
Address
Data (n)
Data (n + x)
SDA LINE
M
S
B
P R
A
C
K
L A
S C
B K
L
A
A
C
K
A
C
K
0
/
S C
B K
W
Acknowledge Polling: Once the internally timed write cycle has started and the EEPROM inputs are disabled,
Acknowledge Polling can be initiated. This involves sending a Start condition followed by the device address word. The
read/write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM
respond with a zero, allowing a new read or write sequence to be initiated.
Data Security: The AT24CM01 has a hardware data protection scheme that allows the user to write protect the entire
memory when the WP pin is at VCC
.
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
10
9.
Read Operations
Read operations are initiated the same way as write operations with the exception that the read/write select bit in the
device address word is set to one. There are three read operations: Current Address Read, Random Address Read, and
Sequential Read.
Current Address Read: The internal data word address counter maintains the last address accessed during the last
read or write operation, incremented by one. This address stays valid between operations as long as the VCC to the part
is maintained. The address “rollover” during read is from the last byte of the last page, to the first byte of the first page of
the memory.
Once the device address with the read/write select bit set to one is input and acknowledged by the EEPROM, the current
address data word is serially clocked out on the SDA line. The microcontroller does not respond with a zero but does
generate a following Stop condition (see Figure 9-1).
Figure 9-1. Current Address Read
S
T
A
R
T
R
E
A
D
S
T
O
P
Device
Address
Data
SDA LINE
M
S
B
P R
A
C
K
N
O
0
/
W
A
C
K
Random Read: A Random Read requires an initial byte write sequence to load in the data word address. This is known
as a “dummy write” operation. Once the device address word and data word address are clocked in and acknowledged
by the EEPROM, the microcontroller must generate another Start condition. The microcontroller now initiates a current
address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device
address and serially clocks out the data word on the SDA line. The microcontroller does not respond with a zero but does
generate a following Stop condition (see Figure 9-2).
Figure 9-2. Random Read
S
T
A
R
T
W
R
I
T
E
S
T
A
R
T
R
E
A
D
S
T
O
P
Device
Address
First Word
Address
Second Word
Address
Device
Address
Data (n)
SDA LINE
M
S
B
P R
A
C
A
C
K
L A
S C
B K
P R A
0 / C
W K
N
O
0
/
W K
A
C
K
Dummy Write
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
11
Sequential Read: Sequential Reads are initiated by either a Current Address Read or a Random Read. After the
microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an
acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the
memory address limit is reached, the data word address will “roll over” and the sequential read will continue. The
Sequential Read operation is terminated when the microcontroller does not respond with a zero, but does generate a
following Stop condition (see Figure 9-3).
Figure 9-3. Sequential Read
S
T
A
R
T
W
R
I
Device
Address
First Word
Address
Second Word
Address
T
E
. . .
SDA LINE
M
S
B
P R A
A
C
K
L A
S C
B K
0 /
C
W K
Dummy Write
S
T
A
R
T
R
E
A
D
S
T
Device
Address
O
P
Data (n)
Data (n + 1)
Data (n + 2)
Data (n + x)
. . .
P R A
/
W
A
C
K
A
C
K
A
C
K
N
O
0
C
K
A
C
K
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
12
10. Ordering Code Detail
A T 2 4 C M 0 1 - S S H M - B
Atmel Designator
Shipping Carrier Option
B or blank = Bulk (tubes)
T = Tape and reel
Product Family
Operating Voltage
M = 1.7V to 5.5V
D = 2.5V to 5.5V
24C = Standard I2C Serial EEPROM
Device Density
M = Megabit Family
01 = 1 Megabit
Package Device Grade or
Wafer/Die Thickness
H = Green, NiPdAu lead finish
Industrial Temperature range
(-40°C to +85°C)
U = Green, matte Sn lead finish
Industrial Temperature range
(-40°C to +85°C)
11 = 11mil wafer thickness
Package Option
SS = JEDEC SOIC
S
X
U
= EIAJ SOIC
= TSSOP
= 3x5 Grid Array, WLCSP
WWU= Wafer unsawn
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
13
11. Part Markings
AT24CM01: Package Marking Information
8-lead SOIC
8-lead EIAJ
ATMLHYWW
##%
AAAAAAAA
@
ATMLHYWW
##%
AAAAAAAA
@
8-lead TSSOP
8-ball WLCSP
%U
##
YXX
ATHYWW
##% @
AAAAAAA
Note 1:
designates pin 1
Note 2: Package drawings are not to scale
Catalog Number Truncation
AT24CM01
Truncation Code ##: 2G
Date Codes
Voltages
Y = Year
WW = Work Week of Assembly
% = Minimum Voltage
M: 1.7V min
D: 2.5V min
2: 2012
3: 2013
4: 2014
5: 2015
6: 2016
7: 2017
8: 2018
9: 2019
02: Week 2
04: Week 4
...
52: Week 52
Country of Assembly
Lot Number
AAA...A = Atmel Wafer Lot Number
Grade/Lead Finish Material
@ = Country of Assembly
H: Industrial/NiPdAu
U: Industrial/Matte Tin
Atmel Truncation
AT: Atmel
ATML: Atmel
3/21/2013
REV.
TITLE
24CM01SM, AT24CM01 Package Marking Information
DRAWING NO.
Package Mark Contact:
DL-CSO-Assy_eng@atmel.com
24CM01SM
F
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
14
12. Ordering Information
Atmel Ordering Code
Lead Finish
Package
Voltage
Operation Range
AT24CM01-SSHM-B(1)
1.7V to 5.5V
AT24CM01-SSHM-T(2)
AT24CM01-SSHD-B(1)
AT24CM01-SSHD-T(2)
AT24CM01-SHM-B(1)
AT24CM01-SHM-T(2)
8S1
2.5V to 5.5V
1.7V to 5.5V
2.5V to 5.5V
1.7V to 5.5V
2.5V to 5.5V
NiPdAu
(Lead-free/Halogen-free)
8S2
AT24CM01-SHD-B(1)
AT24CM01-SHD-T(2)
AT24CM01-XHM-B(1)
AT24CM01-XHM-T(2)
AT24CM01-XHD-B(1)
AT24CM01-XHD-T(2)
Industrial Temperature
(–40C to 85C)
8X
SnAgCu
(Lead-free/Halogen-free)
AT24CM01-UUM-T
8U-6
1.7V to 5.5V
AT24CM01-WWU11M(3)
—
Wafer Sale
Notes: 1. B = Bulk delivery in tubes:
SOIC and TSSOP = 100 per tube
2. T = Tape and reel delivery:
JEDEC SOIC = 4K units per reel
EIAJ SOIC = 2K units per reel
TSSOP and WLCSP = 5K units per reel
3. For wafer sales, please contact Atmel Sales.
Package Type
8S1
8S2
8X
8-lead, 0.150” wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8-lead, 0.208” wide, Plastic Gull Wing Small Outline (EIAJ SOIC)
8-lead, 4.4mm body, Plastic Thin Shrink Small Outline (TSSOP)
8-ball, 3x5 Grid Array, Wafer Level Chip Scale (WLCSP)
8U-6
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
15
13. Packaging Information
13.1 8S1 — 8-lead JEDEC SOIC
C
1
E
E1
L
N
Ø
TOP VIEW
END VIEW
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
A
MIN
1.35
0.10
MAX
1.75
0.25
NOM
–
–
NOTE
SYMBOL
A1
A
A1
b
0.31
0.17
4.80
3.81
5.79
–
0.51
0.25
5.05
3.99
6.20
C
D
E1
E
e
–
–
D
–
–
SIDE VIEW
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA
for proper dimensions, tolerances, datums, etc.
1.27 BSC
L
0.40
0°
–
–
1.27
8°
Ø
6/22/11
DRAWING NO. REV.
8S1
TITLE
GPC
8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing
Small Outline (JEDEC SOIC)
SWB
G
Package Drawing Contact:
packagedrawings@atmel.com
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
16
13.2 8S2 — 8-lead EIAJ SOIC
C
1
E
E1
L
N
q
TOP VIEW
END VIEEWW
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
A
MIN
1.70
0.05
0.35
0.15
5.13
5.18
7.70
0.51
0°
MAX
2.16
0.25
0.48
0.35
5.35
5.40
8.26
0.85
8°
NOM
NOTE
SYMBOL
A1
A
A1
b
4
4
C
D
E1
E
D
2
L
SIDDEE VVIIEEWW
q
e
1.27 BSC
3
Notes: 1. This drawing is for general information only; refer to EIAJ Drawing EDR-7320 for additional information.
2. Mismatch of the upper and lower dies and resin burrs aren't included.
3. Determines the true geometric position.
4. Values b,C apply to plated terminal. The standard thickness of the plating layer shall measure between 0.007 to .021 mm.
4/15/08
REV.
GPC
DRAWING NO.
TITLE
8S2, 8-lead, 0.208” Body, Plastic Small
Outline Package (EIAJ)
STN
8S2
F
Package Drawing Contact:
packagedrawings@atmel.com
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
17
13.3 8X — 8-lead TSSOP
C
1
Pin 1 indicator
this corner
E1
E
L1
H
N
L
Top View
End View
A
b
A1
COMMON DIMENSIONS
(Unit of Measure = mm)
e
A2
MIN
-
MAX
1.20
0.15
1.05
3.10
NOM
NOTE
2, 5
SYMBOL
D
A
-
Side View
A1
A2
D
0.05
0.80
2.90
-
1.00
Notes: 1. This drawing is for general information only. Refer to JEDEC
Drawing MO-153, Variation AA, for proper dimensions,
tolerances, datums, etc.
3.00
2. Dimension D does not include mold Flash, protrusions or gate
burrs. Mold Flash, protrusions and gate burrs shall not exceed
0.15mm (0.006in) per side.
3. Dimension E1 does not include inter-lead Flash or protrusions.
Inter-lead Flash and protrusions shall not exceed 0.25mm
(0.010in) per side.
E
6.40 BSC
4.40
E1
b
4.30
0.19
4.50
0.30
3, 5
4
–
e
0.65 BSC
0.60
4. Dimension b does not include Dambar protrusion. Allowable
Dambar protrusion shall be 0.08mm total in excess of the b
dimension at maximum material condition. Dambar cannot be
located on the lower radius of the foot. Minimum space between
protrusion and adjacent lead is 0.07mm.
L
0.45
0.09
0.75
0.20
L1
C
1.00 REF
-
5. Dimension D and E1 to be determined at Datum Plane H.
12/8/11
TITLE
GPC
TNR
DRAWING NO.
REV.
8X, 8-lead 4.4mm Body, Plastic Thin
Shrink Small Outline Package (TSSOP)
8X
E
Package Drawing Contact:
packagedrawings@atmel.com
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
18
13.4 8U-6 — 8-ball WLCSP
—
d
0.015
A
C
4X
d
0.075 C
C
D
0.015
n0.05m C A B
j
j
Øb
n
m C
Pin 1
A1
A
B
C
D
E
E
D
C
B
A
Pin 1
1
1
2
3
2
3
E
e
A2
e2
d2
d
A
TOP VIEW
SIDE VIEW
BALL SIDE
* Dimensions are NOT to scale.
COMMON DIMENSIONS
(Unit of Measure = mm)
MIN
MAX
TYP
NOTE
SYMBOL
A
A1
A2
E
0.538
0.224
0.330
PIN ASSIGNMENT MATRIX
0.164
0.280
-
A
B
C
D
E
0.305
VCC
WP
NC
1
2
3
Contact Atmel for details
SCL
A1
e
0.866
e2
d
0.500
1.000
SDA
A2
GND
d2
D
0.500
Contact Atmel for details
b
0.239
0.269
0.299
3/15/2013
TITLE
DRAWING NO.
REV.
GPC
GHZ
8U-6, 8-ball Wafer Level Chip Scale Package
(WLCSP)
8U-6
B
Package Drawing Contact:
packagedrawings@atmel.com
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
19
14. Revision History
Doc. No.
Date
Comments
Update document status from preliminary to complete.
Correct WLCSP pinout.
8821E
03/2013
01/2013
Update footers and disclaimer page.
8812D
Correct TSSOP pin label 7 to WP.
Add WLCSP package.
Update part markings.
Update pinout diagram.
8812C
12/2012
Update part markings.
Correct Byte Write figure from second typo error to first word address.
Update Sequential Read figure.
Correct ordering code:
- AT24CM01-WWU-11, Die Sale to AT24CM01-WWU11M, Wafer Sale.
8812B
8812A
07/2012
05/2012
Update Atmel logos and disclaimer page.
Initial document release.
Atmel AT24CM01 [DATASHEET]
Atmel-8812E-SEEPROM-AT24CM01-Datasheet_032013
20
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