AT24CS16-XHM-T [ATMEL]
EEPROM, 2048X8, Serial, CMOS, PDSO8, 4.40 MM, GREEN, PLASTIC, MO-153AA, TSSOP-8;
| 型号： | AT24CS16-XHM-T |
| 厂家： | 
ATMEL |
| 描述： | EEPROM, 2048X8, Serial, CMOS, PDSO8, 4.40 MM, GREEN, PLASTIC, MO-153AA, TSSOP-8 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 时钟 光电二极管 内存集成电路 |
| 文件： | 总22页 (文件大小：861K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Atmel AT24CS16
I2C-Compatible (2-wire) Serial EEPROM with a
Unique, Factory Programmed 128-bit Serial Number
16-Kbit (2,048 x 8)
PRELIMINARY DATASHEET
Standard Features
Low-voltage operation
VCC = 1.7V to 5.5V
Internally organized as 2,048 x 8 (16Kb)
I2C-compatible (2-wire) serial interface
Schmitt Trigger, filtered inputs for noise suppression
Bidirectional data transfer protocol
400kHz (1.7V) and 1MHz (2.5V, 5.0V) compatibility
Write Protect pin for hardware data protection
16-byte Page Write mode
Partial page writes allowed
Self-timed write cycle (5ms max)
High-reliability
Endurance: 1,000,000 write cycles
Data retention: 100 years
Green package options (Pb/Halide-free/RoHS-compliant)
8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, and 5-lead SOT23
Die sale options: wafer form and tape and reel available
Enhanced Features in the CS Serial EEPROM Series
All standard features supported
128-bit unique factory-programmed serial number
Permanently locked, read-only value
Stored in a separate memory area
Guaranteed unique across entire CS Series of Serial EEPROMs
Atmel- 8859A-SEEPROM-AT24CS16-Datahseet-022013
1.
Description
The Atmel® AT24CS16 provides 16,384 bits of Serial Electrically Erasable and Programmable Read-Only Memory
(EEPROM) organized as 2,048 words of eight bits each. The device is optimized for use in many industrial and
commercial applications where low-power and low-voltage operation are essential. The AT24CS16 is available in
space-saving, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, and 5-lead SOT23 packages and is accessed via a
2-wire serial interface. Additionally, this device supports full operation from 1.7V to 5.5V.
The AT24CS16 provides the additional feature of a factory programmed, guaranteed unique 128-bit serial number, while
maintaining all of the traditional features available in the 16Kb Serial EEPROM. The time consuming step of performing
and ensuring true serialization of product on a manufacturing line can be removed from the production flow by employing
the CS Series Serial EEPROM. The 128-bit serial number is programmed and permanently locked from future writing
during the Atmel production process. Further, this 128-bit location does not consume any of the user read/write area of
the 16Kb Serial EEPROM. The uniqueness of the serial number is guaranteed across the entire CS Series of Serial
EEPROMs, regardless of the size of the memory array or the type of interface protocol. This means that as an
application's needs for memory size or interface protocol evolve in future generations, any previously deployed serial
number from any Atmel CS Series Serial EEPROM part will remain valid.
2.
Pin Descriptions and Pinout
Figure 2-1. Pin Configuration
8-lead SOIC
8-lead TSSOP
Pin Name
NC
Function
NC
NC
1
2
3
4
8
7
6
5
VCC
WP
NC
NC
1
2
3
4
8
7
6
5
VCC
WP
No Connect
Serial Data
Serial Clock Input
Write Protect
Ground
NC
SCL
SDA
NC
SCL
SDA
SDA
SCL
GND
GND
WP
8-pad UDFN
5-lead SOT23
GND
VCC
VCC
8
1 NC
WP
SCL
GND
SDA
1
2
3
5
Power Supply
WP 7
SCL 6
SDA 5
2 NC
3 NC
VCC
4
4 GND
Bottom View
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3.
Absolute Maximum Ratings*
*Notice: Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent
damage to the device. This is a stress rating only
and functional operation of the device at these or
any other conditions beyond those indicated in
the operational sections of this specification is
not implied. Exposure to absolute maximum
rating conditions for extended periods may affect
device reliability.
Operating Temperature ........................–55C to +125C
Storage Temperature ...........................–65C to +150C
Voltage on any pin
with respect to ground .............................–1.0V to +7.0V
Maximum Operating Voltage................................. 6.25V
DC Output Current................................................ 5.0mA
4.
Block Diagram
Figure 4-1. Block Diagram
VCC
GND
WP
Start
SCL
Stop
Logic
SDA
Serial
Control
Logic
High Voltage
Pump & Timing
Enable
Data Latches
Device
Load
COMP
Address
INC
Comparator
Data Word
ADDR/Counter
Read/Write
EEPROM
Array
A2
A1
128-bit
Serial
Number
A0
Read
Column
Decoder
Serial MUX
DOUT / ACK
Logic
DIN
DOUT
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5.
Pin Description
Serial Clock (SCL): The SCL input is used to positive edge clock data into each EEPROM device and negative edge
clock data out of each device.
Serial Data (SDA): The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be
wire-ORed with any number of other open-drain or open-collector devices.
Device/Page Addresses: The AT24CS16 does not utilize device address pins, which limits the number of devices on a
single bus to one.
Write Protect (WP): AT24CS16 has a Write Protect (WP) pin that provides hardware data protection. When the Write
Protect pin is connected to ground (GND), normal Read/Write operations to the full array are possible. When the Write
Protect pin is connected to VCC, all Write operations to the memory are inhibited but Read operations are still possible.
This operation is summarized in Table 5-1 below.
Table 5-1. Write Protect
Part of the Array Protected
WP Pin
Status
AT24CS16
At VCC
Full Array
At GND
Normal Read/Write Operations
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6.
Memory Organization
Atmel AT24CS16, 16K Serial EEPROM: Internally organized with 128 pages of 16 bytes each, the 16K requires an
11-bit data word address for random word addressing.
Table 6-1. Pin Capacitance(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0MHz, VCC = 5.5V
Symbol
CI/O
Test Condition
Max
8
Units
pF
Conditions
VI/O = 0V
VIN = 0V
Input/Output Capacitance (SDA)
Input Capacitance (A0, A1, A2, SCL)
CIN
6
pF
Note: 1. This parameter is characterized and is not 100% tested.
Table 6-2. DC Characteristics
Applicable over recommended operating range from: TAI = -40C to +85C, VCC = 1.7V to 5.5V (unless otherwise noted)
Symbol
VCC
ICC1
ICC2
ISB1
ISB2
ILI
Parameter
Test Condition
Min
Typ
Max
5.5
1.0
3.0
1.0
Units
V
Supply Voltage
1.7
Supply Current VCC = 5.0V
Supply Current VCC = 5.0V
Standby Current VCC = 1.7V
Standby Current VCC = 5.5V
Input Leakage Current
Output Leakage Current
Input Low Level(1)
Read at 400kHz
Write at 400kHz
VIN = VCC or VSS
VIN = VCC or VSS
VIN = VCC or VSS
VOUT = VCC or VSS
0.4
2.0
mA
mA
μA
μA
μA
μA
V
0.10
0.05
3.0
3.0
ILO
VIL
–0.6
VCC x 0.3
VCC + 0.5
0.2
VIH
Input High Level(1)
VCC x 0.7
V
VOL1
VOL2
Output Low Level VCC = 1.7V
Output Low Level VCC = 3.0V
IOL = 0.15mA
IOL = 2.1mA
V
0.4
V
Note: 1. VIL min and VIH max are reference only and are not tested.
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Table 6-3. AC Characteristics
Applicable over recommended operating range from TAI = –40C to +85C, VCC = 1.7V to 5.5V, CL = 1TTL Gate and
100pF (unless otherwise noted)
1.7V
2.5V, 5.0V
Symbol
fSCL
Parameter
Min
Max
Min
Max
Units
kHz
μs
Clock Frequency, SCL
Clock Pulse Width Low
Clock Pulse Width High
Noise Suppression Time
Clock Low to Data Out Valid
400
1000
tLOW
tHIGH
tI
1.2
0.6
0.4
0.4
μs
100
0.9
50
ns
tAA
0.1
1.3
0.05
0.5
0.55
μs
Time the bus must be free before a new
transmission can start
tBUF
μs
tHD.STA
tSU.STA
tHD.DAT
tSU.DAT
tR
Start Hold Time
0.6
0.6
0
0.25
0.25
0
μs
Start Setup Time
Data In Hold Time
Data In Setup Time
Inputs Rise Time(1)
Inputs Fall Time(1)
Stop Setup Time
Data Out Hold Time
Write Cycle Time
μs
μs
100
100
ns
0.3
0.3
μs
tF
300
100
ns
tSU.STO
tDH
0.6
50
0.25
50
μs
ns
tWR
5
5
ms
Endurance(1) 3.3V, +25C, Page Mode
1,000,000
Write Cycles
Note: 1. This parameter is ensured by characterization only.
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7.
Device Operation
Clock and Data Transitions: The SDA pin is normally pulled high with an external device. Data on the SDA pin may
change only during SCL low time periods (see Figure 7-4 on page 9). Data changes during SCL high periods will indicate
a Start or Stop condition as defined below.
Start Condition: A high-to-low transition of SDA with SCL high is a Start condition which must precede any other
command (see Figure 7-5 on page 9).
Stop Condition: A low-to-high transition of SDA with SCL high is a Stop condition. After a read sequence, the Stop
command will place the EEPROM in a standby power mode (see Figure 7-5 on page 9).
Acknowledge: All addresses and data words are serially transmitted to and from the EEPROM in 8-bit words. The
EEPROM sends a zero to acknowledge that it has received each word. This happens during the ninth clock cycle (see
Figure 7-6 on page 9).
Standby Mode: The AT24CS16 features a low-power standby mode which is enabled upon power-up as well as after
the receipt of the Stop bit and the completion of any internal operations.
2-wire Software Reset: After an interruption in protocol, power loss, or system reset, any 2-wire part can be reset by
following these steps:
1. Create a start bit condition.
2. Clock nine cycles.
3. Create another start bit followed by stop bit condition as shown in Figure 7-1.
The device is ready for next communication after above steps have been completed.
Figure 7-1. Software reset
Dummy Clock Cycles
SCL
SDA
1
2
3
8
9
Start
Bit
Stop
Bit
Start
Bit
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Figure 7-2. Bus Timing
SCL: Serial Clock, SDA: Serial Data I/O
tHIGH
tF
tR
tLOW
tLOW
SCL
tSU.STA
tHD.STA
tHD.DAT
tSU.DAT
tSU.STO
SDA IN
tAA
tDH
tBUF
SDA OUT
Figure 7-3. Write Cycle Timing
SCL: Serial Clock, SDA: Serial Data I/O
SCL
SDA
8th Bit
ACK
WORDN
(1)
t
WR
Start
Condition
Stop
Condition
Note: 1. The write cycle time tWR is the time from a valid Stop condition of a write sequence to the end of the internal
clear/write cycle.
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Figure 7-4. Data Validity
SDA
SCL
Data Stable
Data Stable
Data
Change
Figure 7-5. Start and Stop Definition
SDA
SCL
Start
Stop
Figure 7-6. Output Acknowledge
1
8
9
SCL
DATA IN
DATA OUT
Start
Acknowledge
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8.
Device Addressing
Standard EEPROM Access: The 16K EEPROM device requires an 8-bit device address word following a Start condition
to enable the chip for a read or write operation.
The device address word consists of a mandatory ‘1010’ (Ah) sequence for the first four most significant bits as shown
in Figure 10-1 on page 12. This is common to all Serial EEPROM devices.
The next three bits are used for memory page addressing and are the most significant bits of the data word address
which follows.
The eighth bit of the device address is the Read/Write operation select bit. A Read operation is initiated if this bit is high,
and a Write operation is initiated if this bit is low.
Upon a valid compare of the device address, the EEPROM will output a zero. If a compare is not successfully made, the
chip will return to a standby state.
Serial Number Access: The AT24CS16 utilizes a separate memory block containing a factory programmed 128-bit
serial number. Access to this memory location is obtained by beginning the device address word with a ‘1011’ (Bh)
sequence.
Due to the size of the serial number, the next three bits of the device address must be set to zero to gain access to the
serial number.
The eighth bit of the device address needs be set to a one to read the Serial Number. A zero in this bit position, other
than during a dummy write sequence to set the address pointer, will result in a unknown data read from the part. Writing
or altering the 128-bit serial number is not possible.
Further specific protocol is needed to read the serial number from of the device. See Read Operations on page 11 for
more details on accessing the special feature.
9.
Write Operations
Byte Write: A Byte Write operation requires an 8-bit data word address following the device address word and
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first
8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the addressing device, such
as a microcontroller, must terminate the Write sequence with a Stop condition. At this time the EEPROM enters an
internally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during this write cycle and the
EEPROM will not respond until the Write is complete (see Figure 10-2 on page 12).
Page Write: The 16K EEPROM are capable of an 16-byte Page Write. A Page Write is initiated in the same way as a
Byte Write, but the microcontroller does not send a Stop condition after the first data word is clocked in. Instead, after the
EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to 15 data words. The
EEPROM will respond with a zero after each data word received. The microcontroller must terminate the Page Write
sequence with a Stop condition (see Figure 10-3 on page 12).
The data word address lower four bits are internally incremented following the receipt of each data word. The higher data
word address bits are not incremented, retaining the memory page row location. When the internally generated word
address reaches the page boundary, the subsequent byte loaded will be placed at the beginning of the same page. If
more than 16 data words are transmitted to the EEPROM, the data word address will roll-over and previously loaded
data will be overwritten.
Acknowledge Polling: Once the internally timed write cycle has started and the EEPROM inputs are disabled,
acknowledge polling can be initiated. This involves sending a Start condition followed by the device address word. The
Read/Write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM
respond with a zero allowing the next Read or Write sequence to begin.
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10. Read Operations
Read operations are initiated in the same way as Write operations with the exception that the Read/Write select bit in the
device address word is set to one. There are four read operations:
Current Address Read
Random Address Read
Sequential Read
Serial Number Read
Current Address Read: The internal data word address counter maintains the last address accessed during the last
Read or Write operation, incremented by one. This address stays valid between operations as long as the chip power is
maintained. The address roll-over during read is from the last byte of the last memory page to the first byte of the first
page. The address roll-over during write is from the last byte of the current page to the first byte of the same page.
Once the device address with the Read/Write select bit set to one is clocked in and acknowledged by the EEPROM, the
current address data word is serially clocked out. The microcontroller does not respond with an zero but does generate a
following Stop condition (see Figure 10-4 on page 12).
Random Read: A Random Read requires a dummy byte write sequence to load in the data word address. Once the
device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must
generate another Start condition. The microcontroller now initiates a Current Address Read by sending a device address
with the Read/Write select bit high. The EEPROM acknowledges the device address and serially clocks out the data
word. The microcontroller does not respond with a zero but does generate a following Stop condition (see Figure 10-5 on
page 13).
Sequential Read: Sequential Reads are initiated by either a Current Address Read or a Random Address Read. After
the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an
acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the
memory address limit is reached, the data word address will roll-over and the Sequential Read will continue. The
Sequential Read operation is terminated when the microcontroller does not respond with a zero but does generate a
following Stop condition (see Figure 10-6 on page 13).
Serial Number Read: Reading the serial number is similar to the sequential read sequence but requires use of the
device address seen in Figure 10-1 on page 12, a dummy write, and the use of specific word address.
Note:
The entire 128-bit value must be read from the starting address of the serial number block to guarantee a
unique number.
Since the address pointer of the device is shared between the regular EEPROM array and the serial number block, a
dummy write sequence, as part of a Random Read or Sequential Read protocol, should be performed to ensure the
address pointer is set to zero. A Current Address Read of the serial number block is supported but if the previous
operation was to the EEPROM array, the address pointer will retain the last location accessed, incremented by one.
Reading the serial number from a location other than the first address of the block will not result in a unique serial
number.
Additionally, the word address must begin with a ‘10’ sequence regardless of the intended address. If a word address
other than ‘10’ is used, then the device will output undefined data.
Example: If the application desires to read the first byte of the serial number, the word address input would need to be
80h.
When the end of the 128-bit serial number is reached (16 bytes of data), the data word address will roll-over back to the
beginning of the 128-bit serial number. The Serial Number Read operation is terminated when the microcontroller does
not respond with an zero (ACK) and instead issues a Stop condition (see Figure 10-7 on page 13).
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Figure 10-1. Device Address
Density
Access Area
EEPROM
Bit 7
1
Bit 6
Bit 5
Bit 4
Bit 3
P2
0
Bit 2
P1
0
Bit 1
P0
0
Bit 0
R/W
1
16K
0
0
1
1
0
1
Serial Number
1
MSB
LSB
Figure 10-2. Byte Write
S
T
W
R
I
T
E
S
T
O
P
A
R
T
Device Address
Word Address
Data
SDA LINE
A
C
K
A
C
K
A
C
K
M
S
B
R
/
W
Figure 10-3. Page Write
S
T
W
R
I
T
E
S
T
O
P
A
R
Device Address
Word Address (n)
Data (n)
Data (n + 1)
Data (n + x)
T
SDA LINE
A
C
K
A
C
K
A
C
K
A
C
K
M
S
B
R
/
W
A
C
K
Figure 10-4. Current Address Read
S
T
A
R
T
R
E
A
D
S
T
O
P
Device Address
Data
SDA LINE
A
C
K
N
O
M
S
B
R
/
W
A
C
K
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Figure 10-5. Random Read
S
T
W
R
I
T
E
S
T
A
R
T
R
E
A
D
S
T
O
P
A
R
T
Device Address
Word Address (n)
Device Address
Data (n)
SDA LINE
M
S
B
R A
A
C
K
A
C
K
N
O
/
C
W K
A
C
K
Dummy Write
Figure 10-6. Sequential Read
R
E
S
T
Device
Address
A
D
O
P
Data (n)
Data (n + 1)
Data (n + 2)
Data (n + x)
SDA LINE
R A
/ C
W K
A
C
K
A
C
K
A
C
K
N
O
A
C
K
Figure 10-7. Serial Number Read
S
T
A
R
T
W
S
T
A
R
T
R
I
R
E
A
D
T
E
Device
Word
Address n
Device
Address
Address
SDA LINE
1
0
1
1
0
0
0
1
0
0
0
0
0
0
0
1 0 1 1 0 0 0
Serial Number
Data Byte 0x0
M
S
B
R A
A
C
K
A
C
K
A
C
K
/
C
W K
Dummy Write
S
T
O
P
Serial Number
Data Byte 0x1
Serial Number
Data Byte 0x2
Serial Number
Data Byte 0x3
Serial Number
Data Byte 0xF
N
O
A
C
K
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11. Part Markings
AT24CS16: Package Marking Information
8-lead SOIC
8-lead TSSOP
ATHYWW
AAAAAAA
ATMLHYWW
NA M
AAAAAAAA
NA M @
@
8-lead UDFN
2.0 x 3.0 mm Body
5-lead SOT-23
Top Mark
NA MU
YMXX
NA
YXX
HM@
Bottom Mark
Note 1:
designates pin 1
Note 2: Package drawings are not to scale
Catalog Number Truncation
AT24CS16
Truncation Code ###: NA
Date Codes
Voltages
Y = Year
3: 2013
4: 2014
5: 2015
6: 2016
M = Month
A: January
B: February
...
WW = Work Week of Assembly
M: 1.7V min
7: 2017
8: 2018
9: 2019
0: 2020
02: Week 2
04: Week 4
...
L: December
52: Week 52
Country of Assembly
Lot Number
AAA...A = Atmel Wafer Lot Number
Grade/Lead Finish Material
@ = Country of Assembly
U: Industrial/Matte Tin
H: Industrial/NiPdAu
Trace Code
Atmel Truncation
XX = Trace Code (Atmel Lot Numbers Correspond to Code)
Example: AA, AB.... YZ, ZZ
AT: Atmel
ATM: Atmel
ATML: Atmel
1/22/13
REV.
TITLE
DRAWING NO.
24CS16SM
Package Mark Contact:
DL-CSO-Assy_eng@atmel.com
24CS16SM, AT24CS16 Package Marking Information
A
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12. Ordering Code Detail
A T 2 4 C S 1 6 - S S H M - T
Atmel Designator
Product Family
24CS = Serial EEPROM, with
128-bit Serial Number Feature
Shipping Carrier Option
T
= Tape and Reel
Operating Voltage
M
= 1.7V to 5.5V
Package Device Grade or
Wafer/Die Thickness
Device Density
H
=
Green, NiPdAu Lead Finish,
Industrial Temperature Range
(-40˚C to +85˚C)
16 = 16K
U
=
Green, Matte Sn Lead Finish,
Industrial Temperature Range
(-40˚C to +85˚C)
11 = 11mil Wafer Thickness
Package Option
SS = JEDEC SOIC
X
= TSSOP
MA = UDFN
ST = SOT23
WWU = Wafer Unsawn
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13. Ordering Information
13.1 Atmel AT24CS16 Ordering Information
Additional package types that are not listed may be available. Please contact Atmel for more details.
Atmel Ordering Code(1)
Package
Lead Finish
Voltage
Operation Range
AT24CS16-SSHM-T(2)
8S1
NiPdAu
(Lead-free/Halogen-free)
AT24CS16-XHM-T(2)
AT24CS16-MAHM-T(2)
AT24CS16-STUM-T(2)
AT24CS16-WWU11M(3)
8X
8MA2
Industrial Temperature
1.7V to 5.5V
(–40C to 85C)
Matte Tin
(Lead-free/Halogen-free)
5TS1
Wafer Sale
Notes: 1. Consistent with the general semiconductor market trend, Atmel will supply devices with either gold or
copper bond wires to increase manufacturing flexibility and to ensure a long-term continuity of supply. There
is no difference in product quality, reliability, or performance between the two variations.
2. T = Tape and reel
SOIC = 4K units per reel
TSSOP, UDFN, and SOT23 = 5K units per reel
3. For Wafer sales, please contact Atmel Sales.
Package Type
8S1
8-lead, 0.150" wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8-lead, 4.4mm body, Plastic Thin Shrink Small Outline (TSSOP)
8-pad, 2.00mm x 3.00mm body, 0.50mm pitch, Dual No Lead (UDFN)
5-lead, 2.90mm x 1.60mm body, Plastic Thin Shrink Small Outline (SOT23)
8X
8MA2
5TS1
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14. Packaging Information
14.1 8S1 — 8-lead JEDEC SOIC
C
1
E
E1
L
N
Ø
TOP VIEW
END VIEW
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
A
MIN
1.35
0.10
MAX
1.75
0.25
NOM
–
–
NOTE
SYMBOL
A1
A
A1
b
0.31
0.17
4.80
3.81
5.79
–
0.51
0.25
5.05
3.99
6.20
C
D
E1
E
e
–
–
D
–
–
SIDE VIEW
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA
for proper dimensions, tolerances, datums, etc.
1.27 BSC
L
0.40
0°
–
–
1.27
8°
Ø
6/22/11
DRAWING NO. REV.
8S1
TITLE
GPC
8S1, 8-lead (0.150” Wide Body), Plastic Gull
Wing Small Outline (JEDEC SOIC)
SWB
G
Package Drawing Contact:
packagedrawings@atmel.com
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14.2 8X — 8-lead TSSOP
C
1
Pin 1 indicator
this corner
E1
E
L1
H
N
L
Top View
End View
A
b
A1
COMMON DIMENSIONS
(Unit of Measure = mm)
e
A2
MIN
-
MAX
1.20
0.15
1.05
3.10
NOM
NOTE
2, 5
SYMBOL
D
A
-
Side View
A1
A2
D
0.05
0.80
2.90
-
1.00
Notes: 1. This drawing is for general information only. Refer to JEDEC
Drawing MO-153, Variation AA, for proper dimensions,
tolerances, datums, etc.
3.00
2. Dimension D does not include mold Flash, protrusions or gate
burrs. Mold Flash, protrusions and gate burrs shall not exceed
0.15 mm (0.006 in) per side.
3. Dimension E1 does not include inter-lead Flash or protrusions.
Inter-lead Flash and protrusions shall not exceed 0.25 mm
(0.010 in) per side.
E
6.40 BSC
4.40
E1
b
4.30
0.19
4.50
0.30
3, 5
4
–
e
0.65 BSC
0.60
4. Dimension b does not include Dambar protrusion. Allowable
Dambar protrusion shall be 0.08 mm total in excess of the b
dimension at maximum material condition. Dambar cannot be
located on the lower radius of the foot. Minimum space between
protrusion and adjacent lead is 0.07 mm.
L
0.45
0.09
0.75
0.20
L1
C
1.00 REF
-
5. Dimension D and E1 to be determined at Datum Plane H.
12/8/11
REV.
TITLE
GPC
TNR
DRAWING NO.
8X
8X, 8-lead 4.4mm Body, Plastic Thin
Shrink Small Outline Package (TSSOP)
E
Package Drawing Contact:
packagedrawings@atmel.com
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14.3 8MA2 — 8-pad UDFN
E
1
2
3
4
8
7
6
5
Pin 1 ID
D
C
A2
A1
A
E2
COMMON DIMENSIONS
(Unit of Measure = mm)
b (8x)
MIN
1.90
2.90
1.40
1.20
0.50
0.0
MAX
2.10
3.10
1.60
1.40
0.60
0.05
0.55
NOM
2.00
NOTE
SYMBOL
8
7
6
1
2
3
4
D
E
3.00
D2
E2
A
1.50
Pin#1 ID
D2
1.30
0.55
A1
A2
C
0.02
5
–
–
e (6x)
0.152 REF
0.35
L (8x)
K
L
0.30
0.40
e
0.50 BSC
0.25
b
0.18
0.20
0.30
–
3
K
–
9/6/12
DRAWING NO.
TITLE
GPC
REV.
8MA2, 8-pad, 2 x 3 x 0.6 mm Body, Thermally
Enhanced Plastic Ultra Thin Dual Flat No
Lead Package (UDFN)
YNZ
8MA2
C
Package Drawing Contact:
packagedrawings@atmel.com
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14.4 5TS1 — 5-lead SOT23
e1
C
4
5
E1
C
L
E
L1
3
1
2
TOP VIEW
END VIEW
b
A2
A
SEATING
PLANE
A1
e
D
SIDE VIEW
COMMON DIMENSIONS
(Unit of Measure = mm)
1. Dimension D does not include mold flash, protrusions or gate burrs. Mold flash,
MIN
MAX
NOM
NOTE
protrusions or gate burrs shall not exceed 0.15 mm per end. Dimension E1 does
not include interlead flash or protrusion. Interlead flash or protrusion shall not
exceed 0.15 mm per side.
SYMBOL
A
A1
A2
c
D
E
E1
L1
e
e1
b
-
-
-
1.00
0.10
2. The package top may be smaller than the package bottom. Dimensions D and E1
are determined at the outermost extremes of the plastic body exclusive of mold
flash, tie bar burrs, gate burrs and interlead flash, but including any mismatch
between the top and bottom of the plastic body.
3. These dimensions apply to the flat section of the lead between 0.08 mm and 0.15
mm from the lead tip.
4. Dimension "b" does not include dambar protrusion. Allowable dambar protrusion
shall be 0.08 mm total in excess of the "b" dimension at maximum material
condition. The dambar cannot be located on the lower radius of the foot. Minimum
space between protrusion and an adjacent lead shall not be less than 0.07 mm.
0.00
0.70 0.90 1.00
0.08
-
0.20
3
2.90 BSC
2.80 BSC
1.60 BSC
0.60 REF
0.95 BSC
1.90 BSC
-
1,2
1,2
1,2
This drawing is for general information only. Refer to JEDEC
Drawing MO-193, Variation AB for additional information.
0.30
0.50
3,4
5/31/12
REV.
TITLE
GPC
TSZ
DRAWING NO.
5TS1
5TS1, 5-lead 1.60mm Body, Plastic Thin
Shrink Small Outline Package (Shrink SOT)
D
Package Drawing Contact:
packagedrawings@atmel.com
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15. Revision History
Doc. Rev.
Date
Comments
8859A
02/2013
Initial document release.
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© 2013 Atmel Corporation. All rights reserved. / Rev.: Atmel-8859A-SEEPROM-AT24CS16-Datasheet-022013
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