AT27C256R-55RIT/R [ATMEL]

OTP ROM, 32KX8, 55ns, CMOS, PDSO28, 0.330 INCH, PLASTIC, SOIC-28;
AT27C256R-55RIT/R
型号: AT27C256R-55RIT/R
厂家: ATMEL    ATMEL
描述:

OTP ROM, 32KX8, 55ns, CMOS, PDSO28, 0.330 INCH, PLASTIC, SOIC-28

可编程只读存储器 电动程控只读存储器
文件: 总9页 (文件大小:254K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
AT27C256R  
Features  
Fast Read Access Time - 45 ns  
Low Power CMOS Operation  
100 µA max. Standby  
20 mA max. Active at 5 MHz  
JEDEC Standard Packages  
28-Lead 600-mil PDIP  
32-Lead PLCC  
28-Lead TSOP and SOIC  
5V ± 10% Supply  
High Reliability CMOS Technology  
2,000V ESD Protection  
200 mA Latchup Immunity  
Rapid Programming Algorithm - 100 µs/byte (typical)  
CMOS and TTL Compatible Inputs and Outputs  
256K (32K x 8)  
OTP  
CMOS  
Integrated Product Identification Code  
Commercial and Industrial Temperature Ranges  
EPROM  
Description  
The AT27C256R is a low-power, high performance 262,144 bit one-time programma-  
ble read only memory (OTP EPROM) organized 32K by 8 bits. It requires only one  
5V power supply in normal read mode operation. Any byte can be accessed in less  
than 45 ns, eliminating the need for speed reducing WAIT states on high performance  
microprocessor systems.  
Atmel’s scaled CMOS technology provides low active power consumption, and fast  
programming. Power consumption is typically only 8 mA in Active Mode and less  
than 10 µA in Standby.  
(continued)  
Pin Configurations  
PDIP, SOIC Top View  
Pin Name Function  
AT27C256R  
A0 - A14  
O0 - O7  
CE  
Addresses  
Outputs  
Chip Enable  
Output Enable  
No Connect  
OE  
NC  
PLCC Top View  
TSOP Top View  
Type 1  
Note: PLCC Package Pins 1 and  
17 are DON’T CONNECT.  
0014G  
3-125  
System Considerations  
Description (Continued)  
The AT27C256R is available in a choice of industry stand-  
ard JEDEC-approved one time programmable (OTP)  
plastic DIP, PLCC, SOIC, and TSOP packages. All de-  
vices feature two-line control (CE, OE) to give designers  
the flexibility to prevent bus contention.  
Switching between active and standby conditions via the  
Chip Enable pin may produce transient voltage excur-  
sions. Unless accommodated by the system design, these  
transients may exceed data sheet limits, resulting in de-  
vice non-conformance. At a minimum, a 0.1 µF high fre-  
quency, low inherent inductance, ceramic capacitor  
should be utilized for each device. This capacitor should  
With 32K byte storage capability, the AT27C256R allows  
firmware to be stored reliably and to be accessed by the  
system without the delays of mass storage media.  
be connected between the V and Ground terminals of  
CC  
the device, as close to the device as possible. Additionally,  
to stabilize the supply voltage level on printed circuit  
boards with large EPROM arrays, a 4.7 µF bulk electrolytic  
capacitor should be utilized, again connected between the  
Atmel’s 27C256R has additional features to ensure high  
quality and efficient production use. The Rapid Program-  
ming Algorithm reduces the time required to program the  
part and guarantees reliable programming. Programming  
time is typically only 100 µs/byte. The Integrated Product  
Identification Code electronically identifies the device and  
manufacturer. This feature is used by industry standard  
programming equipment to select the proper program-  
ming algorithms and voltages.  
V
and Ground terminals. This capacitor should be posi-  
CC  
tioned as close as possible to the point where the power  
supply is connected to the array.  
3-126  
AT27C256R  
AT27C256R  
Absolute Maximum Ratings*  
Block Diagram  
Temperature Under Bias ................ -55°C to +125°C  
Storage Temperature...................... -65°C to +150°C  
Voltage on Any Pin with  
(1)  
Respect to Ground.........................-2.0V to +7.0V  
Voltage on A9 with  
Respect to Ground ...................... -2.0V to +14.0V  
(1)  
V
Supply Voltage with  
PP  
(1)  
Respect to Ground.......................-2.0V to +14.0V  
*NOTICE: Stresses beyond those listed under “Absolute Maxi-  
mum Ratings” may cause permanent damage to the device.  
This is a stress rating only and functional operation of the  
device at these or any other conditions beyond those indi-  
cated in the operational sections of this specification is not  
implied. Exposure to absolute maximum rating conditions  
for extended periods may affect device reliability.  
Note: 1. Minimum voltage is -0.6V dc which may undershoot  
to -2.0V for pulses of less than 20 ns. Maximum out-  
put pin voltage is VCC + 0.75V dc which may over-  
shoot to +7.0V for pulses of less than 20 ns.  
Operating Modes  
CE  
OE  
Ai  
Ai  
X
V
Mode \ Pin  
Read  
Outputs  
PP  
CC  
CC  
CC  
V
V
V
IL  
V
V
V
D
OUT  
IL  
(1)  
(1)  
Output Disable  
Standby  
V
High Z  
High Z  
IL  
IH  
(1)  
V
IH  
X
X
(2)  
Rapid Program  
V
V
Ai  
Ai  
Ai  
V
V
D
D
D
IL  
(1)  
IH  
PP  
PP  
CC  
IN  
(2)  
PGM Verify  
X
V
V
IL  
IL  
IH  
OUT  
OUT  
(2)  
Optional PGM Verify  
V
V
IL  
(1)  
(2)  
PGM Inhibit  
V
IH  
V
X
V
High Z  
PP  
(3)  
A9 = V  
H
Identification  
Code  
(4)  
Product Identification  
V
V
IL  
A0 = V or V  
A1 - A14 = V  
V
IL  
IH  
IL  
IL  
CC  
Notes: 1. X can be VIL or VIH.  
4. Two identifier bytes may be selected. All Ai inputs  
are held low (VIL), except A9 which is set to VH and A0  
which is toggled low (VIL) to select the Manufacturer’s Identi-  
fication byte and high (VIH) to select the Device Code byte.  
2. Refer to Programming characteristics.  
3. VH = 12.0 ± 0.5V.  
3-127  
DC and AC Operating Conditions for Read Operation  
AT27C256R  
-45  
-55  
-70  
-90  
-12  
-15  
Com. 0°C - 70°C  
0°C - 70°C  
0°C - 70°C  
0°C - 70°C  
0°C - 70°C  
0°C - 70°C  
Operating  
Temp. (Case)  
Ind. -40°C - 85°C -40°C - 85°C -40°C - 85°C -40°C - 85°C  
5V ± 10% 5V ± 10% 5V ± 10% 5V ± 10%  
-40°C - 85°C -40°C - 85°C  
V
Supply  
5V ± 10%  
5V ± 10%  
CC  
DC and Operating Characteristics for Read Operation  
Symbol Parameter  
Condition  
Min  
Max  
Units  
I
I
I
Input Load Current  
V
= 0V to V  
CC  
±1  
±5  
10  
100  
1
µA  
µA  
µA  
µA  
mA  
LI  
IN  
Output Leakage Current  
V
OUT  
= 0V to V  
CC  
LO  
PP1  
(2)  
(1)  
V
Read/Standby Current V = V  
PP CC  
PP  
I
I
(CMOS), CE = V ± 0.3V  
CC  
SB1  
SB2  
(1)  
I
V
Standby Current  
SB  
CC  
CC  
(TTL), CE = 2.0 to V + 0.5V  
CC  
f = 5 MHz, I  
CE = V  
= 0 mA,  
OUT  
I
V
Active Current  
20  
mA  
CC  
IL  
V
V
V
V
Input Low Voltage  
Input High Voltage  
Output Low Voltage  
Output High Voltage  
-0.6  
2.0  
0.8  
V
V
V
V
IL  
V
+ 0.5  
IH  
CC  
I
= 2.1 mA  
0.4  
OL  
OH  
OL  
I
= -400 µA  
2.4  
OH  
Notes: 1. VCC must be applied simultaneously or before VPP  
,
2. VPP may be connected directly to VCC, except during program-  
and removed simultaneously or after VPP  
.
ming. The supply current would then be the sum of ICC and IPP.  
AC Characteristics for Read Operation  
AT27C256R  
-45  
-55  
-70  
-90  
-12  
-15  
Min Max Min Max Min Max Min Max Min Max Min Max  
Symbol  
Parameter  
Condition  
Units  
150 ns  
150 ns  
Address to  
Output Delay  
CE = OE  
= VIL  
(3)  
t
45  
55  
70  
90  
120  
ACC  
(2)  
CE to Output Delay OE = VIL  
OE to Output Delay CE = VIL  
t
t
45  
20  
55  
25  
70  
30  
90  
30  
120  
35  
CE  
(2, 3)  
(4, 5)  
40  
35  
ns  
ns  
OE  
OE or CE High to  
Output Float, whichever occurred first  
t
t
20  
20  
25  
25  
30  
DF  
Output Hold from  
Address, CE or OE,  
whichever occurred first  
7
7
7
0
0
0
ns  
OH  
Notes:  
2, 3, 4, 5. - see AC Waveforms for Read Operation.  
3-128  
AT27C256R  
AT27C256R  
AC Waveforms for Read Operation (1)  
Notes: 1. Timing measurement reference level is 1.5V for -45  
and -55 devices. Input AC drive levels are VIL =  
3. OE may be delayed up to tACC - tOE after the address is valid  
without impact on tACC  
.
0.0V and VIH = 3.0V. Timing measurement refer-  
4. This parameter is only sampled and is not 100% tested.  
5. Output float is defined as the point when data is no longer  
driven.  
ence levels for all other speed grades are VOL  
=
0.8V and VOH = 2.0V. Input AC drive levels are VIL  
= 0.45V and VIH = 2.4V.  
2. OE may be delayed up to tCE - tOE after the falling  
edge of CE without impact on tCE  
.
Input Test Waveforms and Measurement Levels  
Output Test Load  
For -45 and -55 devices only:  
tR, tF < 5 ns (10% to 90%)  
For -70, -90, -12, and -15 devices:  
Note:  
CL= 100 pF including jig  
capacitance, except for  
the -45 and -55 devices,  
where CL= 30 pF.  
tR, tF < 20 ns (10% to 90%)  
Pin Capacitance (f = 1MHz, T = 25°C) (1)  
Typ  
4
Max  
6
Units  
pF  
Conditions  
C
C
V
V
= 0V  
IN  
IN  
8
12  
pF  
= 0V  
OUT  
OUT  
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.  
3-129  
Programming Waveforms (1)  
Notes: 1. The Input Timing Reference is 0.8V for VIL and  
2.0V for VIH.  
3. When programming the AT27C256R a 0.1 µF capacitor is  
required across VPP and ground to suppress spurious voltage  
transients.  
2. tOE and tDFP are characteristics of the device but  
must be accommodated by the programmer.  
DC Programming Characteristics  
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V  
Test  
Limits  
Symbol  
Parameter  
Conditions  
Min  
Units  
µA  
V
Max  
Input Load Current  
Input Low Level  
Input High Level  
Output Low Volt.  
Output High Volt.  
VIN = VIL,VIH  
±10  
I
LI  
-0.6  
2.0  
0.8  
V
V
V
V
IL  
VCC + 1  
0.4  
V
IH  
IOL = 2.1 mA  
V
OL  
OH  
IOH = -400 µA  
2.4  
V
VCC Supply Current  
(Program and Verify)  
25  
mA  
I
CC2  
PP2  
VPP Current  
CE = VIL  
25  
mA  
V
I
A9 Product Identification Voltage  
11.5  
12.5  
V
ID  
3-130  
AT27C256R  
AT27C256R  
AC Programming Characteristics  
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V  
Rapid Programming Algorithm  
A 100 µs CE pulse width is used to program. The address  
is set to the first location. V is raised to 6.5V and V is  
CC  
PP  
raised to 13.0V. Each address is first programmed with  
one 100 µs CE pulse without verification. Then a verifica-  
tion/reprogramming loop is executed for each address. In  
the event a byte fails to pass verification, up to 10 succes-  
sive 100 µs pulses are applied with a verification after  
each pulse. If the byte fails to verify after 10 pulses have  
been applied, the part is considered failed. After the byte  
verifies properly, the next address is selected until all have  
Sym-  
bol  
Test  
Conditions*  
Limits  
Min Max  
(1)  
Parameter  
Units  
µs  
Address Setup Time  
OE Setup Time  
2
2
t
t
AS  
µs  
OES  
Data Setup  
Time  
2
µs  
t
DS  
Address Hold Time  
Data Hold Time  
0
2
µs  
µs  
t
t
AH  
been checked. V is then lowered to 5.0V and V  
to  
PP  
CC  
DH  
5.0V. All bytes are read again and compared with the origi-  
nal data to determine if the device passes or fails.  
OE High to Out-  
0
2
130  
ns  
µs  
µs  
µs  
ns  
ns  
put Float Delay (2)  
t
t
t
t
t
t
DFP  
VPS  
VCS  
PW  
VPP Setup  
Time  
VCC Setup  
Time  
2
CE Program  
95  
105  
150  
Pulse Width (3)  
Data  
Valid from OE (2)  
OE  
VPP Pulse Rise Time During  
Programming  
50  
PRT  
*AC Conditions of Test:  
Input Rise and Fall Times (10% to 90%)..............20 ns  
Input Pulse Levels...................................0.45V to 2.4V  
Input Timing Reference Level...................0.8V to 2.0V  
Output Timing Reference Level................0.8V to 2.0V  
Notes: 1. VCC must be applied simultaneously or before VPP  
and removed simultaneously or after VPP  
.
2. This parameter is only sampled and is not 100%  
tested. Output Float is defined as the point where  
data is no longer driven — see timing diagram.  
3. Program Pulse width tolerance is 100 µsec ± 5%.  
Atmel’s 27C256R Integrated  
Product Identification Code  
Pins  
Hex  
Codes  
Data  
A0 O7 O6 O5 O4 O3 O2 O1 O0  
Manufacturer  
Device Type  
0
1
0
1
0
0
0
0
1
0
1
1
1
1
1
0
0
0
1E  
8C  
3-131  
Ordering Information  
t
I
(mA)  
ACC  
CC  
Ordering Code  
Package  
Operation Range  
(ns)  
Active  
Standby  
45  
20  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
AT27C256R-45JC  
AT27C256R-45PC  
AT27C256R-45RC  
AT27C256R-45TC  
32J  
Commercial  
(0°C to 70°C)  
28P6  
28R  
28T  
20  
20  
20  
20  
20  
20  
20  
20  
20  
AT27C256R-45JI  
AT27C256R-45PI  
AT27C256R-45RI  
AT27C256R-45TI  
32J  
Industrial  
(-40°C to 85°C)  
28P6  
28R  
28T  
55  
AT27C256R-55JC  
AT27C256R-55PC  
AT27C256R-55RC  
AT27C256R-55TC  
32J  
Commercial  
(0°C to 70°C)  
28P6  
28R  
28T  
AT27C256R-55JI  
AT27C256R-55PI  
AT27C256R-55RI  
AT27C256R-55TI  
32J  
Industrial  
(-40°C to 85°C)  
28P6  
28R  
28T  
70  
AT27C256R-70JC  
AT27C256R-70PC  
AT27C256R-70RC  
AT27C256R-70TC  
32J  
Commercial  
(0°C to 70°C)  
28P6  
28R  
28T  
AT27C256R-70JI  
AT27C256R-70PI  
AT27C256R-70RI  
AT27C256R-70TI  
32J  
Industrial  
(-40°C to 85°C)  
28P6  
28R  
28T  
90  
AT27C256R-90JC  
AT27C256R-90PC  
AT27C256R-90RC  
AT27C256R-90TC  
32J  
Commercial  
(0°C to 70°C)  
28P6  
28R  
28T  
AT27C256R-90JI  
AT27C256R-90PI  
AT27C256R-90RI  
AT27C256R-90TI  
32J  
Industrial  
(-40°C to 85°C)  
28P6  
28R  
28T  
120  
AT27C256R-12JC  
AT27C256R-12PC  
AT27C256R-12RC  
AT27C256R-12TC  
32J  
Commercial  
(0°C to 70°C)  
28P6  
28R  
28T  
AT27C256R-12JI  
AT27C256R-12PI  
AT27C256R-12RI  
AT27C256R-12TI  
32J  
Industrial  
(-40°C to 85°C)  
28P6  
28R  
28T  
(continued)  
3-132  
AT27C256R  
AT27C256R  
Ordering Information (Continued)  
t
I
(mA)  
ACC  
CC  
Ordering Code  
Package  
Operation Range  
(ns)  
Active  
Standby  
150  
20  
0.1  
AT27C256R-15JC  
AT27C256R-15PC  
AT27C256R-15RC  
AT27C256R-15TC  
32J  
Commercial  
(0°C to 70°C)  
28P6  
28R  
28T  
20  
0.1  
AT27C256R-15JI  
AT27C256R-15PI  
AT27C256R-15RI  
AT27C256R-15TI  
32J  
Industrial  
(-40°C to 85°C)  
28P6  
28R  
28T  
Package Type  
32J  
32 Lead, Plastic J-Leaded Chip Carrier (PLCC)  
28P6  
28R  
28T  
28 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)  
28 Lead, 0.330" Wide, Plastic Gull Wing Small Outline (SOIC)  
28 Lead, Plastic Thin Small Outline Package (TSOP)  
3-133  

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