AT27C4096-55JC [ATMEL]
4-Megabit 256K x 16 OTP EPROM; 4兆位256K ×16 OTP EPROM型号: | AT27C4096-55JC |
厂家: | ATMEL |
描述: | 4-Megabit 256K x 16 OTP EPROM |
文件: | 总9页 (文件大小:257K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Features
• Fast Read Access Time - 55 ns
• Low Power CMOS Operation
– 100 µA Maximum Standby
– 40 mA Maximum Active at 5 MHz
• JEDEC Standard Packages
– 40-Lead 600 mil PDIP
– 44-Lead PLCC
– 40-Lead TSOP (10 mm x 14 mm)
• Direct Upgrade from 512K bit, 1M bit, and 2M bit
(AT27C516, AT27C1024, and AT27C2048) EPROMs
• 5V ± 10% Power Supply
• High Reliability CMOS Technology
– 2,000V ESD Protection
4-Megabit
(256K x 16)
OTP EPROM
– 200 mA Latchup Immunity
• Rapid™ Programming Algorithm - 50 µs/word (typical)
• CMOS and TTL Compatible Inputs and Outputs
• Integrated Product Identification Code
• Commercial and Industrial Temperature Ranges
AT27C4096
Description
The AT27C4096 is a low-power, high-performance 4,194,304-bit one-time program-
mable read only memory (OTP EPROM) organized 256K by 16 bits. It requires a sin-
gle 5V power supply in normal read mode operation. Any word can be accessed in
less than 55 ns, eliminating the need for speed-reducing WAIT states. The by-16
organization makes this part ideal for high-performance 16- and 32-bit microprocessor
systems.
(continued)
Pin Configurations
PDIP Top View
Pin Name Function
A0 - A17
O0 - O15
CE
Addresses
Outputs
Chip Enable
Output Enable
No Connect
OE
NC
Note:
Both GND pins must be
connected.
PLCC Top View
TSOP Top View
Type 1
0311E-A–06/97
Description
In read mode, the AT27C4096 typically consumes 15 mA.
Standby mode supply current is typically less than 10 µA.
System Considerations
Switching between active and standby conditions via the
Chip Enable pin may produce transient voltage excursions.
Unless accommodated by the system design, these tran-
sients may exceed data sheet limits, resulting in device
non-conformance. At a minimum, a 0.1 µF high frequency,
low inherent inductance, ceramic capacitor should be uti-
lized for each device. This capacitor should be connected
between the VCC and Ground terminals of the device, as
close to the device as possible. Additionally, to stabilize the
supply voltage level on printed circuit boards with large
EPROM arrays, a 4.7 µF bulk electrolytic capacitor should
be utilized, again connected between the VCC and Ground
terminals. This capacitor should be positioned as close as
possible to the point where the power supply is connected
to the array.
The AT27C4096 is available in industry standard
JEDEC-approved one-time programmable (OTP) plastic
PDIP, PLCC, and TSOP packages. The device features
two-line control (CE, OE) to eliminate bus contention in
high-speed systems.
With high density 256K word storage capability, the
AT27C4096 allows firmware to be stored reliably and to be
accessed by the system without the delays of mass storage
media.
Atmel’s AT27C4096 has additional features that ensure
high quality and efficient production use. The Rapid™ Pro-
gramming Algorithm reduces the time required to program
the part and guarantees reliable programming. Program-
ming time is typically only 50 µs/word. The Integrated Prod-
uct Identification Code electronically identifies the device
and manufacturer. This feature is used by industry stan-
dard programming equipment to select the proper program-
ming algorithms and voltages.
AT27C4096
2
AT27C4096
Block Diagram
Absolute Maximum Ratings*
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Temperature Under Bias ......................-55°C to +125°C
Storage Temperature............................-65°C to +150°C
Voltage on Any Pin with
Respect to Ground ...............................-2.0V to +7.0V(1)
Voltage on A9 with
Respect to Ground ............................-2.0V to +14.0V(1)
Note:
Maximum voltage is -0.6V dc which may undershoot
to -2.0V for pulses of less than 20 ns. Maximum out-
put pin voltage is VCC + 0.75V dc which may over-
shoot to +7.0V for pulses of less than 20 ns.
VPP Supply Voltage with
Respect to Ground .............................-2.0V to +14.0V(1)
Operating Modes
Mode/Pin
CE
VIL
X
OE
Ai
VPP
X(1)
X
Outputs
DOUT
Read
VIL
VIH
X
Ai
Output Disable
X
High Z
Standby
VIH
VIL
VIH
VIH
X
X(5) High Z
Rapid Program(2)
PGM Verify
PGM Inhibit
VIH
VIL
VIH
Ai
Ai
VPP
VPP
VPP
DIN
DOUT
High Z
X
(3)
A9 = VH
Product Identification(4)
VIL
VIL
A0 = VIH or VIL
A1 - A17 = VIL
VCC Identification Code
Notes: 1. X can be VIL or VIH.
2. Refer to the Programming characteristics.
3. VH = 12.0 ± 0.5V.
4. Two identifier words may be selected. All Ai inputs are held low (VIL), except A9, which is set to VH, and A0, which is toggled
low (VIL) to select the Manufacturer’s Identification word and high (VIH) to select the Device Code word.
5. Standby VCC current (ISB) is specified with VPP = VCC. VCC > VPP will cause a slight increase in ISB
.
3
DC and AC Operating Conditions for Read Operation
AT27C4096
-55
-70
-90
-12
-15
Com.
Ind.
0°C - 70°C
-40°C - 85°C
5V ± 10%
0°C - 70°C
-40°C - 85°C
5V ± 10%
0°C - 70°C
-40°C - 85°C
5V ± 10%
0°C - 70°C
-40°C - 85°C
5V ± 10%
0°C - 70°C
-40°C - 85°C
5V ± 10%
Operating Temperature
(Case)
V
CC Power Supply
DC and Operating Characteristics for Read Operation
Symbol Parameter
Condition
Min
Max
Units
µA
ILI
Input Load Current
VIN = 0V to VCC
VOUT = 0V to VCC
VPP = VCC
± 1
± 5
10
ILO
Output Leakage Current
µA
(2)
IPP1
VPP(1) Read/Standby Current
µA
ISB1 (CMOS)
CE = VCC ± 0.3V
100
1
µA
mA
mA
ISB
VCC(1) Standby Current
I
SB2 (TTL)
CE = 2.0 to VCC + 0.5V
f = 5 MHz, IOUT = 0 mA,
CE = VIL
ICC
VCC Active Current
40
VIL
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
-0.6
2.0
0.8
VCC + 0.5
0.4
V
V
V
V
VIH
VOL
VOH
IOL = 2.1 mA
IOH = -400 µA
2.4
Notes: 1. VCC must be applied simultaneously or before VPP, and removed simultaneously or after VPP
2. VPP may be connected directly to VCC, except during programming. The supply current would then be the sum of ICC and
IPP
.
.
AC Characteristics for Read Operation
AT27C4096
-90
-55
-70
-12
-15
Symbol Parameter
Condition
Min Max Min Max Min Max Min Max Min Max Units
Address to
Output Delay
CE = OE
= VIL
(3)
tACC
55
70
90
120
150
ns
(2)
tCE
CE to Output Delay
OE to Output Delay
OE = VIL
CE = VIL
55
20
70
30
90
35
120
40
150
50
ns
ns
(2)(3)
tOE
OE or CE High to
Output Float,
whichever occurred
first
(4)(5)
tDF
20
20
20
30
35
ns
ns
Output Hold from
Address, CE or OE,
whichever occurred
first
(4)
tOH
7
7
0
0
0
Note:
2, 3, 4, 5. See the AC Waveforms for Read Operation diagram.
AT27C4096
4
AT27C4096
(1)
AC Waveforms for Read Operation
Notes: 1. Timing measurement references are 0.8V and 2.0V. Input AC drive levels are 0.45V and 2.4V, unless otherwise specified.
2. OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE
3. OE may be delayed up to tACC - tOE after the address is valid without impact on tACC
.
.
4. This parameter is only sampled and is not 100% tested.
5. Output float is defined as the point when data is no longer driven.
Input Test Waveforms and Measurement Levels
Output Test Load
For -55 devices only:
tR, tF < 5 ns (10% to 90%)
Note:
CL = 100 pF including jig
capacitance, except for
the -45 and -55 devices,
where CL = 30 pF.
For -70, -90, -12 and -15 devices:
tR, tF < 20 ns (10% to 90%)
Pin Capacitance
(f = 1 MHz T = 25°C)(1)
Typ
4
Max
10
Units
pF
Conditions
VIN = 0V
CIN
COUT
8
12
pF
VOUT = 0V
Note:
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
5
(1)
Programming Waveforms
Notes: 1. The Input Timing Reference is 0.8V for VIL and 2.0V for VIH.
2. tOE and tDFP are characteristics of the device but must be accommodated by the programmer.
3. When programming the AT27C4096, a 0.1 µF capacitor is required across VPP and ground to suppress spurious voltage
transients.
DC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Limits
Symbol
ILI
Parameter
Test Conditions
Min
Max
±10
Units
µA
V
Input Load Current
Input Low Level
Input High Level
Output Low Voltage
Output High Voltage
VIN = VIL, VIH
VIL
-0.6
2.0
0.8
VIH
VCC + 0.7
0.4
V
VOL
VOH
IOL = 2.1 mA
V
IOH = -400 µA
2.4
V
VCC Supply Current
(Program and Verify)
ICC2
50
mA
IPP2
VID
VPP Supply Current
CE = VIL
30
mA
V
A9 Product Identification Voltage
11.5
12.5
AT27C4096
6
AT27C4096
AC Programming Characteristics
TA = 25 ± 5°C, VCC = 6.5 ± 0.25V, VPP = 13.0 ± 0.25V
Limits
Symbol
tAS
Parameter
Test Conditions(1)
Min
Max
Units
µs
Address Setup Time
OE Setup Time
2
2
tOES
tDS
µs
Input Rise and Fall Times
Data Setup Time
2
µs
(10% to 90%) 20ns
tAH
Address Hold Time
0
µs
Input Pulse Levels
0.45V to 2.4V
tDH
Data Hold Time
2
µs
tDFP
tVPS
tVCS
tPW
OE High to Output Float Delay(2)
VPP Setup Time
0
130
ns
2
µs
Input Timing Reference Level
0.8V to 2.0V
VCC Setup Time
2
µs
CE Program Pulse Width(3)
47.5
52.5
150
µs
Output Timing Reference Level
0.8V to 2.0V
tOE
Data Valid from OE
ns
VPP Pulse Rise Time During
Programming
tPRT
50
ns
Notes: 1. VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP
.
2. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven
—see timing diagram.
3. Program Pulse width tolerance is 50 µsec ± 5%.
Atmel’s 27C4096 Intergrated Product Identification Code
Pins
Codes
A0
0
015-08
O7
0
O6
0
O5
0
O4
1
O3
1
O2
1
O1
1
O0
0
Hex Data
001E
Manufacturer
Device Type
0
0
1
1
1
1
1
0
1
0
0
00F4
7
Rapid Programming Algorithm
A 50 µs CE pulse width is used to program. The address is
set to the first location. VCC is raised to 6.5V and VPP is
raised to 13.0V. Each address is first programmed with one
50 µs CE pulse without verification. Then a verifica-
tion/reprogramming loop is executed for each address. In
the event a word fails to pass verification, up to 10 succes-
sive 50 µs pulses are applied with a verification after each
pulse. If the word fails to verify after 10 pulses have been
applied, the part is considered failed. After the word verifies
properly, the next address is selected until all have been
checked. VPP is then lowered to 5.0V and VCC to 5.0V. All
words are read again and compared with the original data
to determine if the device passes or fails.
AT27C4096
8
AT27C4096
Ordering Information
ICC (mA)
tACC (ns)
Active
Standby
Ordering Code
Package
Operation Range
55
40
0.1
AT27C4096-55JC
AT27C4096-55PC
AT27C4096-55VC
44J
40P6
40V
Commercial
(0°C to 70°C)
40
40
40
40
40
40
40
40
40
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
AT27C4096-55JI
AT27C4096-55PI
AT27C4096-55VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
70
90
AT27C4096-70JC
AT27C4096-70PC
AT27C4096-70VC
44J
40P6
40V
Commercial
(0°C to 70°C)
AT27C4096-70JI
AT27C4096-70PI
AT27C4096-70VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
AT27C4096-90JC
AT27C4096-90PC
AT27C4096-90VC
44J
40P6
40V
Commercial
(0°C to 70°C)
AT27C4096-90JI
AT27C4096-90PI
AT27C4096-90VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
120
150
AT27C4096-12JC
AT27C4096-12PC
AT27C4096-12VC
44J
40P6
40V
Commercial
(0°C to 70°C)
AT27C4096-12JI
AT27C4096-12PI
AT27C4096-12VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
AT27C4096-15JC
AT27C4096-15PC
AT27C4096-15VC
44J
40P6
40V
Commercial
(0°C to 70°C)
AT27C4096-15JI
AT27C4096-15PI
AT27C4096-15VI
44J
40P6
40V
Industrial
(-40°C to 85°C)
Package Type
44J
44 Lead, Plastic J-Leaded Chip Carrier (PLCC)
40P6
40V
40 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
40 Lead, Plastic Thin Small Outline Package (TSOP) 10 x 14 mm
9
相关型号:
AT27C4096-55PU
OTP ROM, 256KX16, 55ns, CMOS, PDIP40, 0.600 INCH, GREEN, PLASTIC, MS-011AC, DIP-40
ATMEL
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