AT28C64E-15TL [ATMEL]
EEPROM, 8KX8, 150ns, Parallel, CMOS, PDSO28, PLASTIC, TSOP-28;
| 型号： | AT28C64E-15TL |
| 厂家： | 
ATMEL |
| 描述： | EEPROM, 8KX8, 150ns, Parallel, CMOS, PDSO28, PLASTIC, TSOP-28 可编程只读存储器 |
| 文件： | 总11页 (文件大小：315K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AT28C64/X
Features
Fast Read Access Time - 120 ns
Fast Byte Write - 200 µs or 1 ms
Self-Timed Byte Write Cycle
•
•
•
Internal Address and Data Latches
Internal Control Timer
Automatic Clear Before Write
Direct Microprocessor Control
•
READY/BUSY Open Drain Output
DATA Polling
Low Power
64K (8K x 8)
CMOS
•
•
30 mA Active Current
100 µA CMOS Standby Current
High Reliability
E2PROM
Endurance: 104 or 105 Cycles
Data Retention: 10 Years
5V ± 10% Supply
•
•
•
•
CMOS and TTL Compatible Inputs and Outputs
JEDEC Approved Byte-Wide Pinout
Commercial and Industrial Temperature Ranges
Description
The AT28C64 is a low-power, high-performance 8,192 words by 8 bit nonvolatile
Electrically Erasable and Programmable Read Only Memory with popular, easy to
use features. The device is manufactured with Atmel’s reliable nonvolatile technol-
ogy.
(continued)
Pin Configurations
PDIP, SOIC
Top View
Pin Name
A0 - A12
CE
Function
Addresses
AT28C64/X
Chip Enable
OE
Output Enable
Write Enable
Data Inputs/Outputs
Ready/Busy Output
No Connect
WE
I/O0 - I/O7
RDY/BUSY
NC
DC
Don’t Connect
LCC, PLCC
Top View
TSOP
Top View
Note: PLCC package pins 1 and
17 are DON’T CONNECT.
0001G
2-193
Description (Continued)
The AT28C64 is accessed like a Static RAM for the read
or write cycles without the need for external components.
During a byte write, the address and data are latched in-
ternally, freeing the microprocessor address and data bus
for other operations. Following the initiation of a write cy-
cle, the device will go to a busy state and automatically
clear and write the latched data using an internal control
timer. The device includes two methods for detecting the
end of a write cycle, level detection of RDY/BUSY (unless
The CMOS technology offers fast access times of 120 ns
at low power dissipation. When the chip is deselected the
standby current is less than 100 µA.
Atmel’s 28C64 has additional features to ensure high
quality and manufacturability. The device utilizes error cor-
rection internally for extended endurance and for im-
proved data retention characteristics. An extra 32-bytes of
2
E PROM are available for device identification or tracking.
pin 1 is N.C.) and DATA POLLING of I/O . Once the end
7
of a write cycle has been detected, a new access for a
read or write can begin.
Block Diagram
Absolute Maximum Ratings*
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Temperature Under Bias................. -55°C to +125°C
Storage Temperature...................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ................... -0.6V to +6.25V
All Output Voltages
with Respect to Ground .............-0.6V to V + 0.6V
CC
Voltage on OE and A9
with Respect to Ground ................... -0.6V to +13.5V
2-194
AT28C64/X
AT28C64/X
Device Operation
READ: The AT28C64 is accessed like a Static RAM.
When CE and OE are low and WE is high, the data stored
at the memory location determined by the address pins is
asserted on the outputs. The outputs are put in a high im-
pedance state whenever CE or OE is high. This dual line
control gives designers increased flexibility in preventing
bus contention.
DATA POLLING: The AT28C64 provides DATA POLL-
ING to signal the completion of a write cycle. During a
write cycle, an attempted read of the data being written
results in the complement of that data for I/O (the other
7
outputs are indeterminate). When the write cycle is fin-
ished, true data appears on all outputs.
WRITE PROTECTION: Inadvertent writes to the device
BYTE WRITE: Writing data into the AT28C64 is similar to
writing into a Static RAM. A low pulse on the WE or CE
input with OE high and CE or WE low (respectively) initi-
ates a byte write. The address location is latched on the
falling edge of WE (or CE); the new data is latched on the
rising edge. Internally, the device performs a self-clear be-
fore write. Once a byte write has been started, it will auto-
matically time itself to completion. Once a programming
are protected against in the following ways. (a) V
CC
sense— if V is below 3.8V (typical) the write function is
CC
inhibited. (b) V
power on delay— once V
has
CC
CC
reached 3.8V the device will automatically time out 5 ms
(typical) before allowing a byte write. (c) Write Inhibit—
holding any one of OE low, CE high or WE high inhibits
byte write cycles.
CHIP CLEAR: The contents of the entire memory of the
AT28C64 may be set to the high state by the CHIP CLEAR
operation. By setting CE low and OE to 12 volts, the chip
is cleared when a 10 msec low pulse is applied to WE.
operation has been initiated and for the duration of t , a
WC
read operation will effectively be a polling operation.
FAST BYTE WRITE: The AT28C64E offers a byte write
time of 200 µs maximum. This feature allows the entire
device to be rewritten in 1.6 seconds.
DEVICE IDENTIFICATION: An extra 32-bytes of
2
E PROM memory are available to the user for device
READY/BUSY: Pin 1 is an open drain READY/BUSY
output that can be used to detect the end of a write cycle.
RDY/BUSY is actively pulled low during the write cycle
and is released at the completion of the write. The open
drain connection allows for OR-tying of several devices to
the same RDY/BUSY line. Pin 1 is not connected for the
AT28C64X.
identification. By raising A9 to 12 ± 0.5V and using ad-
dress locations 1FE0H to 1FFFH the additional bytes may
be written to or read from in the same manner as the regu-
lar memory array.
2-195
DC and AC Operating Range
AT28C64-12
AT28C64-15
0°C - 70°C
-40°C - 85°C
5V ± 10%
AT28C64-20
0°C - 70°C
-40°C - 85°C
5V ± 10%
AT28C64-25
0°C - 70°C
-40°C - 85°C
5V ± 10%
Com.
Ind.
0°C - 70°C
-40°C - 85°C
5V ± 10%
Operating
Temperature (Case)
V
Power Supply
CC
Operating Modes
Mode
CE
OE
WE
I/O
Read
V
V
V
V
D
D
IL
IL
IH
IL
IH
OUT
IN
(2)
Write
V
V
IH
IL
(1)
Standby/Write Inhibit
Write Inhibit
V
X
X
High Z
X
X
V
IH
Write Inhibit
X
X
V
X
IL
Output Disable
V
IH
X
High Z
High Z
(3)
Chip Erase
V
IL
V
V
IL
H
Notes: 1. X can be VIL or VIH.
3. VH = 12.0V ± 0.5V.
2. Refer to AC Programming Waveforms.
DC Characteristics
Symbol
Parameter
Condition
Min
Max
Units
µA
µA
µA
mA
mA
mA
mA
V
I
I
I
Input Load Current
Output Leakage Current
V
V
= 0V to V + 1V
10
10
100
2
LI
IN
CC
= 0V to V
CC
LO
SB1
I/O
V
Standby Current CMOS
CE = V - 0.3V to V + 1.0V
CC CC
CC
Com.
I
V
Standby Current TTL
CE = 2.0V to V + 1.0V
CC
SB2
CC
CC
Ind.
3
Com.
Ind.
30
45
0.8
f = 5 MHz; I
= 0 mA
OUT
I
V
Active Current AC
CC
CE = V
IL
V
V
Input Low Voltage
Input High Voltage
IL
2.0
2.4
V
IH
I
OL
= 2.1 mA
= 4.0 mA for RDY/BUSY
V
V
Output Low Voltage
Output High Voltage
.45
V
V
OL
I
= -400 µA
OH
OH
2-196
AT28C64/X
AT28C64/X
AC Read Characteristics
AT28C64-12
AT28C64-15
AT28C64-20
AT28C64-25
Min
Max
120
120
60
Min
Max
150
150
70
Min
Max
200
200
80
Min
Max
250
250
100
Symbol
Parameter
Units
ns
t
t
t
Address to Output Delay
CE to Output Delay
OE to Output Delay
ACC
(1)
ns
CE
OE
(2)
10
0
10
0
10
0
10
0
ns
CE or OE High to Output
Float
(3, 4)
t
DF
45
50
55
60
ns
ns
Output Hold from OE, CE
or Address, whichever
occurred first
t
0
0
0
0
OH
AC Read Waveforms (1, 2, 3, 4)
Notes: 1. CE may be delayed up to tACC - tCE after the address
transition without impact on tACC
3. tDF is specified from OE or CE whichever occurs first
(CL = 5 pF).
.
2. OE may be delayed up to tCE - tOE after the falling
edge of CE without impact on tCE or by tACC - tOE
4. This parameter is characterized and is not 100% tested.
after an address change without impact on tACC
.
Output Test Load
Input Test Waveforms and
Measurement Level
t , t < 20 ns
R
F
Pin Capacitance (f = 1 MHz, T = 25°C) (1)
Typ
Max
6
Units
pF
Conditions
C
C
4
8
V
V
= 0V
IN
IN
12
pF
= 0V
OUT
OUT
Note: 1. This parameter is characterized and is not 100% tested.
2-197
AC Write Characteristics
Symbol
Parameter
Min
10
50
100
50
10
0
Max
Units
ns
t
t
t
t
t
t
t
, t
Address, OE Set-up Time
Address Hold Time
AS OES
ns
AH
WP
DS
Write Pulse Width (WE or CE)
Data Set-up Time
1000
ns
ns
, t
Data, OE Hold Time
ns
DH OEH
, t
CS CH
CE to WE and WE to CE Set-up and Hold Time
Time to Device Busy
ns
50
1.0
200
ns
DB
AT28C64
ms
µs
t
Write Cycle Time
WC
AT28C64E
AC Write Waveforms
WE Controlled
CE Controlled
2-198
AT28C64/X
AT28C64/X
Data Polling Characteristics(1)
Symbol
Parameter
Min
10
Typ
Max
Units
ns
t
t
t
t
Data Hold Time
OE Hold Time
OE to Output Delay
DH
10
ns
OEH
OE
(2)
ns
Write Recovery Time
0
ns
WR
Notes: 1. These parameters are characterized and not 100% tested.
2. See AC Read Characteristics.
Data Polling Waveforms
Chip Erase Waveforms
tS = tH = 1 µsec (min.)
tW = 10 msec (min.)
VH = 12.0V ± 0.5V
2-199
2-200
AT28C64/X
AT28C64/X
Ordering Information (1)
t
I
(mA)
ACC
CC
Ordering Code
Package
Operation Range
Active Standby
(ns)
120
30
45
30
45
30
45
30
0.1
0.1
0.1
0.1
0.1
0.1
0.1
AT28C64(E)-12JC
AT28C64(E)-12PC
AT28C64(E)-12SC
AT28C64(E)-12TC
32J
Commercial
(0°C to 70°C)
28P6
28S
28T
AT28C64(E)-12JI
AT28C64(E)-12PI
AT28C64(E)-12SI
AT28C64(E)-12TI
32J
Industrial
(-40°C to 85°C)
28P6
28S
28T
150
200
250
AT28C64(E)-15JC
AT28C64(E)-15PC
AT28C64(E)-15SC
AT28C64(E)-15TC
32J
Commercial
(0°C to 70°C)
28P6
28S
28T
AT28C64(E)-15JI
AT28C64(E)-15PI
AT28C64(E)-15SI
AT28C64(E)-15TI
32J
Industrial
(-40°C to 85°C)
28P6
28S
28T
AT28C64(E)-20JC
AT28C64(E)-20PC
AT28C64(E)-20SC
AT28C64(E)-20TC
32J
Commercial
(0°C to 70°C)
28P6
28S
28T
AT28C64(E)-20JI
AT28C64(E)-20PI
AT28C64(E)-20SI
AT28C64(E)-20TI
32J
Industrial
(-40°C to 85°C)
28P6
28S
28T
AT28C64(E)-25JC
AT28C64(E)-25PC
AT28C64(E)-25SC
AT28C64(E)-25TC
AT28C64-W
32J
Commercial
(0°C to 70°C)
28P6
28S
28T
DIE
45
0.1
AT28C64(E)-25JI
AT28C64(E)-25PI
AT28C64(E)-25SI
AT28C64(E)-25TI
32J
Industrial
(-40°C to 85°C)
28P6
28S
28T
Note: 1. See Valid Part Number table below.
2-201
Package Type
32 Lead, Plastic J-Leaded Chip Carrier (PLCC)
32J
28P6
28S
28T
W
28 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
28 Lead, 0.300" Wide, Plastic Gull Wing, Small Outline (SOIC)
28 Lead, Plastic Thin Small Outline Package (TSOP)
Die
Options
Blank
E
Standard Device: Endurance = 10K Write Cycles; Write Time = 1 ms
High Endurance Option: Endurance = 100K Write Cycles; Write Time = 200 µs
2-202
AT28C64/X
AT28C64/X
Ordering Information
t
I
(mA)
ACC
CC
Ordering Code
Package
Operation Range
Active Standby
(ns)
150
30
45
30
45
30
45
0.1
0.1
0.1
0.1
0.1
0.1
AT28C64X-15JC
AT28C64X-15PC
AT28C64X-15SC
AT28C64X-15TC
32J
Commercial
(0°C to 70°C)
28P6
28S
28T
AT28C64X-15JI
AT28C64X-15PI
AT28C64X-15SI
AT28C64X-15TI
32J
Industrial
(-40°C to 85°C)
28P6
28S
28T
200
AT28C64X-20JC
AT28C64X-20PC
AT28C64X-20SC
AT28C64X-20TC
32J
Commercial
(0°C to 70°C)
28P6
28S
28T
AT28C64X-20JI
AT28C64X-20PI
AT28C64X-20SI
AT28C64X-20TI
32J
Industrial
(-40°C to 85°C)
28P6
28S
28T
250
AT28C64X-25JC
AT28C64X-25PC
AT28C64X-25SC
AT28C64X-25TC
32J
Commercial
(0°C to 70°C)
28P6
28S
28T
AT28C64X-25JI
AT28C64X-25PI
AT28C64X-25SI
AT28C64X-25TI
32J
Industrial
(-40°C to 85°C)
28P6
28S
28T
Valid Part Numbers
The following table lists standard Atmel products that can be ordered.
Device Numbers
AT28C64 X
Speed
Package and Temperature Combinations
JC, JI, PC, PI, SC, SI, TC, TI
12
15
20
25
AT28C64 X
JC, JI, PC, PI, SC, SI, TC, TI
AT28C64 X
JC, JI, PC, PI, SC, SI, TC, TI
AT28C64 X
JC, JI, PC, PI, SC, SI, TC, TI
Package Type
32J
32 Lead, Plastic J-Leaded Chip Carrier (PLCC)
28P6
28S
28T
28 Lead, 0.600" Wide Plastic Dual Inline Package (PDIP)
28 Lead, 0.300" Wide, Plastic Gull Wing Small Outline (SOIC)
28 Lead, Plastic Thin Small Outline Package (TSOP)
2-203
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