AT29LV256-15TI [ATMEL]
256K 32K x 8 3-volt Only CMOS Flash Memory; 256K 32K ×8 3伏的CMOS只快闪记忆体
| 型号： | AT29LV256-15TI |
| 厂家： | 
ATMEL |
| 描述： | 256K 32K x 8 3-volt Only CMOS Flash Memory |
| 文件： | 总10页 (文件大小：452K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AT29LV256
Features
Single Supply Voltage, Range 3V to 3.6V
3-Volt-Only Read and Write Operation
Software Protected Programming
Low Power Dissipation
•
•
•
•
15 mA Active Current
20 µA CMOS Standby Current
Fast Read Access Time - 200 ns
Sector Program Operation
•
•
Single Cycle Reprogram (Erase and Program)
512 Sectors (64 bytes/sector)
256K (32K x 8)
3-volt Only
CMOS Flash
Memory
Internal Address and Data Latches for 64-Bytes
Fast Sector Program Cycle Time - 20 ms Max.
Internal Program Control and Timer
DATA Polling for End of Program Detection
Typical Endurance > 10,000 Cycles
CMOS and TTL Compatible Inputs and Outputs
Commercial and Industrial Temperature Ranges
•
•
•
•
•
•
Description
The AT29LV256 is a 3-volt-only in-system Flash Programmable Erasable Read Only
Memory (PEROM). Its 256K of memory is organized as 32,768 words by 8 bits.
Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers
access times to 200 ns with power dissipation of just 54 mW over the commercial
temperature range. When the device is deselected, the CMOS standby current is less
than 20 µA. The device endurance is such that any sector can typically be written to
in excess of 10,000 times.
(continued)
PLCC Top View
AT29LV256
Pin Configurations
Pin Name Function
A0 - A14
CE
Addresses
Chip Enable
Output Enable
Write Enable
OE
WE
I/O0 - I/O7 Data Inputs/Outputs
NC
DC
No Connect
Don’t Connect
TSOP Top View
Type 1
0563A
4-33
Description (Continued)
To allow for simple in-system reprogrammability, the
AT29LV256 does not require high input voltages for pro-
gramming. Three-volt-only commands determine the op-
eration of the device. Reading data out of the device is
similar to reading from an EPROM. Reprogramming the
AT29LV256 is performed on a sector basis; 64-bytes of
data are loaded into the device and then simultaneously
programmed.
During a reprogram cycle, the address locations and 64-
bytes of data are captured at microprocessor speed and
internally latched, freeing the address and data bus for
other operations. Following the initiation of a program cy-
cle, the device will automatically erase the sector and then
program the latched data using an internal control timer.
The end of a program cycle can be detected by DATA poll-
ing of I/O7. Once the end of a program cycle has been
detected, a new access for a read or program can begin.
Block Diagram
Device Operation
the software feature will guard against inadvertent pro-
gram cycles during power transitions.
READ: The AT29LV256 is accessed like an EPROM.
When CE and OE are low and WE is high, the data stored
at the memory location determined by the address pins is
asserted on the outputs. The outputs are put in the high
impedance state whenever CE or OE is high. This dual-
line control gives designers flexibility in preventing bus
contention.
Any attempt to write to the device without the 3-byte com-
mand sequence will start the internal write timers. No data
will be written to the device; however, for the duration of
t , a read operation will effectively be a polling operation.
WC
After the software data protection’s 3-byte command code
is given, a byte load is performed by applying a low pulse
on the WE or CE input with CE or WE low (respectively)
and OE high. The address is latched on the falling edge of
CE or WE, whichever occurs last. The data is latched by
the first rising edge of CE or WE.
SOFTWARE DATA PROTECTION PROGRAMMING:
The AT29LV256 has 512 individual sectors, each 64-
bytes. Using the software data protection feature, byte
loads are used to enter the 64-bytes of a sector to be pro-
grammed. The AT29LV256 can only be programmed or
reprogrammed using the software data protection feature.
The device is programmed on a sector basis. If a byte of
data within the sector is to be changed, data for the entire
64-byte sector must be loaded into the device. The
AT29LV256 automatically does a sector erase prior to
loading the data into the sector. An erase command is not
required.
The 64-bytes of data must be loaded into each sector. Any
byte that is not loaded during the programming of its sec-
tor will be erased to read FFh. Once the bytes of a sector
are loaded into the device, they are simultaneously pro-
grammed during the internal programming period. After
the first data byte has been loaded into the device, suc-
cessive bytes are entered in the same manner. Each new
byte to be programmed must have its high to low transition
on WE (or CE) within 150 µs of the low to high transition of
WE (or CE) of the preceding byte. If a high to low transition
is not detected within 150 µs of the last low to high transi-
tion, the load period will end and the internal programming
period will start. A6 to A14 specify the sector address. The
sector address must be valid during each high to low tran-
Software data protection protects the device from inadver-
tent programming. A series of three program commands
to specific addresses with specific data must be presented
to the device before programming may occur. The same
three program commands must begin each program op-
eration. All software program commands must obey the
sector program timing specifications. Power transitions
will not reset the software data protection feature, however
(continued)
4-34
AT29LV256
AT29LV256
Device Operation (Continued)
sition of WE (or CE). A0 to A5 specify the byte address
within the sector. The bytes may be loaded in any order;
sequential loading is not required. Once a programming
the part (i.e. using the device code), and have the system
software use the appropriate sector size for program op-
erations. In this manner, the user can have a common
board design for 256K to 4-megabit densities and, with
each density’s sector size in a memory map, have the sys-
tem software apply the appropriate sector size.
operation has been initiated, and for the duration of t , a
read operation will effectively be a polling operation.
WC
HARDWARE DATA PROTECTION: Hardware features
protect against inadvertent programs to the AT29LV256 in
For details, see Operating Modes (for hardware operation)
or Software Product Identification. The manufacturer and
device code is the same for both modes.
the following ways: (a) V sense— if V is below 1.8V
CC
CC
(typical), the program function is inhibited. (b) V power
CC
on delay— once V
has reached the V
sense level,
CC
CC
DATA POLLING: The AT29LV256 features DATA poll-
ing to indicate the end of a program cycle. During a pro-
gram cycle an attempted read of the last byte loaded will
result in the complement of the loaded data on I/O7. Once
the program cycle has been completed, true data is valid
on all outputs and the next cycle may begin. DATA polling
may begin at any time during the program cycle.
the device will automatically time out 10 ms (typical) be-
fore programming. (c) Program inhibit— holding any one
of OE low, CE high or WE high inhibits program cycles. (d)
Noise filter— pulses of less than 15 ns (typical) on the WE
or CE inputs will not initiate a program cycle.
INPUT LEVELS: While operating with a 3.3V ±10%
power supply, the address inputs and control inputs (OE,
CE and WE) may be driven from 0 to 5.5V without ad-
versely affecting the operation of the device. The I/O lines
can only be driven from 0 to 3.6 volts.
TOGGLE BIT: In addition to DATA polling the
AT29LV256 provides another method for determining the
end of a program or erase cycle. During a program or
erase operation, successive attempts to read data from
the device will result in I/O6 toggling between one and
zero. Once the program cycle has completed, I/O6 will
stop toggling and valid data will be read. Examining the
toggle bit may begin at any time during a program cycle.
PRODUCT IDENTIFICATION: The product identifica-
tion mode identifies the device and manufacturer as At-
mel. It may be accessed by hardware or software opera-
tion. The hardware operation mode can be used by an ex-
ternal programmer to identify the correct programming al-
gorithm for the Atmel product. In addition, users may wish
to use the software product identification mode to identify
OPTIONAL CHIP ERASE MODE: The entire device
can be erased by using a 6-byte software code. Please
see Software Chip Erase application note for details.
Absolute Maximum Ratings*
Temperature Under Bias................. -55°C to +125°C
Storage Temperature...................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ................... -0.6V to +6.25V
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
All Output Voltages
with Respect to Ground .............-0.6V to V + 0.6V
CC
Voltage on A9
(including NC Pins)
with Respect to Ground ................... -0.6V to +13.5V
4-35
DC and AC Operating Range
AT29LV256-15
0°C - 70°C
AT29LV256-20
0°C - 70°C
AT29LV256-25
0°C - 70°C
Com.
Ind.
Operating
Temperature (Case)
-40°C - 85°C
3.3V ± 0.3V
-40°C - 85°C
3.3V ± 0.3V
-40°C - 85°C
3.3V ± 0.3V
V
Power Supply
CC
Operating Modes
Mode
CE
OE
WE
Ai
Ai
Ai
X
I/O
Read
V
V
V
IL
V
IH
D
D
IL
IL
OUT
IN
(2)
Program
V
V
IH
(1)
IL
Standby/Write Inhibit
Program Inhibit
V
X
X
High Z
IH
X
X
V
IH
Program Inhibit
X
X
V
X
IL
Output Disable
V
X
High Z
IH
Product Identification
(3)
(3)
A1 - A14 = VIL, A9 = VH
A0 = VIL
A1 - A14 = VIL, A9 = VH
A0 = VIH
,
,
(4)
(4)
Manufacturer Code
Hardware
V
V
IL
V
IH
IL
(4)
Device Code
A0 = VIL
A0 = VIH
Manufacturer Code
(5)
Software
(4)
Device Code
Notes: 1. X can be VIL or VIH.
4. Manufacturer Code: 1F, Device Code: BC.
5. See details under Software Product Identification Entry/Exit.
2. Refer to AC Programming Waveforms.
3. VH = 12.0V ± 0.5V.
DC Characteristics
Symbol
Parameter
Condition
Min
Max
1
Units
µA
µA
µA
µA
mA
mA
V
I
LI
Input Load Current
Output Leakage Current
V
V
= 0V to V
CC
IN
I
LO
= 0V to V
CC
1
I/O
Com.
Ind.
20
50
1
I
V
Standby Current CMOS
CE = V - 0.3V to V
CC CC
SB1
CC
I
I
V
V
Standby Current TTL
Active Current
CE = 2.0V to V
CC
SB2
CC
CC
f = 5 MHz; I
= 0 mA; V = 3.6V
15
0.6
CC
OUT
CC
V
V
V
V
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
IL
2.0
2.4
V
IH
I
OL
= 1.6 mA; V = 3.0V
.45
V
OL
OH
CC
I
= -100 µA; V = 3.0V
V
OH
CC
4-36
AT29LV256
AT29LV256
AC Read Characteristics
AT29LV256-15
AT29LV256-20
AT29LV256-25
Min
Max
150
150
70
Min
Max
200
200
100
50
Min
Max
250
250
120
60
Symbol
Parameter
Units
ns
t
t
t
t
Address to Output Delay
CE to Output Delay
OE to Output Delay
CE or OE to Output Float
ACC
(1)
ns
CE
OE
DF
(2)
0
0
0
0
0
0
ns
(3, 4)
40
ns
Output Hold from OE, CE or
Address, whichever occurred first
t
0
0
0
ns
OH
AC Read Waveforms (1, 2, 3, 4)
Notes:
1. CE may be delayed up to tACC - tCE after the address transi-
tion without impact on tACC
3. tDF is specified from OE or CE whichever occurs first
(CL = 5 pF).
.
2. OE may be delayed up to tCE - tOE after the falling edge
of CE without impact on tCE or by tACC - tOE after an address
4. This parameter is characterized and is not 100% tested.
change without impact on tACC
.
Input Test Waveforms and Measurement Level
Output Test Load
t , t < 5 ns
R
F
Pin Capacitance (f = 1 MHz, T = 25°C) (1)
Typ
Max
6
Units
pF
Conditions
C
C
4
8
V
V
= 0V
IN
IN
12
pF
= 0V
OUT
OUT
Note: 1. These parameters are characterized and not 100% tested.
4-37
AC Byte Load Characteristics
Symbol
Parameter
Min
10
Max
Units
ns
t
t
t
t
t
t
t
t
, t
Address, OE Set-up Time
Address Hold Time
AS OES
100
0
ns
AH
CS
CH
WP
DS
Chip Select Set-up Time
Chip Select Hold Time
Write Pulse Width (WE or CE)
Data Set-up Time
ns
0
ns
200
100
10
ns
ns
, t
Data, OE Hold Time
Write Pulse Width High
ns
DH OEH
200
ns
WPH
AC Byte Load Waveforms (1, 2)
WE Controlled
CE Controlled
4-38
AT29LV256
AT29LV256
Program Cycle Characteristics
Symbol
Parameter
Min
Max
Units
t
t
t
t
t
t
t
t
Write Cycle Time
Address Set-up Time
Address Hold Time
Data Set-up Time
Data Hold Time
20
ms
ns
ns
ns
ns
ns
µs
ns
WC
10
100
100
10
AS
AH
DS
DH
Write Pulse Width
Byte Load Cycle Time
Write Pulse Width High
200
WP
BLC
WPH
150
200
Software Protected Program Waveform (1, 2, 3)
3. All bytes that are not loaded within the sector being
Notes: 1. OE must be high when WE and CE are both low.
2. A6 through A14 must specify the sector address
during each high to low transition of WE (or CE)
after the software code has been entered.
programmed will be indeterminate.
Programming Algorithm (1)
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA A0
TO
ADDRESS 5555
Notes for software program code:
WRITES ENABLED
1. Data Format: I/O7 - I/O0 (Hex);
LOAD DATA
Address Format: A14 - A0 (Hex).
2. Data Protect state will be re-activated at end of program cycle.
3. 64-bytes of data MUST BE loaded.
TO
ENTER DATA
PROTECT STATE
(3)
(2)
SECTOR (64 BYTES)
4-39
Data Polling Characteristics (1)
Symbol
Parameter
Min
10
Typ
Max
Units
ns
t
t
t
t
Data Hold Time
OE Hold Time
OE to Output Delay
DH
10
ns
OEH
OE
(2)
ns
Write Recovery Time
0
ns
WR
Notes: 1. These parameters are characterized and not 100% tested.
2. See tOE spec in AC Read Characteristics.
Data Polling Waveforms
Toggle Bit Characteristics (1)
Symbol
Parameter
Min
10
Typ
Max
Units
ns
t
t
t
t
t
Data Hold Time
OE Hold Time
OE to Output Delay
OE High Pulse
DH
10
ns
OEH
OE
(2)
ns
150
0
ns
OEHP
WR
Write Recovery Time
ns
Notes: 1. These parameters are characterized and not 100% tested.
2. See tOE spec in AC Read Characteristics.
Toggle Bit Waveforms (1, 3)
2. Beginning and ending state of I/O6 will vary.
3. Any address location may be used but the address
should not vary.
Notes: 1. Toggling either OE or CE or both OE and CE will
operate toggle bit.
4-40
AT29LV256
AT29LV256
Software Product
Software Product
Identification Entry (1)
Identification Exit (1)
LOAD DATA AA
TO
LOAD DATA AA
TO
ADDRESS 5555
ADDRESS 5555
LOAD DATA 55
TO
LOAD DATA 55
TO
ADDRESS 2AAA
ADDRESS 2AAA
LOAD DATA F0
TO
LOAD DATA 90
TO
ADDRESS 5555
ADDRESS 5555
PAUSE 20 mS
PAUSE 20 mS
EXIT PRODUCT
IDENTIFICATION
MODE
ENTER PRODUCT
IDENTIFICATION
(4)
(2, 3, 5)
MODE
Notes for software product identification:
1. Data Format: I/O7 - I/O0 (Hex);
Address Format: A14 - A0 (Hex).
2. A1 - A14 = VIL.
Manufacture Code is read for A0 = VIL;
Device Code is read for A0 = VIH.
3. The device does not remain in identification mode if
powered down.
4. The device returns to standard operation mode.
5. Manufacturer Code: 1F
Device Code: BC
4-41
Ordering Information
t
I
(mA)
ACC
CC
Ordering Code
Package
Operation Range
(ns)
Active
Standby
150
15
0.02
0.05
0.02
AT29LV256-15JC
AT29LV256-15TC
32J
28T
Commercial
(0° to 70°C)
15
15
AT29LV256-15JI
AT29LV256-15TI
32J
28T
Industrial
(-40° to 85°C)
200
250
AT29LV256-20JC
AT29LV256-20PC
AT29LV256-20TC
32J
28P6
28T
Commercial
(0° to 70°C)
15
15
0.05
0.02
AT29LV256-20JI
AT29LV256-20PI
32J
28P6
Industrial
(-40° to 85°C)
AT29LV256-25JC
AT29LV256-25PC
AT29LV256-25TC
32J
28P6
28T
Commercial
(0° to 70°C)
15
0.05
AT29LV256-25JI
AT29LV256-25PI
32J
28P6
Industrial
(-40° to 85°C)
Package Type
32J
32 Lead, Plastic J-Leaded Chip Carrier (PLCC)
28 Lead, 0.600" Wide, Plastic Dual Inline Package (PDIP)
28 Lead, Thin Small Outline Package (TSOP)
28P6
28T
4-42
AT29LV256
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