AT42QT1012-TSHR [ATMEL]
One-channel Toggle-mode Touch Sensor IC with Power Management Functions; 单声道切换模式触摸传感器IC，具有电源管理功能
| 型号： | AT42QT1012-TSHR |
| 厂家： | 
ATMEL |
| 描述： | One-channel Toggle-mode Touch Sensor IC with Power Management Functions |
| 文件： | 总28页 (文件大小：351K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• Number of Keys:
– One, toggle mode (touch-on/touch-off), plus programmable auto-off delay and
external cancel
– Configurable as either a single key or a proximity sensor
• Technology:
– Patented spread-spectrum charge-transfer (direct mode)
• Key outline sizes:
– 6 mm x 6 mm or larger (panel thickness dependent); widely different sizes and
One-channel
Toggle-mode
Touch Sensor
IC with Power
Management
Functions
shapes possible
• Electrode design:
– Solid or ring electrode shapes
• PCB Layers required:
– One
• Electrode materials:
– Etched copper, silver, carbon, Indium Tin Oxide (ITO)
• Electrode substrates:
– PCB, FPCB, plastic films, glass
• Panel materials:
– Plastic, glass, composites, painted surfaces (low particle density metallic paints
possible)
• Panel thickness:
AT42QT1012
– Up to 12 mm glass, 6 mm plastic (electrode size and Cs dependent)
• Key sensitivity:
– Settable via external capacitor (Cs)
• Interface:
– Digital output, active high or active low (hardware configurable)
• Moisture tolerance:
– Good
• Power:
– 1.8V ~ 5.5V; 32 µA at 1.8V
• Package:
– 6-pin SOT23-6 (3 x 3 mm) RoHS compliant
– 8-pin UDFN/USON (2 x 2 mm) RoHS compliant
• Signal processing:
– Self-calibration, auto drift compensation, noise filtering
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1. Pinout and Schematic
1.1
Pinout Configurations
1.1.1
6-pin SOT23-6
OUT
VSS
1
2
3
6
5
4
TIME
VDD
SNS
SNSK
1.1.2
8-pin UDFN/USON
Pin 1 ID
8
SNS
VDD
TIME
OUT
SNSK
1
2
3
4
N/C
N/C
VSS
7
6
5
QT1012
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AT42QT1012
1.2
Pin Descriptions
Table 1-1.
Pin Listing
If Unused, Connect
To...
6-Pin
8-Pin
Name
Type
Description
Output state. To switched circuit and output polarity selection
resistor (Rop)
1
5
OUT
O (1)
2
3
4
1
Vss
P
Ground
SNSK
I/O
Sense pin. To Cs capacitor and to sense electrode
Cs + key
Cs
Sense pin. To Cs capacitor and multiplier configuration resistor
(Rm). Rm must be fitted and connected to either VSS or VDD.
See Section 3.11.4 on page 13 for details.
4
5
6
8
7
6
SNS
Vdd
I/O
P
Power
Timeout configuration pin. Must be connected to either VSS,
VDD, OUT or an RC network. See Section 3.11 on page 11 for
details.
TIME
I
–
–
2
3
N/C
N/C
–
–
Not connected
Not connected
Do not connect
Do not connect
1. I/O briefly on power-up
I
Input only
I/O
P
Input and output
Ground or power
O
Output only, push-pull
1.3
Schematics
1.3.1
6-pin SOT23-6
Figure 1-1. Basic Circuit Configuration
(active high output, toggle on/off, no auto switch off)
Note: bypass capacitor to be tightly
wired between VDD and VSS and
kept close to pin 5.
VDD
5
SENSE
ELECTRODE
Cby
VDD
RS
1
3
4
OUT
SNSK
SNS
CS
Rop
Rm
6
TIME
VSS
2
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1.3.2
8-pin UDFN/USON
Figure 1-2. Basic Circuit Configuration
(active high output, toggle on/off, no auto switch off)
Note: bypass capacitor to be tightly
wired between VDD and VSS and
kept close to pin 7.
VDD
7
SENSE
ELECTRODE
Cby
VDD
RS
5
1
8
OUT
SNSK
SNS
CS
Rop
2
N/C
N/C
Rm
6
TIME
3
VSS
4
Re Figure 1-1 on page 3 and Figure 1-2, check the following sections for component values:
• Cs capacitor (Cs) – see Section 4.2 on page 20
• Sample resistor (Rs) – see Section 4.3 on page 20
• Voltage levels – see Section 4.4 on page 20
• Output polarity selection resistor (Rop) – see Section 3.9 on page 10
• Rm resistor – see Section 3.11.2 on page 11
• Bypass capacitor (Cby) – see page 21
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AT42QT1012
2. Overview of the AT42QT1012
2.1
Introduction
The AT42QT1012 (QT1012) is a single key device featuring a touch on/touch off (toggle) output
with a programmable auto switch-off capability.
The QT1012 is a digital burst mode charge-transfer (QT™) sensor designed specifically for touch
controls. It includes all hardware and signal processing functions necessary to provide stable
sensing under a wide variety of changing conditions; only low cost, noncritical components are
required for operation. With its tiny low-cost packages, this device can suit almost any product
needing a power switch or other toggle-mode controlled function, especially power control of
small appliances and battery-operated products.
A unique “green” feature of the QT1012 is the timeout function, which can turn off power after a
time delay.
Like all QTouch™ devices, the QT1012 features automatic self-calibration, drift compensation,
and spread-spectrum burst modulation in order to provide for the most reliable touch sensing
possible.
2.2
Basic Operation
Figure 1-1 on page 3 and Figure 1-2 on page 4 show basic circuits for the 6-pin and 8-pin
devices.
The QT1012 employs bursts of charge-transfer cycles to acquire its signal. Burst mode permits
power consumption in the microamp range, dramatically reduces RF emissions, lowers
susceptibility to EMI, and yet permits excellent response time. Internally the signals are digitally
processed to reject impulse noise, using a “consensus” filter which requires four consecutive
confirmations of a detection before the output is activated.
The QT switches and charge measurement hardware functions are all internal to the QT1012.
2.3
Electrode Drive
Figure 2-1 on page 6 shows the sense electrode connections (SNS, SNSK) for the QT1012.
For optimum noise immunity, the electrode should only be connected to the SNSK pin.
In all cases the sample capacitor Cs should be much larger than the load capacitance (Cx).
Typical values for Cx are 5 – 20 pF while Cs is usually 2.2 – 50 nF.
Note: Cx is not a physical discrete component on the PCB, it is the capacitance of the touch
electrode and wiring. It is show in Figure 2-1 on page 6 to aid understanding of the
equivalent circuit.
Increasing amounts of Cx destroy gain, therefore it is important to limit the amount of load
capacitance on both SNS terminals. This can be done, for example, by minimizing trace lengths
and widths and keeping these traces away from power or ground traces or copper pours.
The traces, and any components associated with SNS and SNSK, will become touch sensitive
and should be treated with caution to limit the touch area to the desired location.
To endure that the correct output mode is selected at power-up, the OUT trace should also be
carefully routed.
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A series resistor, Rs, should be placed in line with SNSK to the electrode to suppress
electrostatic discharge (ESD) and electromagnetic compatibility (EMC) effects.
Figure 2-1. Sense Connections
VDD
SENSE
ELECTRODE
Cby
5
VDD
RS
1
3
4
OUT
SNSK
SNS
CS
Cx
6
TIME
VSS
2
2.4
Sensitivity
2.4.1
Introduction
The sensitivity on the QT1012 is a function of things like the value of Cs, electrode size and
capacitance, electrode shape and orientation, the composition and aspect of the object to be
sensed, the thickness and composition of any overlaying panel material, and the degree of
ground coupling of both sensor and object.
2.4.2
Increasing Sensitivity
In some cases it may be desirable to increase sensitivity; for example, when using the sensor
with very thick panels having a low dielectric constant, or when the device is used as a proximity
sensor. Sensitivity can often be increased by using a larger electrode or reducing panel
thickness. Increasing electrode size can have diminishing returns, as high values of Cx will
reduce sensor gain.
The value of Cs also has a dramatic effect on sensitivity, and this can be increased in value with
the trade-off of a slower response time and more power. Increasing the electrode's surface area
will not substantially increase touch sensitivity if its diameter is already much larger in surface
area than the object being detected. Panel material can also be changed to one having a higher
dielectric constant, which will better help to propagate the field.
Ground planes around and under the electrode and its SNSK trace will cause high Cx loading
and destroy gain. The possible signal-to-noise ratio benefits of ground area are more than
negated by the decreased gain from the circuit, and so ground areas around electrodes are
discouraged. Metal areas near the electrode will reduce the field strength and increase Cx
loading and should be avoided, if possible. Keep ground away from the electrodes and traces.
2.4.3
Decreasing Sensitivity
In some cases the QT1012 may be too sensitive. In this case gain can be easily lowered further
by decreasing Cs.
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3. Operation Specifics
3.1
Acquisition Modes
3.1.1
Introduction
The OUT pin of the QT1012 can be configured to be active high or active low.
• If active high then:
– “on” is high
– “off” is low
• If active low then:
– “on” is low
– “off” is high
3.1.2
OUT Pin
The QT1012 runs in Low Power (LP) mode. In this mode it sleeps for approximately 80 ms at the
end of each burst, saving power but slowing response. On detecting a possible key touch, it
temporarily switches to fast mode until either the key touch is confirmed or found to be spurious
(via the detect integration process).
• If the touch is confirmed, the OUT pin is toggled and the QT1012 returns to LP mode (see
Figure 3-1).
• If the touch is not valid then the chip returns to LP mode but the OUT pin remains unchanged
(see Figure 3-2 on page 7).
Figure 3-1. Low Power Mode: Touch Confirmed (Output in Off Condition)
Fast detect
integrator
~80 ms
Sleep
Sleep
Sleep
SNSK
OUT
Figure 3-2. Low Power Mode: Touch Denied (Output in Off Condition)
Fast detect
integrator
~80 ms
Sleep
Sleep
Sleep
Sleep
SNSK
OUT
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3.2
3.3
Detect Threshold
The device detects a touch when the signal has crossed a threshold level. The threshold level is
fixed at 10 counts.
Detect Integrator
It is desirable to suppress detections generated by electrical noise or from quick brushes with an
object. To accomplish this, the QT1012 incorporates a detect integration (DI) counter that
increments with each detection until a limit is reached, after which the output is activated. If no
detection is sensed prior to the final count, the counter is reset immediately to zero. In the
QT1012, the required count is four.
The DI can also be viewed as a “consensus filter” that requires four successive detections to
create an output.
3.4
3.5
Recalibration Timeout
If an object or material obstructs the sense electrode the signal may rise enough to create a
detection, preventing further operation. To stop this, the sensor includes a timer which monitors
detections. If a detection exceeds the timer setting, the sensor performs a full recalibration. This
does not toggle the output state but ensures that the QT1012 will detect a new touch correctly.
The timer is set to activate this feature after ~60s. This will vary slightly with Cs.
Forced Sensor Recalibration
The QT1012 has no recalibration pin; a forced recalibration is accomplished when the device is
powered up or after the recalibration timeout. However, supply drain is low so it is a simple
matter to treat the entire IC as a controllable load; driving the QT1012’s Vdd pin directly from
another logic gate or a microcontroller port will serve as both power and “forced recalibration”.
The source resistance of most CMOS gates and microcontrollers is low enough to provide direct
power without a problem.
3.6
Drift Compensation
Signal drift can occur because of changes in Cx and Cs over time. It is crucial that drift be
compensated for, otherwise false detections, nondetections, and sensitivity shifts will follow.
Drift compensation (Figure 3-3 on page 9) is performed by making the reference level track the
raw signal at a slow rate, but only while there is no detection in effect. The rate of adjustment
must be performed slowly, otherwise legitimate detections could be ignored. The QT1012 drift
compensates using a slew-rate limited change to the reference level; the threshold and
hysteresis values are slaved to this reference.
Once an object is sensed, the drift compensation mechanism ceases since the signal is
legitimately high, and therefore should not cause the reference level to change.
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AT42QT1012
Figure 3-3. Drift Compensation
Signal
Hysteresis
Threshold
Reference
Output
The QT1012's drift compensation is asymmetric; the reference level drift-compensates in one
direction faster than it does in the other. Specifically, it compensates faster for decreasing
signals than for increasing signals. Increasing signals should not be compensated for quickly,
since an approaching finger could be compensated for partially or entirely before even
approaching the sense electrode. However, an obstruction over the sense pad, for which the
sensor has already made full allowance, could suddenly be removed leaving the sensor with an
artificially elevated reference level and thus become insensitive to touch. In this latter case, the
sensor will compensate for the object's removal very quickly.
With large values of Cs and small values of Cx, drift compensation will appear to operate more
slowly than with the converse. Note that the positive and negative drift compensation rates are
different.
3.7
3.8
Response Time
The QT1012's response time is highly dependent on the run mode and burst length, which in
turn is dependent on Cs and Cx. With increasing Cs, response time slows, while increasing
levels of Cx reduce response time.
Spread Spectrum
The QT1012 modulates its internal oscillator by 7.5 percent during the measurement burst.
This spreads the generated noise over a wider band, reducing emission levels. This also
reduces susceptibility since there is no longer a single fundamental burst frequency.
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3.9
Output Polarity Selection
The output (OUT pin) of the QT1012 can be configured to have an active high or active low
output by means of the output configuration resistor Rop. The resistor is connected between the
output and either Vss or Vdd (see Figure 3-4 and Table 3-1). A typical value for Rop is 100 k.
Figure 3-4. Output Polarity (6-pin SOT23)
SENSE
ELECTRODE
VDD
Cby
100 nF
5
RS
VDD
Rop
3
4
Vop
SNSK
SNS
CS
1
OUT
Rm
6
TIME
VSS
2
Table 3-1.
Output Configuration
Name (Vop)
Function (Output Polarity)
Active high
Vss
Vdd
Active low
Note that some devices such as Digital Transistors have an internal biasing network that will
naturally pull the OUT pin to its inactive state. If these are being used then the resistor Rop is not
required (see Figure 3-5).
Figure 3-5. Output Connected to Digital Transistor (6-pin SOT23)
SENSE
ELECTRODE
VDD
Cby
100 nF
5
RS
VDD
Load
3
4
SNSK
SNS
CS
1
OUT
6
Rm
TIME
VSS
2
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AT42QT1012
3.10 Output Drive
3.11 Auto Off Delay
The OUT pin can sink or source up to 2 mA. When a large value of Cs (>20 nF) is used the OUT
current should be limited to <1 mA to prevent gain-shifting side effects, which happen when the
load current creates voltage drops on the die and bonding wires; these small shifts can
materially influence the signal level to cause detection instability.
3.11.1
Introduction
In addition to toggling the output on/off with a key touch, the QT1012 can automatically switch
the output off after a time, typically 10 percent of the nominal stated time. This feature can be
used to save power in situations where the switched device could be left on inadvertently.
The QT1012 has:
• three predefined delay times (Section 3.11.2)
• the ability to set a user-programmed delay (Section 3.11.3 on page 12)
• the ability to override the auto off delay (Section 3.11.5 on page 17)
The TIME and SNS pins are used to configure the Auto Off delay and must always be connected
in one of the ways described in Section 3.11.2.
3.11.2
Auto Off – Predefined Delay
To configure the predefined delay the TIME pin is hard wired to Vss, Vdd or OUT as shown in
Table 3-2 on page 12 and Table 3-3 on page 12. This provides nominal values of 15 minutes, 60
minutes or infinity (remains on until toggled off).
A single 1 M resistor (Rm) is connected between the SNS pin and the logic level Vm to provide
three auto off functions: delay multiplication, delay override and delay retriggering. On power-up
the logic level at Vm is assessed and the delay multiplication factor is set to x1 or x24
accordingly (see Figure 3-6 on page 12, Table 3-2 on page 12 and Table 3-3 on page 12). At
the end of each acquisition cycle the logic level of Vm is monitored to see if an Auto off delay
override is required (see Section 3.11.5 on page 17).
Setting the delay multiplier to x24 will decrease the key sensitivity. To compensate, it may be
necessary to increase the value of Cs.
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Figure 3-6. Predefined Delay
SENSE
ELECTRODE
VDD
Cby
100 nF
5
RS
VDD
3
SNSK
SNS
CS
1
4
OUT
6
TIME
Vt
Rm
VSS
2
Rop
Vm
Table 3-2.
Vt
Predefined Auto-off Delay (Active High Output)
Auto-off Delay (to)
Vss
Infinity (remain on until toggled to off)
15 minutes
Vdd
OUT
60 minutes
Table 3-3.
Vt
Predefined Auto-off Delay (Active Low Output)
Auto-off Delay (to)
Vss
15 minutes
Vdd
Infinity (remain on until toggled to off)
60 minutes
OUT
Table 3-4.
Vm
Auto-off Delay Multiplier
Auto-off Delay Multiplier
to x 1
Vss
Vdd
to x 24
3.11.3
Auto Off – User-programmed Delay
If a user-programmed delay is required, a RC network (resistor and capacitor) can be used to
set the auto-off delay (see Table 3-5 on page 13 and Figure 3-7 on page 13). The delay time is
dependent on the RC time constant (Rt x Ct), the output polarity and the supply voltage.
Section 3.11.4 on page 13 gives full details of how to configure the QT1012 to have auto-off
delay times ranging from minutes to hours.
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AT42QT1012
Figure 3-7. Programmable Delay
SENSE
ELECTRODE
VDD
5
RS
VDD
3
4
SNSK
SNS
CS
1
OUT
Rt
Ct
6
TIME
Rm
VSS
2
Rop
Vm
3.11.4
Configuring the User-programmed Auto-off Delay
The QT1012 can be configured to give auto-off delays ranging from minutes to hours by means
of a simple RC network and the delay multiplier input.
With the delay multiplier set at x1 the auto-off delay is calculated as follows:
Rt Ct
Delay value = integer value of ------------------ x 15 seconds
K
Delay K
And Rt x Ct = --------------------------
15
Note: Rt is in k, Ct is in nF, Delay is in seconds. K values are obtained from Figure 3-8 on
page 14.
Rt Ct
To ensure correct operation it is recommended that the value of ------------------ is between 4 and 240.
K
Values outside this range may be interpreted as the hard wired options TIME linked to OUT and
TIME linked to “off” respectively, causing the QT1012 to use the relevant predefined auto-off
delays.
Table 3-5.
Programmable Auto-off Delay (Example)
Vm = Vss (delay multiplier = 1), Vdd = 3.5V
Output Type
Active high
Active low
Auto Off Delay (Seconds)
(Rt x Ct x 15) / 19
(Rt x Ct x 15) / 22
K values (19 and 22) are obtained from Figure 3-8 on page 14.
Note: Rt is in k, Ct is in nF.
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Figure 3-8. Typical Values of K Versus Supply Voltage
Active Low Output
Active High Output
24
19.4
19.35
23
19.3
22
19.25
19.2
21
19.15
20
19.1
19
19.05
2
2.5
3
3.5
4
4.5
5
2
2.5
3
3.5
4
4.5
5
VDD (Volts)
VDD (Volts)
The charts in Figure 3-8 show typical values of K versus supply voltage for a QT1012 with active
high or active low output.
Example using the formula to calculate Rt and Ct
Requirements:
• Active high output (Vop connected to VSS)
• Auto-off delay nominal 45 minutes
• VDD = 3.5V
Proceed as follows:
1. Calculate Auto-off delay in seconds 45 x 60 = 2700
2. Obtain K from Figure 3-8, K= 22.8
2700 22.8
3. Calculate Rt x Ct = ------------------------------ = 4104
15
4. Decide on a value for Rt or Ct (for example, Ct = 47 nF)
4104
5. Calculate Rt = ------------ = 87 k
47
RtxCt
6. Verify that --------------- = 179 (which is between 4 and 240)
K
As an alternative to calculation, Figure 3-9 and Figure 3-10 on page 16 show charts of typical
curves of auto-off delay against resistor and capacitor values for active high and active low
outputs at various values of VDD (delay multiplier = x1).
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AT42QT1012
Figure 3-9. Auto-off Delay, Active High Output
Vm = Vss (delay multiplier = x1)
5V Active High
4V Active High
3500
4000
3500
3000
2500
2000
1500
1000
500
Ct = 100nF
Ct = 47nF
Ct = 100nF
Ct = 47nF
3000
2500
2000
1500
1000
500
Ct = 22nF
Ct = 22nF
Ct = 10nF
Ct = 10nF
0
0
0
50
100
150
200
250
0
50
100
150
200
250
Timing Resistor Rt (K ohms)
Timing Resistor Rt (K ohms)
3V Active High
Ct = 47nF
2V Active High
4000
3500
3000
2500
2000
1500
1000
500
4000
3500
3000
2500
2000
1500
1000
500
Ct = 22nF
Ct = 100nF
Ct = 47nF
Ct = 22nF
Ct = 100nF
Ct = 10nF
Ct = 10nF
0
0
0
50
100
150
200
250
0
50
100
150
200
250
Timing Resistor Rt (K ohms)
Timing Resistor Rt (K ohms)
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Figure 3-10. Auto-off Delay, Active Low Output
Vm = Vss (delay multiplier = x1)
5V Active Low
4V Active Low
4000
4000
3500
3000
2500
2000
1500
1000
500
Ct = 22nF
Ct = 22nF
Ct = 47nF
Ct = 47nF
3500
3000
Ct = 100nF
Ct = 100nF
2500
2000
Ct = 10nF
Ct = 10nF
1500
1000
500
0
0
0
50
100
150
200
250
0
50
100
150
200
250
Timing Resistor Rt (K ohms)
Timing Resistor Rt (K ohms)
3V Active Low
Ct = 47nF
2V Active Low
Ct = 47nF
3500
3000
2500
2000
1500
1000
500
3500
3000
2500
2000
1500
1000
500
Ct = 22nF
Ct = 22nF
Ct = 100nF
Ct = 100nF
Ct = 10nF
Ct = 10nF
0
0
0
50
100
150
200
250
0
50
100
150
200
250
Timing Resistor Rt (K ohms)
Timing Resistor Rt (K ohms)
Example using a chart to calculate Rt and Ct
Requirements:
• Active low output (Vop connected to VSS)
• Auto-off delay 25 minutes
• VDD = 4V
1. Calculate Auto-off delay in seconds 25 x 60 = 1500.
1500
1
------------
2. Find
= 1500 on the 4V chart in Figure 3-10.
3. This shows the following suitable Ct / Rt combinations:
– 100 nF / 20 k
– 47 nF / 40 k
– 22 nF / 90 k
– 10 nF / 190 k
Note: the Auto-off delay times shown are nominal and will vary from chip to chip and with
capacitor and resistor tolerance.
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3.11.5
Auto Off – Overriding the Auto Off Delay
In normal operation the QT1012 output is turned off automatically after the auto-off delay. In
some applications it may be useful to extend the auto-off delay (“sustain” function) or to switch
the output off immediately (“cancel” function). This can be achieved by pulsing the voltage on
the delay multiplier resistor Rm as shown in Figure 3-11 and Figure 3-12 on page 18.
To ensure the pulse is detected it must be present for typical times as shown in Table 3-6.
Table 3-6.
Time Delay Pulse
Pulse Duration
Action
tp – series of short pulses, typically 65 ms
“Sustain”/retrigger (reload auto-off delay counter)
“Cancel”/switch output to off state and inhibit further
touch detection until Vm returns to original state
tp – long pulse, typically 250 ms
While Vm is held in the override state the QT1012 inhibits bursts and waits for Vm to return to its
original state. When Vm returns to its original state the QT1012 performs a sensor recalibration
before continuing in its current output state.
Figure 3-11. Override Pulse (Delay Multiplier x1)
SENSE
ELECTRODE
VDD
5
RS
VDD
3
4
SNSK
SNS
CS
1
OUT
6
TIME
Rm
VSS
2
Rop
VDD Vm
VSS
Tp
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Figure 3-12. Override Pulse (Delay Multiplier x24)
SENSE
ELECTRODE
VDD
5
RS
VDD
3
4
SNSK
SNS
CS
1
OUT
6
TIME
Rm
VSS
2
Rop
VDD Vm
VSS
Tp
Figure 3-13 shows override pulses being applied to a QT1012 with delay multiplier set to x1.
Figure 3-13. Overriding Auto Off
O
OUT
P
P
P
t
off
Vm
Bursts
SNSK
C
C
C
C
P – override (reload auto off delay)
O – switch output off
C – sensor recalibration
18
AT42QT1012
9543D–AT42–08/10
AT42QT1012
3.12 Examples of Typical Applications
Figure 3-14. Application 1
Active low, driving PNP transistor, auto off time 375s x 24 = 9000s = 2.5 hours
+3V
100nF
Rm
1M
SENSE
ELECTRODE
DTA143
5
VDD
RS
1
3
4
OUT
SNSK
SNS
CS
Rt
Ct
10k
6
TIME
2.2k
Load
47nF
VSS
2
Auto off time obtained from 3V chart in Figure 3-10 on page 16
Figure 3-15. Application 2
Active high, driving high impedance, auto off time 315s x 1 = 5.25 minutes
+5V
100nF
SENSE
ELECTRODE
5
VDD
Rs
1
3
4
OUT
SNSK
SNS
CS
Rt
Ct
10k
6
TIME
Rop
100k
Rm
1M
47nF
VSS
2
Auto off time obtained from 5V chart in Figure 3-9 on page 15
19
9543D–AT42–08/10
4. Circuit Guidelines
4.1
More Information
Refer to Application Note QTAN0002, Secrets of a Successful QTouch™ Design and the Touch
Sensors Design Guide (both downloadable from the Atmel® website), for more information on
construction and design methods.
4.2
Sample Capacitor
Cs is the charge sensing sample capacitor. The required Cs value depends on the thickness of
the panel and its dielectric constant. Thicker panels require larger values of Cs. Typical values
are 2.2 nF to 50 nF depending on the sensitivity required; larger values of Cs demand higher
stability and better dielectric to ensure reliable sensing.
The Cs capacitor should be a stable type, such as X7R ceramic or PPS film. For more consistent
sensing from unit to unit, 5 percent tolerance capacitors are recommended. X7R ceramic types
can be obtained in 5 percent tolerance at little or no extra cost. In applications where high
sensitivity (long burst length) is required the use of PPS capacitors is recommended.
For battery powered operation a higher value sample capacitor may be required.
4.3
4.4
Rs Resistor
Series resistor Rs is in line with the electrode connection and should be used to limit ESD
currents and to suppress radio frequency interference (RFI). It should be approximately
4.7 k to 33 k.
Although this resistor may be omitted, the device may become susceptible to external noise or
RFI. See Application Note QTAN0002, Secrets of a Successful QTouch™ Design, for details of
how to select these resistors.
Power Supply and PCB Layout
See Section 5.2 on page 22 for the power supply range.
If the power supply is shared with another electronic system, care should be taken to ensure that
the supply is free of digital spikes, sags, and surges which can adversely affect the QT1012. The
QT1012 will track slow changes in Vdd, but it can be badly affected by rapid voltage fluctuations.
It is highly recommended that a separate voltage regulator be used just for the QT1012 to isolate
it from power supply shifts caused by other components.
If desired, the supply can be regulated using a Low Dropout (LDO) regulator, although such
regulators often have poor transient line and load stability. See Application Note QTAN0002,
Secrets of a Successful QTouch™ Design, for further information on power supply
considerations.
Parts placement: The chip should be placed to minimize the SNSK trace length to reduce low
frequency pickup, and to reduce stray Cx which degrades gain. The Cs and Rs resistors (see
Figure 1-1 on page 3) should be placed as close to the body of the chip as possible so that the
trace between Rs and the SNSK pin is very short, thereby reducing the antenna-like ability of
this trace to pick up high frequency signals and feed them directly into the chip. A ground plane
can be used under the chip and the associated discrete components, but the trace from the Rs
resistor and the electrode should not run near ground, to reduce loading.
For best EMC performance the circuit should be made entirely with SMT components.
20
AT42QT1012
9543D–AT42–08/10
AT42QT1012
Electrode trace routing: Keep the electrode trace (and the electrode itself) away from other
signal, power, and ground traces including over or next to ground planes. Adjacent switching
signals can induce noise onto the sensing signal; any adjacent trace or ground plane next to, or
under, the electrode trace will cause an increase in Cx load and desensitize the device.
Bypass Capacitor: Important – For proper operation a 100 nF (0.1 µF) ceramic bypass
capacitor must be used directly between Vdd and Vss, to prevent latch-up if there are
substantial Vdd transients; for example, during an ESD event. The bypass capacitor should be
placed very close to the Vss and Vdd pins.
4.5
Power On
On initial power up, the QT1012 requires approximately 250 ms to power on to allow power
supplies to stabilize. During this time the OUT pin state is not valid and should be ignored.
Note that recalibration takes approximately 200 ms, so the QT1012 takes approximately 450 ms
in total from initial power on to become active.
21
9543D–AT42–08/10
5. Specifications
5.1
Absolute Maximum Specifications
Operating temperature
-40°C to +85°C
-55°C to +125°C
0 to +6.5V
Storage temperature
VDD
Max continuous pin current, any control or drive pin
Short circuit duration to Vss, any pin
Short circuit duration to Vdd, any pin
Voltage forced onto any pin
20 mA
Infinite
Infinite
-0.6V to (VDD + 0.6) Volts
CAUTION: Stresses beyond those listed under Absolute Maximum Specifications may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or other conditions beyond those
indicated in the operational sections of this specification is not implied. Exposure to absolute maximum specification
conditions for extended periods may affect device reliability
5.2
Recommended Operating Conditions
VDD
Short-term supply ripple + noise
+1.8 to 5.5V
20 mV
Long-term supply stability
Cs value
100 mV
2.2 to 50 nF
5 to 20 pF
Cx value
5.3
AC Specifications
Vdd = 3.0V, Cs = 10 nF, Cx = 5 pF, Ta = recommended range, unless otherwise noted
Parameter
TRC
Description
Recalibration time
Min
Typ
200
3
Max
Units
ms
Notes
Cs, Cx dependent
TPC
Charge duration
Transfer duration
µs
7.5% spread spectrum variation
7.5% spread spectrum variation
TPT
6
µs
Time between end of burst and
start of the next (Fast mode)
TG1
TG2
2.6
80
ms
ms
Time between end of burst and
start of the next (LP mode)
Increases with decreasing VDD
VDD, Cs and Cx dependent. See
Section 4.2 for capacitor selection.
TBL
Burst length
1.86
ms
ms
TR
Response time
100
22
AT42QT1012
9543D–AT42–08/10
AT42QT1012
5.4
Signal Processing
Vdd = 3.0V, Cs = 10 nF, Cx = 5 pF, Ta = recommended range, unless otherwise noted
Description
Min
Typ
10
2
Max
Units
counts
counts
samples
Notes
Threshold differential
Hysteresis
Consensus filter length
4
5.5
DC Specifications
Vdd = 3.0V, Cs = 4.7 nF, Cx = 5 pF, short charge pulse, Ta = recommended range, unless otherwise noted
Parameter
Description
Supply voltage
Min
Typ
Max
Units
Notes
VDD
1.8
5.5
V
32
36
59
88
124
1.8V
2.0V
3.0V
4.0V
5.0V
IDD
Supply current
µA
VDDS
Supply turn-on slope
Low input logic level
100
V/s
V
Required for proper start-up
0.2 Vdd
0.3 Vdd
Vdd = 1.8V – 2.4V
Vdd = 2.4V – 5.5V
VIL
0.7 Vdd
0.6 Vdd
Vdd = 1.8V – 2.4V
Vdd = 2.4V – 5.5V
VHL
High input logic level
V
VOL
VOH
IIL
Low output voltage
0.6
V
V
OUT, 4 mA sink
High output voltage
Input leakage current
Load capacitance range
Acquisition resolution
VDD-0.7
0
OUT, 1 mA source
1
100
14
µA
pF
bits
CX
AR
9
23
9543D–AT42–08/10
5.6
Mechanical Dimensions
5.6.1
6-pin SOT23
D
A
5
6
4
A2
A1
E
E1
A
Pin #1 ID
C
0.10
SEATING PLANE
A
1
3
2
C
Side View
b
e
Top View
A2
A
C
0.10
SEATING PLANE
c
0.25
C
A1
SEATING PLANE
View A-A
C
SEE VIEW B
O
L
View B
COMMON DIMENSIONS
(Unit of Measure = mm)
MIN
–
MAX
1.45
0.15
1.30
3.00
3.00
1.75
0.55
NOM
–
NOTE
SYMBOL
A
A1
A2
D
E
0
–
0.90
2.80
2.60
1.50
0.30
–
2.90
2.80
1.60
0.45
0.95 BSC
–
2
E1
L
Notes: 1. This package is compliant with JEDEC specification MO-178 Variation AB
2. Dimension D does not include mold Flash, protrusions or gate burrs.
Mold Flash, protrustion or gate burrs shall not exceed 0.25 mm per end.
3. Dimension b does not include dambar protrusion. Allowable dambar
protrusion shall not cause the lead width to exceed the maximum
b dimension by more than 0.08 mm
e
b
0.30
0.09
0°
0.50
0.20
8°
3
c
–
θ
–
4. Die is facing down after trim/form.
6/30/08
GPC
TAQ
DRAWING NO.
TITLE
REV.
6ST1, 6-lead, 2.90 x 1.60 mm Plastic Small Outline
Package Drawing Contact:
packagedrawings@atmel.com
6ST1
A
Package (SOT23)
24
AT42QT1012
9543D–AT42–08/10
AT42QT1012
5.6.2
8-pin UDFN/USON
8x
8
7
6
5
0.05 c
c
0.05 c
E
SIDE VIEW
Pin 1 ID
1
2
3
4
D
A1
TOP VIEW
A
D2
e
5
8
COMMON DIMENSIONS
(Unit of Measure = mm)
K
MIN
MAX
0.60
0.05
0.30
2.05
1.60
2.05
1.00
–
NOM
–
NOTE
SYMBOL
A
–
E2
C0.2
A1
b
0.00
0.20
1.95
1.40
1.95
0.80
–
–
–
D
2.00
1.50
2.00
0.90
0.50
0.30
–
D2
E
L
4
1
b
E2
e
BOTTOM VIEW
L
0.20
0.20
0.40
–
K
1. ALL DIMENSIONS ARE IN mm. ANGLES IN DEGREES.
2. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE
TERMINALS COPLANARITY SHALL NOT EXCEED 0.05 mm.
3. WARPAGE SHALL NOT EXCEED 0.05 mm.
Note:
4. REFER JEDEC MO-236/MO-252
12/17/09
GPC
YAG
DRAWING NO.
TITLE
REV.
8PAD, 2x2x0.6 mm body, 0.5 mm pitch,
Package Drawing Contact:
0.9x1.5 mm exposed pad, Saw singulated
8MA4
A
packagedrawings@atmel.com
Thermally enhanced plastic ultra thin dual flat
no lead package (UDFN/USON)
25
9543D–AT42–08/10
5.7
Part Marking
5.7.1
AT42QT1012– 6-pin SOT23-6
Abbreviated
Part Number:
1012
Pin 1 ID
AT42QT1012
5.7.2
AT42QT1012– 8-pin UDFN/USON
Abbreviated
Part Number:
AT42QT1012
Die Revision
(Example: “E” shown)
1012
Class code
(H = Industrial,
green NiPdAu)
Assembly Location
Code
(Example: “C” shown)
HEC
YZZ
Pin 1 ID
Lot Number Trace
code (Variable text)
Pin 1
Last Digit of Year
(Variable text)
5.8
5.9
Part Number
Part Number
Description
AT42QT1012-TSHR
AT42QT1012-MAH
6-pin SOT23 RoHS compliant IC
8-pin UDFN/USON RoHS compliant IC
Moisture Sensitivity Level (MSL)
MSL Rating
Peak Body Temperature
Specifications
MSL1
260oC
IPC/JEDEC J-STD-020
26
AT42QT1012
9543D–AT42–08/10
AT42QT1012
Associated Documents
• Application Note – QTAN0002, Secrets of a Successful QTouch™ Design
• User Guide – Touch Sensors Design Guide
Revision History
Revision No.
History
Revision A – August 2009
Revision B – September 2009
Revision C – May 2010
Revision D – August 2010
Initial release for chip revision 2.4
Changes to Cs value.
Updated for chip revision 3.1
Updated for chip revision 3.3
27
9543D–AT42–08/10
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9543D–AT42–08/10
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