AT60142FT-DS15MSV [ATMEL]
Rad Hard 512K x 8 5V Tolerant Very Low Power CMOS SRAM; 抗辐射512K ×8 5V容限非常低功耗CMOS SRAM
| 型号： | AT60142FT-DS15MSV |
| 厂家： | 
ATMEL |
| 描述： | Rad Hard 512K x 8 5V Tolerant Very Low Power CMOS SRAM |
| 文件： | 总13页 (文件大小：347K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• Operating Voltage: 3.3V, 5V tolerant
• Access Time:
– 17 ns
– 15 ns
• Very Low Power Consumption
– Active: 610 mW (Max) @ 17 ns(1), 540 mW (Max) @ 25 ns
– Standby: 3.3 mW (Typ)
• Wide Temperature Range: -55 to +125°C
• TTL-Compatible Inputs and Outputs
• Asynchronous
• Designed on 0.25 µm Radiation Hardened Process
• No Single Event Latch Up below LET Threshold of 80 MeV/mg/cm2
• Tested up to a Total Dose of 300 krads (Si) according to MIL-STD-883 Method 1019
• 500 Mils Wide FP36 Package
Rad Hard
512K x 8
5V Tolerant
Very Low Power
CMOS SRAM
• ESD Better than 2000V
• Quality Grades: ESCC with 9301/052, QML-Q or V with smd 5962-05208
Note:
1. 650 mW (Max) @ 15 ns
Description
The AT60142FT is a very low power CMOS static RAM organized as 512K x 8 bits.
Atmel brings the solution to applications where fast computing is as mandatory as low
consumption, such as aerospace electronics, portable instruments, or embarked
systems.
AT60142FT
Utilizing an array of six transistors (6T) memory cells, the AT60142FT combines an
extremely low standby supply current (Typical value = 1 mA) with a fast access time at
15 ns over the full military temperature range. The high stability of the 6T cell provides
excellent protection against soft errors due to noise.
The AT60142FT is processed according to the methods of the latest revision of the
MIL PRF 38535 or ESCC 9000.
It is produced on a radiation hardened 0.25 µm CMOS process.
Rev. 7726B–AERO–04/09
1
AT60142FT
Block Diagram
Pin Configuration
A0
A1
NC
1
2
3
4
5
6
7
8
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
A18
A17
A2
A3
A16
A15
A4
CS
OE
I/O1
I/O8
I/O7
GND
I/O2
Vcc
9
10
11
12
13
14
15
16
17
18
GND
I/O3
I/O4
WE
Vcc
I/O6
I/O5
A14
A5
A6
A7
A8
A9
A13
A12
A11
A10
N/C
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7726B–AERO–04/09
Pin Description
Table 1. Pin Names
Name
Description
Address Inputs
Data Input/Output
Chip Select
A0 - A18
I/O1 - I/O8
CS
WE
Write Enable
Output Enable
Power Supply
Ground
OE
Vcc
GND
Table 2. Truth Table(1)
CS
WE
OE
Inputs/Outputs
Mode
Deselect/
H
X
X
Z
Power-down
L
L
L
H
L
L
X
H
Data Out
Data In
Z
Read
Write
H
Output Disable
Note:
1. L=low, H=high, X= L or H, Z=high impedance.
3
AT60142FT
7726B–AERO–04/09
AT60142FT
Electrical Characteristics
Absolute Maximum Ratings*
*NOTE:
Stresses beyond those listed under "Abso-
lute Maximum Ratings” may cause perma-
nent damage to the device. This is a stress
rating only and functional operation of the
device at these or any other conditions
beyond those indicated in the operational
sections of this specification is not implied.
Exposure between recommended DC
operating and absolute maximum rating
conditions for extended periods may
affect device reliability.
Supply Voltage to GND Potential: ....................... -0.5V + 4.6V
Voltage range on any input: ...................... GND -0.5V to 7.0V
Voltage range on any ouput: ..................... GND -0.5V to 4.6V
Storage Temperature: ................................. -65°C to + 150°C
Output Current from Output Pins: ................................ 20 mA
Electro Statics Discharge Voltage: ............................ > 2000V
(MIL STD 883D Method 3015.3)
Military Operating Range
Operating Voltage
3.3 + 0.3V
Operating Temperature
Military
-55°C to + 125°C
Recommended DC Operating Conditions
Parameter
Description
Min
Typ
3.3
0.0
0.0
–
Max
3.6
Unit
V
Vcc
Supply voltage
Ground
3
0.0
GND
VIL
0.0
V
Input low voltage
Input high voltage
GND - 0.3
2.2
0.8
V
VIH
5.5(1)
V
Note:
1. 5.8V in transient conditions.
Capacitance
Parameter
Description
Min
–
Typ
–
Max
12
Unit
pF
(1)
Cin
Input capacitance
Output capacitance
(1)
Cout
–
–
12
pF
Note:
1. Guaranteed but not tested.
4
7726B–AERO–04/09
DC Parameters
Parameter
Description
Minimum
Typical
Maximum
Unit
IIX (1)
Input leakage current
-1
–
1
μA
Output leakage
current
IOZ(1)
-1
–
–
–
–
1
2
μA
μA
μA
Input Leakage
Current
IIH(2) at 5.5V
Output Leakage
Current
IOZH(2) at 5.5V
–
1.5
VOL(3)
VOH(4)
Output low voltage
Output high voltage
–
–
–
0.4
–
V
V
2.4
1.
2.
3.
GND < VIN < VCC, GND < VOUT < VCC Output Disabled.
VIN = 5.5V, VOUT = 5.5V, Output Disabled.
VCC min. IOL = 6 mA
4.
VCC min. IOH = -4 mA.
Consumption
TAVAV/TAVAW
Test Condition
Symbol
Description
AT60142FT-17
AT60142FT-15
Unit
Value
Standby Supply
Current
(1)
ICCSB
–
–
2
2.5
2
mA
max
max
Standby Supply
Current
(2)
ICCSB1
1.8
mA
mA
15 ns
17 ns
25 ns
50 ns
-
180
170
150
75
Dynamic
Operating
Current
170
150
75
ICCOP(3) Read
max
max
10
10
1 µs
15 ns
17 ns
25 ns
50 ns
-
150
145
130
120
100
Dynamic
Operating
Current
145
130
120
100
ICCOP(4) Write
mA
1 µs
1.
2.
3.
4.
CS >VIH
CS > VCC - 0.3V
F = 1/TAVAV, Iout = 0 mA, WE = OE = VIH, VIN = GND/VCC, VCC max.
F = 1/TAVAW, Iout = 0 mA, WE = VIL, OE = VIH , VIN = GND/VCC, VCC max.
5
AT60142FT
7726B–AERO–04/09
AT60142FT
Data Retention Mode
Atmel CMOS RAM's are designed with battery backup in mind. Data retention voltage
and supply current are guaranteed over temperature. The following rules insure data
retention:
1. During data retention chip select CS must be held high within VCC to VCC -0.2V.
2. Output Enable (OE) should be held high to keep the RAM outputs high imped-
ance, minimizing power dissipation.
3. During power-up and power-down transitions CS and OE must be kept between
VCC + 0.3V and 70% of VCC.
4. The RAM can begin operation > tR ns after VCC reaches the minimum operation
voltages (3V).
Figure 1. Data Retention Timing
Data Retention Characteristics
Parameter
Description
Min
Typ TA = 25°C
Max
Unit
VCCDR
VCC for data retention
2.0
–
–
V
Chip deselect to data
retention time
tCDR
0.0
–
–
–
–
ns
ns
Operation recovery
time
(1)
tR
tAVAV
1.5 (AT60142FT-15)
1.3 (AT60142FT-17)
(2)
ICCDR
Data retention current
–
0.700
mA
1.
2.
TAVAV = Read cycle time.
CS = VCC, VIN = GND/VCC
.
6
7726B–AERO–04/09
AC Characteristics
Temperature Range:................................................ -55 +125°C
Supply Voltage:........................................................ 3.3 +0.3V
Input Pulse Levels:.................................................. GND to 3.0V
Input Rise and Fall Times:....................................... 3ns (10 - 90%)
Input and Output Timing Reference Levels:............ 1.5V
Output Loading IOL/IOH:............................................ See Figure 1
Figure 2. AC Test Loads Waveforms
7
AT60142FT
7726B–AERO–04/09
AT60142FT
Write Cycle
Symbol
Parameter
AT60142FT-17
AT60142FT-15
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Value
min
min
min
min
min
max
min
min
min
min
TAVAW
TAVWL
TAVWH
TDVWH
TELWH
TWLQZ
TWLWH
TWHAX
TWHDX
TWHQX
Write cycle time
17
0
15
0
Address set-up time
Address valid to end of write
Data set-up time
8
8
7
7
CS low to write end
Write low to high Z(1)
Write pulse width
12
7
10
6
8
8
Address hold from end of write
Data hold time
0
0
0
0
Write high to low Z(1)
3
3
Notes: 1. Parameters guaranteed, not tested, with output loading 5 pF. (See “AC Test Loads Waveforms” on page 7.)
Figure 3. Write Cycle 1. WE Controlled, OE High During Write
E
Figure 4. Write Cycle 2. WE Controlled, OE Low
E
8
7726B–AERO–04/09
Figure 5. Write Cycle 3. CS Controlled
E
Note:
The internal write time of the memory is defined by the overlap of CS Low and W LOW. Both signals must be activated to initiate
a write and either signal can terminate a write by going in active mode. The data input setup and hold timing should be refer-
enced to the active edge of the signal that terminates the write.
Data out is high impedance if OE= VIH.
9
AT60142FT
7726B–AERO–04/09
AT60142FT
Read Cycle
Symbol
Parameter
AT60142FT-17
AT60142FT-15
Unit
Value
min
TAVAV
Read cycle time
17
17
5
15
15
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
TAVQV
TAVQX
TELQV
TELQX
TEHQZ
TGLQV
TGLQX
TGHQZ
Address access time
Address valid to low Z
Chip-select access time
CS low to low Z(1)
max
min
17
5
15
5
max
min
CS high to high Z(1)
Output Enable access time
OE low to low Z(1)
7
6
max
max
min
8
6
2
2
OE high to high Z (1)
6
5
max
Note:
1. Parameters guaranteed, not tested, with output loading 5 pF. (See “AC Test Loads Waveforms” on page 7.)
Figure 6. Read Cycle nb 1: Address Controlled (CS = OE = VIL, WE = VIH)
Figure 7. Read Cycle nb 2: Chip Select Controlled (WE = VIH)
10
7726B–AERO–04/09
Ordering Information
Part Number
Temperature Range
Speed
Package
Flow
AT60142FT-DC17M-E
5962-0520801QXC
25°C
17 ns/5V tol.
17 ns/5V tol.
17 ns/5V tol.
17 ns/5V tol.
17 ns/5V tol.
17 ns/5V tol.
17 ns/5V tol.
17 ns/5V tol.
17 ns/5V tol.
17 ns/5V tol.
17 ns/5V tol.
17 ns/5V tol.
15 ns/5V tol.
15 ns/5V tol.
15 ns/5V tol.
15 ns/5V tol.
15 ns/5V tol.
15 ns/5V tol.
15 ns/5V tol.
FP36.5
FP36.5
Engineering Samples
QML Q
-55° to +125°C
-55° to +125°C
-55° to +125°C
-55° to +125°C
25°C
5962-0520801VXC
FP36.5
QML V
5962R0520801VXC
FP36.5
QML V RHA
ESCC
930105201
FP36.5
AT60142FT-DS17M-E
5962-0520801QYC
FP36.5 grounded lid
FP36.5 grounded lid
FP36.5 grounded lid
FP36.5 grounded lid
FP36.5 grounded lid
Die
Engineering Samples
QML Q
-55° to +125°C
-55° to +125°C
-55° to +125°C
-55° to +125°C
25°C
5962-0520801VYC
QML V
5962R0520801VYC
QML V RHA
ESCC
AT60142FT-DS17ESCC(3)
AT60142FT-DD17M-E(1)
AT60142FT-DD17MSV(1) (2)
AT60142FT-DS15M-E(1)
AT60142FT-DS15MMQ(1) (2)
AT60142FT-DS15MSV(1) (2)
AT60142FT-DS15MSR(1) (2)
AT60142FT-DS15ESCC(3)
AT60142FT-DD15M-E(1)
AT60142FT-DS15MSV
Engineering Samples
QML V
-55° to +125°C
25°C
Die
FP36.5 grounded lid
FP36.5 grounded lid
FP36.5 grounded lid
FP36.5 grounded lid
FP36.5 grounded lid
Die
Engineering Samples
QML Q
-55° to +125°C
-55° to +125°C
-55° to +125°C
-55° to +125°C
25°C
QML V
QML V RHA
ESCC
Engineering Samples
QML V
-55° to +125°C
Die
Note:
1. Contact Atmel for availability.
2. Will be replaced by SMD part number when available.
3. Will be replaced by ESCC part number when available.
11
AT60142FT
7726B–AERO–04/09
AT60142FT
Package Drawings
36-lead Flat Pack (500 Mils)
Notes: 1. package DC : lid is NOT connected to GROUND
2. package DS : lid is connected to GROUND
Document Revision
History
Changes from
1. Update of Absolute Maximum Ratings section
Rev. A to Rev. B
12
7726B–AERO–04/09
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7726B–AERO–04/09
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