AT97SC3203S-X5M40 [ATMEL]
Trusted Platform Module; 可信平台模块
| 型号： | AT97SC3203S-X5M40 |
| 厂家： | 
ATMEL |
| 描述： | Trusted Platform Module |
| 文件： | 总8页 (文件大小：212K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• Full Trusted Computing Group (TCG) Trusted Platform Module (TPM) Version 1.2
Compatibility
• Single-chip Turnkey Solution
• Hardware Asymmetric Crypto Engine
• 2048-bit RSA Sign in 500 ms
• AVR® RISC Microprocessor
• Internal EEPROM Storage for RSA Keys
• 100 kHz System Management Bus (SMBus™) Two-wire Interface
• Secure Hardware and Firmware Design and Chip Layout
• True Random Number Generator (RNG) - FIPS 140-2 Compliant
• NV Storage Space for 1280 bytes of user defined data
• 3.3V ±10% Supply Voltage
Trusted
Platform
Module
• 28-lead TSSOP Package or 40-lead QFN Package
• 0–70°C Temperature Range
Description
The AT97SC3203S is a fully integrated security module designed to be integrated into
embedded systems. It implements version 1.2 of the Trusted Computing Group (TCG)
specification for Trusted Platform Modules (TPM).
AT97SC3203S
The TPM includes a cryptographic accelerator capable of computing a 2048-bit RSA
signature in 500 ms and a 1024-bit RSA signature in 100 ms. Performance of the
SHA-1 accelerator is 50 µs per 64-byte block. In most cases, TCG key generation
operations will be completed using a proprietary mechanism in less than 1 msec.
SMBus
Two-Wire
Interface
Table 1. Pin Configurations
Pin Name
VCC
Description
3.3V (±10%) Supply Voltage
Standby 3.3V (± 10%) Supply Voltage
2.5–4.0V Battery Input
Ground
Summary
SB3V
VBAT
GND
RESET#
SMBDAT
SMBCLK
AVRCLK
Xtall/32K in
XtalO
Reset Input Active Low
SMBus Data Input/Output
SMBus Clock Input
33-MHz AVR Clock Input
32.768 kHz Crystal Input
32.768 kHz Crystal Output
General Purpose Input/Output
Test Input (disabled)
Test Input (disabled)
No Connect
GPIO6
TestI
TestBI
NC
NBO
Not Bonded Out
5132AS–TPM–1/07
Note: This is a summary document. A complete document
is available through your local Atmel sales office.
Figure 1. Pin Configurations
28-pin TSSOP
40-pin QFN
6.0 mm x 6.0 mm Body
0.50 mm Pitch
6.1 mm x 9.7 mm Body
0.65 mm Pitch
SMBDAT
SMBCLK
NC
1
28
NC
2
27
26
25
24
23
22
21
20
19
18
17
16
15
NC
40 39 38 37 36 35 34 33 32 31
3
NC
NC
GND
1
2
3
4
5
6
7
8
9
10
30
29
28
27
26
25
24
23
22
21
NC
GND
4
GND
GND
SB3V
GPIO6
NC
5
VCC
SB3V
GPIO6
NC
V
CC
6
NC
NC
7
NC
TestI
8
AVRCLK
NC
NC
TestBI
9
TestI
AVRCLK
NC
VCC
10
11
12
13
14
V
CC
TestBI
GND
GND
NC
V
CC
V
CC
VBAT
Xtall/32K in
XtalO
RESET#
NC
GND
GND
NC
V
BAT
11 12 13 14 15 16 17 18 19 20
Figure 2. AT97SC3203S Block Diagram
ROM
Program
EEPROM
Program
AVR
8-Bit RISC
CPU
33 MHz
AVR
Clock Input
SRAM
EEPROM
Data
SMBDAT
SMBus Interface
SMBCLK
GPIO
GPIO6
RNG
CRYPTO
Engine
VBAT
RTC
32.768 kHz
(Optional)
Timer
Physical
Security
Circuitry
2
AT97SC3203S
5132AS–TPM–1/07
AT97SC3203S
Description (continued)
Communication to and from the TPM occurs through a modified 100-kHz SMBus two-
wire interface. The TPM includes a hardware random number generator, including a
FIPS-approved Pseudo Random Number Generator, that is used for key generation and
TCG protocol functions. The RNG is also available to the system to generate random
numbers that may be needed during normal operation.
The chip uses a dynamic internal memory management scheme to store multiple RSA
keys. Other than the standard TCG commands (TPM_FlushSpecific, TPM_Loadkey2),
no system intervention is required to manage this internal key cache.
Full documentation for TCG primitives can be found on the TCG Web site located at
www.trustedcomputinggroup.org. This specification includes only mechanical, electrical
and SMBus protocol information
3
5132AS–TPM–1/07
Table 2. Ordering Information
Ordering Code
Package
Operation Range
AT97SC3203S-X5A40
AT97SC3203S-X5M40
28A3 (28-pin TSSOP)
40ML1 (40-pin QFN)
lead-free, RoHS
lead-free, RoHS
Commercial (0° to 70° C)
Commercial (0° to 70° C)
4
AT97SC3203S
5132AS–TPM–1/07
AT97SC3203S
Package Drawing
28A3 – TSSOP
b
L
L1
E1
E
e
End View
Top View
COMMON DIMENSIONS
(Unit of Measure = mm)
D
MIN
MAX
NOM
9.70
NOTE
SYMBOL
A2
A
D
9.60
9.80
2, 5
E
8.10 BSC
6.10
E1
A
6.00
–
6.20
1.20
1.05
0.30
3, 5
4
Side View
–
A2
b
0.80
0.19
1.00
–
e
0.65 BSC
0.60
L
0.45
0.75
L1
1.00 REF
Notes: 1. This drawing is for general information only. Please refer to JEDEC Drawing MO-153, Variation DB for additional information.
2. Dimension D does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed
0.15 mm (0.006 in) per side.
3. Dimension E1 does not include inter-lead Flash or protrusions. Inter-lead Flash and protrusions shall not exceed 0.25 mm (0.010 in)
per side.
4. Dimension b does not include Dambar protrusion. Allowable Dambar protrusion shall be 0.08 mm total in excess of the b
dimension at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between
protrusion and adjacent lead is 0.07 mm.
5. Dimension D and E1 to be determined at Datum Plane H.
1/8/02
DRAWING NO.
28A3
TITLE
REV.
2325 Orchard Parkway
San Jose, CA 95131
28A3, 28-lead, 6.1 x 9.7 mm Body, 0.65 pitch,
Thin Shrink Small Outline Package (TSSOP)
A
R
5
5132AS–TPM–1/07
40ML1 - QFN
A
A1
A3
D
N
A2
1
2
3
Pin 1 Indicator
E
Top View
L
0
Side View
COMMON DIMENSIONS
(Unit of Measure = mm)
D2
MIN
MAX
NOM
6.00 BSC
6.00 BSC
4.10
NOTE
SYMBOL
D
E2
E
D2
E2
A
3.95
3.95
-
4.25
4.25
0.90
0.05
0.70
1
4.10
2
0.85
b
3
A1
A2
A3
L
0.0
-
0.01
0.65
N
0.20 REF
0.40
e
0.30
0.18
0.50
0.30
e
0.50 BSC
0.23
PIN1 ID
b
2
Bottom View
Notes:
1. This drawing is for general information only. Refer to JEDEC Drawing MO-220, Variation WJJD-2, for proper dimensions,
tolerances, datums, etc.
2. Dimension b applies to metallized terminal and is measured between 0.15 mm and 0.30 mm from the terminal tip. If the
terminal has the optional radius on the other end of the terminal, the dimension should not be measured in that radius area.
3/9/04
DRAWING NO. REV.
TITLE
2325 Orchard Parkway
San Jose, CA 95131
40ML1, 40-lead 6.0 x 6.0 mm Body, 0.50 mm Pitch, Molded Quad
Flat No Lead Package (MLF2)
40ML1
A
R
6
AT97SC3203S
5132AS–TPM–1/07
AT97SC3203S
Revision History
Doc. Rev.
Date
Comments
Implemented revision history
Added ‘Summary’ to page 1
5132AS
1/2007
Revised summary disclaimer text on page 1
7
5132AS–TPM–1/07
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5132AS–TPM–1/07
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