ATF16V8CZ-15PI [ATMEL]
High Performance E2 PLD; 高性能可编程逻辑器件E2
| 型号： | ATF16V8CZ-15PI |
| 厂家： | 
ATMEL |
| 描述： | High Performance E2 PLD |
| 文件： | 总10页 (文件大小：384K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
Industry Standard Architecture
•
Emulates Many 20-Pin PALs
Low Cost Easy-to-Use Software Tools
High Speed Electrically Erasable Programmable Logic Devices
•
12 ns Maximum Pin-to-Pin Delay
Low Power - 25 µA Standby Power
CMOS and TTL Compatible Inputs and Outputs
•
•
Input and I/O Pin Keeper Circuits
Advanced Flash Technology
•
High
Reprogrammable
100% Tested
Performance
E2 PLD
High Reliability CMOS Process
•
20 Year Data Retention
100 Erase/Write Cycles
2,000V ESD Protection
200 mA Latchup Immunity
Commercial and Industrial Temperature Ranges
Dual Inline and Surface Mount Packages in Standard Pinouts
•
•
ATF16V8CZ
Block Diagram
Pin Configurations
Pin Name
Function
TSSOP Top View
CLK
I
Clock
ATF16V8CZ
Logic Inputs
Bidirectional Buffers
Output Enable
+5V Supply
I/CLK
I1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
CC
I/O
OE
VCC
I/O
I2
I/O
I3
I/O
I4
I/O
I5
I/O
I6
I/O
I7
I/O
I8
I/O
GND
I9/OE
DIP/SOIC
PLCC
Vcc
I/CLK
1
20
19
18
17
16
15
14
13
12
Vcc
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/CLK
I1
I/O
I2 I1
2
3
4
5
6
7
8
9
1
I2
I3
I4
I5
I6
I7
I8
I3
I4
I5
I6
I7
I/O
I/O
6
16 I/O
I/O
I/O
11
I8
I/O I/O
10
11
GND
I9/OE
GND I9/OE
Top view
Rev. 0453C/V16FZ-C–04/98
Description (Continued)
The ATF16V8CZ is a high performance EECMOS Pro-
grammable Logic Device which utilizes Atmel’s proven
electrically erasable Flash memory technology. Speeds
down to 12 ns and a 25 µA edge-sensing power down
mode are offered. All speed ranges are specified over the
full 5V ± 10% range for industrial temperature ranges; 5V
± 5% for commercial range 5-volt devices.
modes of operation, configured automatically with soft-
ware, allow highly complex logic functions to be realized.
The ATF16V8CZ can significantly reduce total system
power, thereby enhancing system reliability and reducing
power supply costs. When all the inputs and internal
nodes are not switching, supply current drops to less than
25 µA. This automatic power down feature allows for
power savings in slow clock systems and asynchronous
applications. Also, the pin keeper circuits eliminate the
need for internal pull-up resistors along with their atten-
dant power consumption.
The ATF16V8CZ incorporates a superset of the generic
architectures, which allows direct replacement of the 16R8
family and most 20-pin combinatorial PLDs. Eight outputs
are each allocated eight product terms. Three different
Absolute Maximum Ratings*
*NOTICE: Stresses beyond those listed under “Absolute Maxi-
mum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the
device at these or any other conditions beyond those indi-
cated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions
for extended periods may affect device reliability.
Temperature Under Bias................... -40°C to +85°C
Storage Temperature...................... -65°C to +150°C
Voltage on Any Pin with
(1)
Respect to Ground......................... -2.0V to +7.0V
Voltage on Input Pins
with Respect to Ground
During Programming.................... -2.0V to +14.0V
Note:
(1)
1. Minimum voltage is -0.6V dc, which may undershoot to -
2.0V for pulses of less than 20 ns. Maximum output pin
voltage is Vcc + 0.75V dc, which may overshoot to 7.0V
for pulses of less than 20 ns.
Programming Voltage with
Respect to Ground....................... -2.0V to +14.0V
(1)
DC and AC Operating Conditions
Commercial
0°C - 70°C
5V ± 5%
Industrial
-40°C - 85°C
5V ± 10%
Operating Temperature (Case)
Power Supply
V
CC
2
ATF16V8CZ
ATF16V8CZ
DC Characteristics
Symbol Parameter
Condition
0 ≤ V ≤ V (MAX)
Min
Typ
Max
Units
Input or I/O Low
I
IL
-10
µA
IN
IL
Leakage Current
Input or I/O High
Leakage Current
I
3.5 ≤ V ≤ V
CC
10
µA
IH
IN
15 MHz, V = MAX, Com.
95
105
25
mA
mA
µA
CC
I
Power Supply Current
V
Open
= 0, V
Outputs
CC1
IN
CC,
Ind.
MHz, V = MAX,
Com.
Ind.
5
5
CC
Power Supply Current,
Standby Mode
(1)
I
I
V
= 0, V
Outputs
CC
IN
CC,
50
µA
Open
Output Short Circuit
Current
V
= 0.5V; V =
CC
OUT
-150
0.8
mA
OS
5V; TA = 25°C
V
V
Input Low Voltage
Input High Voltage
MIN < V < MAX
-0.5
2.0
V
V
IL
CC
V
+ 1
CC
IH
V
= MIN; All Outputs
= -16 mA
CC
V
V
Output Low Current
Output High Current
Com., Ind.
0.5
V
V
OL
I
OL
V
= MIN
= -3.2 mA
CC
2.4
OH
I
OL
Com.
24
12
4
I
I
Output Low Current
Output High Current
V
= MIN
mA
mA
OL
CC
Ind.
V
= MIN
Com., Ind.
OH
CC
Note: 1. All ICC parameters measured with outputs open.
AC Waveforms (1)
Note: 1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified.
3
AC Characteristics
-12
-15
Symbol Parameter
Min
3
Max
12
6
Min
3
Max
15
8
Units
ns
t
t
t
t
t
t
t
Input or Feedback to Non-Registered Output
Clock to Feedback
PD
CF
CO
S
ns
Clock to Output
2
10
0
8
2
12
0
10
ns
Input or Feedback Setup Time
Input Hold Time
ns
ns
H
Clock Period
12
6
16
8
ns
P
Clock Width
ns
W
External Feedback 1/(t + t
)
55
62
83
45
50
62
MHz
MHz
MHz
S
CO
F
MAX
Internal Feedback 1/(t + t
)
S
CF
No Feedback 1/(t )
P
Input to Output Enable —
Product Term
t
t
3
2
12
15
3
2
15
15
ns
ns
EA
Input to Output Disable —
Product Term
ER
t
t
OE pin to Output Enable
OE pin to Output Disable
2
12
12
2
15
15
ns
ns
PZX
1.5
1.5
PXZ
4
ATF16V8CZ
ATF16V8CZ
Input Test Waveforms and
Measurement Levels:
Output Test Loads
t , t < 1.5 ns (10% to 90%)
R
F
Note: Similar devices are tested with slightly different loads.
These load differences may affect output signals’ delay and
slew rate. Atmel devices are tested with sufficient margins
to meet compatible devices.
Pin Capacitance (f = 1 MHz, T = 25°C) (1)
Typ
Max
8
Units
pF
Conditions
C
C
5
6
V
V
= 0V
IN
IN
8
pF
= 0V
OUT
OUT
Note: 1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
Power Up Reset
The ATF16V8CZ’s registers are designed to reset during
power up. At a point delayed slightly from V
crossing
CC
V
, all registers will be reset to the low state. As a result,
RST
the registered output state will always be high on power-
up.
This feature is critical for state machine initialization. How-
ever, due to the asynchronous nature of reset and the un-
certainty of how V actually rises in the system, the fol-
CC
lowing conditions are required:
1) The V rise must be monotonic, from below .7 volts,
CC
2) After reset occurs, all input and feedback setup times
must be met before driving the clock term high, and
Parameter Description
Typ
Max
Units
3) The signals from which the clock is derived must re-
Power-Up
Reset Time
t
600
1,000
4.5
ns
PR
main stable during t
.
PR
Power-Up
Reset
V
3.8
V
RST
Voltage
5
Registered Output Preload
Security Fuse Usage
The ATF16V8CZ’s registers are provided with circuitry to
allow loading of each register with either a high or a low.
This feature will simplify testing since any state can be
forced into the registers to control test sequencing. A
JEDEC file with preload is generated when a source file
with vectors is compiled. Once downloaded, the JEDEC
file preload sequence will be done automatically by ap-
proved programmers.
A single fuse is provided to prevent unauthorized copying
of the ATF16V8CZ fuse patterns. Once programmed, fuse
verify and preload are inhibited. However, the 64-bit User
Signature remains accessible.
The security fuse should be programmed last, as its effect
is immediate.
Input and I/O Pin Keeper Circuits
The ATF16V8CZ contains internal input and I/O pin
keeper circuits. These circuits allow each ATF16V8CZ pin
to hold its previous value even when it is not being driven
by an external source or by the device’s output buffer. This
helps insure that all logic array inputs are at known, valid
logic levels. This reduces system power by preventing
pins from floating to indeterminate levels. By using pin
keeper circuits rather than pull-up resistors, there is no DC
current required to hold the pins in either logic state (high
or low).
These pin keeper circuits are implemented as weak feed-
back inverters, as shown in the Input Diagram below.
These keeper circuits can easily be overdriven by stand-
ard TTL- or CMOS-compatible drivers. The typical over-
drive current required is 40 µA.
I/O Diagram
Input Diagram
Compiler Mode Selection
Registered
Complex
P16V8C
Simple
Auto Select
P16V8
P16V8R
P16V8AS
G16V8AS
GAL16V8_C8
“Simple”
ABEL, Atmel-ABEL
CUPL
G16V8MS
GAL16V8_R
“Registered”
P16V8R
G16V8MA
GAL16V8_C7
“Complex”
P16V8C
G16V8A
GAL16V8
GAL16V8A
P16V8A
(1)
(1)
(1)
LOG/iC
OrCAD-PLD
PLDesigner
Tango-PLD
P16V8C
G16V8R
G16V8C
G16V8AS
G16V8
Note: 1. Only applicable for version 3.4 or lower.
6
ATF16V8CZ
ATF16V8CZ
7
8
ATF16V8CZ
ATF16V8CZ
9
Ordering Information
t
t
t
CO
(ns)
PD
S
Ordering Code
Package
Operation Range
(ns)
(ns)
12
10
8
ATF16V8CZ-12JC
ATF16V8CZ-12PC
ATF16V8CZ-12SC
ATF16V8CZ-12XC
20J
Commercial
(0°C to 70°C)
20P3
20S
20X
15
12
12
10
10
ATF16V8CZ-15JC
ATF16V8CZ-15PC
ATF16V8CZ-15SC
ATF16V8CZ-15XC
20J
Commercial
(0°C to 70°C)
20P3
20S
20X
ATF16V8CZ-15JI
ATF16V8CZ-15PI
ATF16V8CZ-15SI
ATF16V8CZ-15XI
20J
Industrial
(-40°C to 85°C)
20P3
20S
20X
Package Type
20J
20-Lead, Plastic J-Leaded Chip Carrier (PLCC)
20P3
20S
20-Lead, 0.300" Wide, Plastic Dual Inline Package (PDIP)
20-Lead, 0.300" Wide, Plastic Gull Wing Small Outline (SOIC)
20-Lead, 4.4 mm Wide, Plastic Thin Shrink Small Outline (TSSOP)
20X
10
ATF16V8CZ
相关型号：
©2020 ICPDF网 联系我们和版权申明