ATF2500C-15NM/883 [ATMEL]
EE PLD, 15ns, 24-Cell, CMOS, CQCC44, 0.600 INCH, CERAMIC, LCC-44;
| 型号： | ATF2500C-15NM/883 |
| 厂家： | 
ATMEL |
| 描述： | EE PLD, 15ns, 24-Cell, CMOS, CQCC44, 0.600 INCH, CERAMIC, LCC-44 时钟 输入元件 可编程逻辑 |
| 文件： | 总37页 (文件大小：494K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• High-performance, High-density, Electrically-erasable Programmable Logic Device
• Fully Connected Logic Array with 416 Product Terms
• 10 ns Maximum Pin-to-pin Delay for 5V Operation
• Low-power Edge-sensing “L” Option with <1 mA Standby Current
• 24 Flexible Output Macrocells
– 48 Flip-flops – Two per Macrocell
– 72 Sum Terms
– All Flip-flops, I/O Pins Feed in Independently
• D- or T-type Flip-flops
• Product Term or Direct Input Pin Clocking
• Registered or Combinatorial Internal Feedback
• Backward Compatible with ATV2500B/BQL and ATV2500H/L Software
• Advanced Electrically-erasable Technology
– Reprogrammable
– 100% Tested
• 44-lead Surface Mount Package
ATF2500C
CPLD Family
Datasheet
ATF2500C
Block Diagram
ATF2500CL
ATF2500CQ
ATF2500CQL
Preliminary
Description
The ATF2500C is the highest-density PLD available in a 44-pin package. With its fully
connected logic array and flexible macrocell structure, high gate utilization is easily
obtainable. The ATF2500C is a high-performance CMOS (electrically-erasable) pro-
grammable logic device (PLD) that utilizes Atmel’s proven electrically-erasable
technology.
DIP
PLCC/LCC/JLCC
Pin Configurations
IN
IN
1
2
3
4
5
6
7
8
9
40 IN
39 IN
Pin Name
Function
IN
38 IN
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
37 IN
36 I/O6
35 I/O7
34 I/O8
33 I/O9
32 I/O10
31 I/O11
30 GND
29 I/O23
28 I/O22
27 I/O21
26 I/O20
25 I/O19
24 I/O18
23 IN
IN
Logic Inputs
I/O2
I/O3
I/O4
7
8
9
39 I/O7
38 I/O8
37 I/O9
36 I/O10
35 I/O11
34 GND
33 GND
32 I/O23
31 I/O22
30 I/O21
29 I/O20
CLK/IN
I/O
Pin Clock and Input
Bi-directional Buffers
“Even” I/O Buffers
“Odd” I/O Buffers
Ground
I/O5 10
VCC 11
VCC 12
I/O17 13
I/O16 14
I/O15 15
I/O14 16
I/O13 17
VCC 10
I/O17 11
I/O16 12
I/O15 13
I/O14 14
I/O13 15
I/O12 16
IN 17
I/O 0,2,4...
I/O 1,3,5...
GND
IN 18
IN 19
22 IN
IN 20
21 IN
VCC
+5V Supply
Note:
For
ATF2500CQ
and
ATF2500CQL
(PLCC/LCC/JLCC packages) pin 4 and pin 26
GND connections are not required.
Rev. 0777G–12/01
The ATF2500C is organized around a single universal array. All pins and feedback terms are
always available to every macrocell. Each of the 38 logic pins are array inputs, as are the out-
puts of each flip-flop.
In the ATF2500C, four product terms are input to each sum term. Furthermore, each macro-
cell’s three sum terms can be combined to provide up to 12 product terms per sum term with
no performance penalty. Each flip-flop is individually selectable to be either D- or T-type, pro-
viding further logic compaction. Also, 24 of the flip-flops may be bypassed to provide internal
combinatorial feedback to the logic array.
Product terms provide individual clocks and asynchronous resets for each flip-flop. The flip-
flops may also be individually configured to have direct input pin clocking. Each output has its
own enable product term. Eight synchronous preset product terms serve local groups of either
four or eight flip-flops. Register preload functions are provided to simplify testing. All registers
automatically reset upon power-up.
The Atmel-unique “L” low-power feature is an edge-sensing option that is now field program-
mable for the ATF2500C family. The “L” feature utilizes Atmel-patented Input Transition
Detection (ITD) circuitry and is activated by selecting the “L” option from the program menu.
Using the
ATF2500C
Family’s Many
Advanced
Features
The ATF2500Cs advanced flexibility packs more usable gates into 44 leads than other PLDs.
Some of the ATF2500Cs key features are:
•
Fully Connected Logic Array – Each array input is always available to every product
term. This makes logic placement a breeze.
•
Selectable D- and T-Type Registers – Each ATF2500C flip-flop can be individually
configured as either D- or T-type. Using the T-type configuration, JK and SR flip-flops are
also easily created. These options allow more efficient product term usage.
•
•
Buried Combinatorial Feedback – Each macrocell’s Q2 register may be bypassed to
feed its input (D/T2) directly back to the logic array. This provides further logic expansion
capability without using precious pin resources.
Selectable Synchronous/Asynchronous Clocking – Each of the ATF2500Cs flip-flops
has a dedicated clock product term. This removes the constraint that all registers use the
same clock. Buried state machines, counters and registers can all coexist in one device
while running on separate clocks. Individual flip-flop clock source selection further allows
mixing higher performance pin clocking and flexible product term clocking within one
design.
•
•
A Total of 48 Registers – The ATF2500C provides two flip-flops per macrocell – a total of
48. Each register has its own clock and reset terms, as well as its own sum term.
Independent I/O Pin and Feedback Paths – Each I/O pin on the ATF2500C has a
dedicated input path. Each of the 48 registers has its own feedback term into the array as
well. These features, combined with individual product terms for each I/O’s output enable,
facilitate true bi-directional I/O design.
•
Combinable Sum Terms – Each output macrocell’s three sum terms may be combined
into a single term. This provides a fan in of up to 12 product terms per sum term with no
speed penalty.
2
ATF2500C Family
0777G–12/01
ATF2500C Family
Power-up Reset
The registers in the ATF2500Cs are designed to reset during power-up. At a point delayed
slightly from VCC crossing VRST, all registers will be reset to the low state. The output state will
depend on the polarity of the output buffer.
This feature is critical for state as nature of reset and the uncertainty of how VCC actually rises
in the system, the following conditions are required:
1. The VCC rise must be monotonic,
2. After reset occurs, all input and feedback setup times must be met before driving the
clock pin or terms high, and
3. The clock pin, and any signals from which clock terms are derived, must remain stable
during tPR
.
Parameter
tPR
Description
Typ
600
3.8
Max
1000
4.5
Units
ns
Power-up Reset Time
VRST
Power-up Reset Voltage
V
Level Forced on
Odd I/O Pin during
PRELOAD Cycle
Q Select Pin
State
Even/Odd
Select
Even Q1 State
after Cycle
Even Q2 State
after Cycle
Odd Q1 State
after Cycle
Odd Q2 State
after Cycle
VIH/VIL
VIH/VIL
VIH/VIL
VIH/VIL
Low
High
Low
High
Low
High/Low
X
X
X
Low
X
X
X
High/Low
X
High/Low
X
X
X
High
High
X
X
High/Low
3
0777G–12/01
Preload and
Observability of
Registered
Outputs
The ATF2500Cs registers are provided with circuitry to allow loading of each register asyn-
chronously with either a high or a low. This feature will simplify testing since any state can be
forced into the registers to control test sequencing. A VIH level on the odd I/O pins will force the
appropriate register high; a VIL will force it low, independent of the polarity or other configura-
tion bit settings.
The PRELOAD state is entered by placing an 10.25V to 10.75V signal on SMP lead 42. When
the preload clock SMP lead 23 is pulsed high, the data on the I/O pins is placed into the 12
registers chosen by the Q select and even/odd select pins.
Register 2 observability mode is entered by placing an 10.25V to 10.75V signal on pin/lead 2.
In this mode, the contents of the buried register bank will appear on the associated outputs
when the OE control signals are active.
Programming
Software
Support
All family members of the ATF2500C can be designed with Atmel-Synario™ and Atmel-Win-
CUPL™. ProChip™ designer support will be available Q102.
Additionally, the ATF2500C may be programmed to perform the ATV2500H/Ls functional sub-
set (no T-type flip-flops, pin clocking or D/T2 feedback) using the ATV2500H/L JEDEC file. In
this case, the ATF2500C becomes a direct replacement or speed upgrade for the
ATV2500H/L. The ATF2500CQ/CQL are direct replacements for the ATV2500BQ/BQL and
the AT2500H/L, including the lack of extra grounds on P4 and P26.
Security Fuse
Usage
A single fuse is provided to prevent unauthorized copying of ATF2500C fuse patterns. Once
programmed, the outputs will read programmed during verify.
The security fuse should be programmed last, as its effect is immediate.
The security fuse also inhibits Preload and Q2 observability.
Input and I/O
Pull-ups
All ATF2500C family members have programmable internal input and I/O pinkeeper circuits.
The default condition, including when using the AT2500CQ/CQL family to replace the
AT2500BQ/BQL or AT2500H/L, is that the pinkeepers are not activated.
When pinkeepers are active, inputs or I/Os not being driven externally will maintain their last
driven state. This ensures that all logic array inputs and device outputs are known states.
Pinkeepers are relatively weak active circuits that can be easily overridden by TTL-compatible
drivers (see input and I/O diagrams below).
4
ATF2500C Family
0777G–12/01
ATF2500C Family
Input Diagram
I/O Diagram
INPUT
Functional
Logic Diagram
Description
The ATF2500C functional logic diagram describes the interconnections between the input,
feedback pins and logic cells. All interconnections are routed through the single global bus.
The ATF2500Cs are straightforward and uniform PLDs. The 24 macrocells are numbered 0
through 23. Each macrocell contains 17 AND gates. All AND gates have 172 inputs. The five
lower product terms provide AR1, CK1, CK2, AR2, and OE. These are: one asynchronous
reset and clock per flip-flop, and an output enable. The top 12 product terms are grouped into
three sum terms, which are used as shown in the macrocell diagrams.
Eight synchronous preset terms are distributed in a 2/4 pattern. The first four macrocells share
Preset 0, the next two share Preset 1, and so on, ending with the last two macrocells sharing
Preset 7.
The 14 dedicated inputs and their complements use the numbered positions in the global bus
as shown. Each macrocell provides six inputs to the global bus: (left to right) feedback F2(1)
true and false, flip-flop Q1 true and false, and the pin true and false. The positions occupied by
these signals in the global bus are the six numbers in the bus diagram next to each macrocell.
Note:
1. Either the flip-flop input (D/T2) or output (Q2) may be fed back in the ATF2500Cs.
5
0777G–12/01
Functional Logic Diagram ATV2500C
Notes: 1. Pin 4 and Pin 26 are “ground” connections and are not required for PLCC, LCC and JLCC versions of ATF2500CQ or
ATF2500CQL, making them compatible with ATV2500H and ATV2500L as well as ATV2500BQ and ATV2500BQL pinouts.
2. For DIP package, VCC = P10 and GND = P30. For, PLCC, LCC and JLCC packages, VCC = P11 and P12, GND1 = P33 and
P34, and GND2 = P4, P26 (See Note 1, above).
6
ATF2500C Family
0777G–12/01
ATF2500C Family
Output Logic, Registered(1)
S2 = 0
Terms in
S1
0
S0
0
D/T1
D/T2
4
Output Configuration
Registered (Q1); Q2 FB
Registered (Q1); Q2 FB
Registered (Q1); D/T2 FB
8
12
8
1
0
4(1)
4
1
1
Output
S3
0
Configuration
S6
0
Q1 CLOCK
CK1
CK1 • PIN1
Active Low
1
Active High
1
Q2 CLOCK
S4
0
Register 1 Type
S7
0
D
T
CK2
1
1
CK2 • PIN1
S5
0
Register 2 Type
D
T
1
Output Logic, Combinatiorial(1)
S2 = 1
S1
Terms in
S5
S0
D/T1
4(1)
D/T2
Output Configuration
Combinatorial (8 Terms);
Q2 FB
X
X
X
1
0
0
1
1
1
0
4
Combinatorial (4 Terms);
Q2 FB
1
0
1
1
4
4
4(1)
4
Combinatorial (12 Terms);
Q2 FB
4(1)
4(1)
4
Combinatorial (8 Terms);
D/T2 FB
Combinatorial (4 Terms);
D/T2 FB
0
4
Note:
1. These four terms are shared with D/T1.
Clock Option
Note:
1. These diagrams show equivalent logic functions, not
necessarily the actual circuit implementation.
7
0777G–12/01
Absolute Maximum Ratings*
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Temperature Under Bias................................ -55°C to +125°C
Storage Temperature..................................... -65°C to +150°C
Junction Temperature .............................................150°C Max
Voltage on Any Pin with
Respect to Ground .........................................-2.0V to +7.0V(1)
Voltage on Input Pins
Note:
1. Minimum voltage is -0.6V DC which may under-
shoot to -2.0V for pulses of less than 20 ns.
Maximum output pin voltage is VCC + 0.75V DC
which may overshoot to +7.0V for pulses of less
than 20 ns.
with Respect to Ground
During Programming.....................................-2.0V to +14.0V(1)
Programming Voltage with
Respect to Ground .......................................-2.0V to +14.0V(1)
DC and AC Operating Conditions
Commercial
Industrial
Military
0°C - 70°C
-40°C - 85°C
(Ambient)
-55°C - 125°C
(Case)
Operating Temperature
(Ambient)
VCC Power Supply
5V 5%
5V 10%
5V 10%
Pin Capacitance
f = 1 MHz, T = 25°C(1)
Typ
4
Max
6
Units
Conditions
CIN
pF
VIN = 0V
COUT
8
12
pF
VOUT = 0V
Note:
1. Typical values for nominal supply voltage. This parameter is only sampled and is not 100% tested.
Test Waveforms and Measurement Levels Output Test Load
8
ATF2500C Family
0777G–12/01
ATF2500C Family
AC Waveforms(1) Input Pin Clock
AC Waveforms(1) Product Term Clock
AC Waveforms(1) Combinatorial Outputs and Feedback
Note:
1. Timing measurement reference is 1.5V. Input AC driving levels are 0.0V and 3.0V, unless otherwise specified.
9
0777G–12/01
ATF2500C DC Characteristics
Symbol
Parameter
Condition
Min
Typ
Max
10
Units
µA
IIL
Input Load Current VIN = -0.1V to VCC + 1V
Output Leakage
VOUT = -0.1V to VCC + 0.1V
Current
10
µA
ILO
ICC
IOS
110
110
190
210
mA
mA
mA
VCC = MAX,
Com.
Power Supply
Current Standby
VIN = GND or
VCC f = 0 MHz,
Outputs Open
ATF2500C
Ind., Mil.
Output Short
Circuit Current
-120
VOUT = 0.5V
VIL
VIH
Input Low Voltage
Input High Voltage
MIN ≤ VCC ≤ MAX
-0.6
2.0
0.8
VCC + 0.75
0.5
V
V
V
V
V
I
OL = 8 mA
Com., Ind.
Mil.
Output Low
Voltage
VIN = VIH or VIL,
VOL
VCC = 4.5V
IOL = 6 mA
0.5
I
I
OH = -100 µA
OH = -4.0 mA
VCC - 0.3
2.4
Output High
Voltage
VOH
Note:
VCC = MIN
1. See ICC versus frequency characterization curves.
ATF2500C AC Characteristics
-10
-15
Max
15
Symbol
tPD1
tPD2
tPD3
tPD4
tEA1
tER1
tEA2
tER2
tAW
Parameter
Min
Max
10
10
6
Min
Units
ns
Input to Non-registered Output
Feedback to Non-registered Output
Input to Non-registered Feedback
Feedback to Non-registered Feedback
Input to Output Enable
15
ns
11
ns
6
11
ns
10
10
10
10
15
ns
Input to Output Disable
15
ns
Feedback to Output Enable
15
ns
Feedback to Output Disable
Asynchronous Reset Width
15
ns
4
8
ns
tAP
Asynchronous Reset to Registered Output
Asynchronous Reset to Registered Feedback
13
10
18
15
ns
tAPF
ns
10
ATF2500C
0777G–12/01
ATF2500C
ATF2500C Register AC Characteristics, Input Pin Clock
-10
-15
Symbol Parameter
Units
ns
Min
Max
5.5
2
Min
Max
10
5
tCOS
tCFS
tSIS
tSFS
tHS
Clock to Output
Clock to Feedback
Input Setup Time
Feedback Setup Time
Hold Time
0
2
2
0
3
8
0
9
ns
ns
9
ns
0
ns
tWS
tPS
Clock Width
6
ns
Clock Period
12
ns
External Feedback 1/(tSIS + tCOS
)
75
52
71
83
MHz
MHz
MHz
ns
FMAXS
Internal Feedback 1/(tSFS + tCFS
No Feedback 1/(tPS
Asynchronous Reset/Preset Recovery Time
)
100
110
)
tARS
5
12
ATF2500C Register AC Characteristics, Product Term Clock
-10
-15
Symbol Parameter
Min
Max
10
5
Min
Max
15
Units
ns
tCOA
tCFA
tSIA
tSFA
tHA
Clock to Output
Clock to Feedback
Input Setup Time
Feedback Setup Time
Hold Time
2
2
2
1
3
9
5
5
12
ns
ns
5
ns
5
ns
tWA
tPA
Clock Width
7.5
15
ns
Clock Period
ns
External Feedback 1/(tSIA + tCOA
)
75.5
100
100
50
58
66
MHz
MHz
MHz
ns
FMAXA
Internal Feedback 1/(tSFA + tCFA
No Feedback 1/(tPS
Asynchronous Reset/Preset Recovery Time
)
)
tARA
2
8
11
0777G–12/01
STAND-BY ICC VS.
NORMALIZED ICC VS. TEMP
SUPPLY VOLTAGE (TA = 25°C)
1.4
1.2
1.0
0.8
0.6
0.4
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
TBD
TBD
-40.0
0.0
25.0
75.0
TEMPERATURE (C)
4.5
4.8
5.0
5.3
5.5
SUPPLY VOLTAGE (V)
SUPPLY CURRENT VS.
SUPPLY CURRENT VS.
INPUT FREQUENCY (VCC = 5.0V, TA = 25°C)
INPUT FREQUENCY (VCC = 5.0V, TA = 25°C)
140.000
120.000
100.000
80.000
60.000
40.000
20.000
0.000
1.000
0.800
0.600
0.400
0.200
0.000
TBD
TBD
0.0
0.5
2.5
5.0
7.5
10.0
25.0
37.5
50.0
FREQUENCY (MHz)
0.0
0.5
2.5
5.0
7.5
10.0
25.0
37.5
50.0
FREQUENCY (MHz)
OUTPUT SOURCE CURRENT VS.
OUTPUT VOLTAGE (VCC = 5.0V, TA = 25°C)
OUTPUT SOURCE CURRENT VS.
SUPPLY VOLTAGE (VOH = 2.4V)
0.0
-10.0
-20.0
-30.0
-40.0
-50.0
-60.0
-70.0
-80.0
-90.0
0
-10
-20
-30
-40
-50
TBD
TBD
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00
VOH (V)
OUTPUT SINK CURRENT VS.
OUTPUT SINK CURRENT VS.
SUPPLY VOLTAGE (VOL = 0.5V)
OUTPUT VOLTAGE (VCC = 5.0V, TA = 25°C)
140.0
120.0
100.0
80.0
60.0
40.0
20.0
0.0
1
1
1
0
0
0
TBD
TBD
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
12
ATF2500C
0777G–12/01
ATF2500C
INPUT CURRENT VS.
INPUT CLAMP CURRENT VS.
INPUT VOLTAGE (VCC = 5.0V, TA = 25°C)
INPUT VOLTAGE (VCC = 5.0V, TA = 35°C)
1
1
1
0
0
0
0
-20
-40
TBD
TBD
-60
-80
-100
-120
0.0
1.0
2.0
3.0
4.0
5.0
6.0
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
NORMALIZED TPD VS. VCC
NORMALIZED TPD VS. TEMP
1.2
1.1
1.0
0.9
0.8
1.1
1.0
0.9
0.8
TBD
TBD
4.5
4.8
5.0
5.3
5.5
-40.0
0.0
25.0
75.0
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
NORMALIZED TCO VS. TEMP
NORMALIZED TCO VS. VCC
1.1
1.0
0.9
0.8
1.3
1.2
1.1
1.0
0.9
0.8
TBD
TBD
-40.0
0.0
25.0
75.0
4.5
4.8
5.0
5.3
5.5
TEMPERATURE (V)
SUPPLY VOLTAGE (V)
NORMALIZED TSU VS. TEMP
NORMALIZED TPD VS. VCC
1.2
1.1
1.0
0.9
0.8
1.2
1.1
1.0
0.9
0.8
TBD
TBD
-40.0
0.0
25.0
75.0
4.5
4.8
5.0
5.3
5.5
TEMPERATURE (C)
SUPPLY VOLTAGE (V)
13
0777G–12/01
DELTA TPD VS.
DELTA TCO VS.
OUTPUT LOADING
OUTPUT LOADING
8
6
1.00
0.90
0.80
0.70
0.60
0.50
0.40
0.30
0.20
0.10
0.00
4
TBD
TBD
2
0
-2
0
50
100
150
200
250
300
50
100
150
200
250
300
OUTPUT LOADING (PF)
NUMBER OF OUTPUTS LOADING
DELTA TPD VS. # OF OUTPUT SWITCHING
DELTA TCO VS. # OF OUTPUT SWITCHING
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
TBD
TBD
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
NUMBER OF OUTPUTS SWITCHING
NUMBER OF OUTPUTS SWITCHING
14
ATF2500C
0777G–12/01
ATF2500CL
ATF2500CL DC Characteristics
Symbol Parameter
Condition
Min
Typ
Max
10
Units
µA
IIL
Input Load Current
VIN = -0.1V to VCC + 1V
Output Leakage
Current
10
µA
ILO
VOUT = -0.1V to VCC + 0.1V
2
2
5
mA
mA
mA
VCC = MAX,
VIN = GND or
VCC f = 0 MHz,
Outputs Open
Com.
Power Supply
Current Standby
ICC
ATF2500CL
10
Ind., Mil.
Output Short
Circuit Current
-120
IOS
VOUT = 0.5V
VIL
VIH
Input Low Voltage
Input High Voltage
MIN ≤ VCC ≤ MAX
-0.6
2.0
0.8
VCC + 0.75
0.5
V
V
V
V
V
I
OL = 8 mA
Com., Ind.
Mil.
VIN = VIH or VIL,
VOL
Output Low Voltage
VCC = 4.5V
IOL = 6 mA
0.5
I
I
OH = -100 µA
OH = -4.0 mA
VCC - 0.3
2.4
Output High
Voltage
VOH
VCC = MIN
Note:
1. See ICC versus frequency characterization curves.
ATF2500CL AC Characteristics
-20
Symbol Parameter
Min
Max
20
20
15
15
20
20
20
20
Units
ns
tPD1
tPD2
tPD3
tPD4
tEA1
tER1
tEA2
tER2
tAW
Input to Non-registered Output
Feedback to Non-registered Output
Input to Non-registered Feedback
Feedback to Non-registered Feedback
Input to Output Enable
ns
ns
ns
ns
Input to Output Disable
ns
Feedback to Output Enable
ns
Feedback to Output Disable
ns
Asynchronous Reset Width
12
ns
tAP
Asynchronous Reset to Registered Output
Asynchronous Reset to Registered Feedback
22
19
ns
tAPF
ns
15
0777G–12/01
ATF2500CL Register AC Characteristics, Input Pin Clock
-20
Symbol Parameter
Units
ns
Min
Max
11
6
tCOS
tCFS
tSIS
tSFS
tHS
Clock to Output
Clock to Feedback
Input Setup Time
Feedback Setup Time
Hold Time
0
14
14
0
ns
ns
ns
ns
tWS
tPS
Clock Width
7
ns
Clock Period
14
ns
External Feedback 1/(tSIS + tCOS
)
40
50
71
MHz
MHz
MHz
ns
FMAXS
Internal Feedback 1/(tSFS + tCFS
No Feedback 1/(tPS
Asynchronous Reset/Preset Recovery Time
)
)
tARS
15
ATF2500CL Register AC Characteristics, Product Term Clock
-20
Symbol Parameter
Units
ns
Min
Max
20
tCOA
tCFA
tSIA
tSFA
tHA
Clock to Output
Clock to Feedback
Input Setup Time
Feedback Setup Time
Hold Time
10
10
8
16
ns
ns
ns
10
11
22
ns
tWA
tPA
Clock Width
ns
Clock Period
ns
External Feedback 1/(tSIA + tCOA
)
33
38
45
MHz
MHz
MHz
ns
FMAXA
Internal Feedback 1/(tSFA + tCFA
)
No Feedback 1/(tPS
)
tARA
Asynchronous Reset/Preset Recovery Time
12
16
ATF2500CL
0777G–12/01
ATF2500CL
NORMALIZED ICC VS. TEMP
STAND-BY ICC VS.
1.4
1.2
1.0
0.8
0.6
0.4
SUPPLY VOLTAGE (TA = 25°C)
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
TBD
TBD
-40.0
0.0
25.0
75.0
4.5
4.8
5.0
5.3
5.5
TEMPERATURE (C)
SUPPLY VOLTAGE (V)
SUPPLY CURRENT VS.
INPUT FREQUENCY (VCC = 5.0V, TA = 25°C)
SUPPLY CURRENT VS.
INPUT FREQUENCY (VCC = 5.0V, TA = 25°C)
140.000
120.000
100.000
80.000
60.000
40.000
20.000
0.000
1.000
0.800
0.600
0.400
0.200
0.000
TBD
TBD
0.0
0.5
2.5
5.0
7.5
10.0
25.0
37.5
50.0
FREQUENCY (MHz)
0.0
0.5
2.5
5.0
7.5
10.0
25.0
37.5
50.0
FREQUENCY (MHz)
OUTPUT SOURCE CURRENT VS.
OUTPUT VOLTAGE (VCC = 5.0V, TA = 25°C)
OUTPUT SOURCE CURRENT VS.
SUPPLY VOLTAGE (VOH = 2.4V)
0.0
-10.0
-20.0
-30.0
-40.0
-50.0
-60.0
-70.0
-80.0
-90.0
0
-10
-20
-30
-40
-50
TBD
TBD
4.0
4.5
5.0
5.5
6.0
0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00
OH (V)
SUPPLY VOLTAGE (V)
V
OUTPUT SINK CURRENT VS.
OUTPUT SINK CURRENT VS.
SUPPLY VOLTAGE (VOL = 0.5V)
OUTPUT VOLTAGE (VCC = 5.0V, TA = 25°C)
140.0
120.0
100.0
80.0
60.0
40.0
20.0
0.0
1
1
1
0
0
0
TBD
TBD
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
17
0777G–12/01
INPUT CLAMP CURRENT VS.
INPUT VOLTAGE (VCC = 5.0V, TA = 35°C)
INPUT CURRENT VS.
INPUT VOLTAGE (VCC = 5.0V, TA = 25°C)
0
-20
1
1
1
0
0
0
-40
TBD
-60
TBD
-80
-100
-120
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
INPUT VOLTAGE (V)
0.0
1.0
2.0
3.0
4.0
5.0
6.0
INPUT VOLTAGE (V)
NORMALIZED TPD VS. VCC
NORMALIZED TCO VS. TEMP
1.2
1.1
1.0
0.9
0.8
1.1
1.0
0.9
0.8
TBD
TBD
-40.0
0.0
25.0
75.0
4.5
4.8
5.0
5.3
5.5
SUPPLY VOLTAGE (V)
TEMPERATURE (V)
NORMALIZED TCO VS. VCC
NORMALIZED TSU VS. TEMP
1.3
1.2
1.1
1.0
0.9
0.8
1.2
1.1
1.0
0.9
0.8
TBD
TBD
4.5
4.8
5.0
5.3
5.5
-40.0
0.0
25.0
75.0
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
NORMALIZED TSU VS. VCC
NORMALIZED TSU VS. TEMP
1.2
1.2
1.1
1.0
0.9
0.8
1.1
1.0
0.9
0.8
TBD
TBD
4.5
4.8
5.0
5.3
5.5
-40.0
0.0
25.0
75.0
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
18
ATF2500CL
0777G–12/01
ATF2500CL
DELTA TCO VS.
DELTA TPD VS.
OUTPUT LOADING
OUTPUT LOADING
1.00
0.90
0.80
0.70
0.60
0.50
0.40
0.30
0.20
0.10
0.00
8
6
4
TBD
TBD
2
0
-2
50
100
150
200
250
300
0
50
100
150
200
250
300
OUTPUT LOADING (PF)
NUMBER OF OUTPUTS LOADING
DELTA TPD VS. # OF OUTPUT SWITCHING
DELTA TCO VS. # OF OUTPUT SWITCHING
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
TBD
TBD
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
NUMBER OF OUTPUTS SWITCHING
NUMBER OF OUTPUTS SWITCHING
19
0777G–12/01
ATF2500CQ DC Characteristics
Symbol Parameter
Condition
Min
Typ
Max
10
Units
µA
IIL
Input Load Current
VIN = -0.1V to VCC + 1V
Output Leakage
Current
10
µA
ILO
VOUT = -0.1V to VCC + 0.1V
VCC = MAX,
VIN = GND or
VCC f = 0 MHz,
Outputs Open
Com.
30
30
70
85
mA
mA
Power Supply
Current Standby
ICC
ATF2500CQ
Ind., Mil.
Output Short
Circuit Current
-120
mA
IOS
VOUT = 0.5V
VIL
VIH
Input Low Voltage
Input High Voltage
MIN ≤ VCC ≤ MAX
-0.6
2.0
0.8
VCC + 0.75
0.5
V
V
V
V
V
I
OL = 8 mA
Com., Ind.
Mil.
Output Low
Voltage
VIN = VIH or VIL,
VOL
VCC = 4.5V
IOL = 6 mA
0.5
I
I
OH = -100 µA
OH = -4.0 mA
VCC - 0.3
2.4
Output High
Voltage
VOH
VCC = MIN
Note:
1. See ICC versus frequency characterization curves.
ATF2500CQ AC Characteristics
-20
Symbol Parameter
Min
Max
20
20
15
15
20
20
20
20
Units
ns
tPD1
tPD2
tPD3
tPD4
tEA1
tER1
tEA2
tER2
tAW
Input to Non-registered Output
Feedback to Non-registered Output
Input to Non-registered Feedback
Feedback to Non-registered Feedback
Input to Output Enable
ns
ns
ns
ns
Input to Output Disable
ns
Feedback to Output Enable
ns
Feedback to Output Disable
ns
Asynchronous Reset Width
12
ns
tAP
Asynchronous Reset to Registered Output
Asynchronous Reset to Registered Feedback
22
19
ns
tAPF
ns
20
ATF2500CQ
0777G–12/01
ATF2500CQ
ATF2500CQ Register AC Characteristics, Input Pin Clock
-20
Symbol
tCOS
tCFS
tSIS
Parameter
Min
Max
Units
ns
Clock to Output
Clock to Feedback
Input Setup Time
Feedback Setup Time
Hold Time
11
6
0
14
14
0
ns
ns
tSFS
tHS
ns
ns
tWS
Clock Width
7
ns
tPS
Clock Period
14
ns
External Feedback 1/(tSIS + tCOS
)
40
50
71
MHz
MHz
MHz
ns
FMAXS
Internal Feedback 1/(tSFS + tCFS
No Feedback 1/(tPS
Asynchronous Reset/Preset Recovery Time
)
)
tARS
15
ATF2500CQ Register AC Characteristics, Product Term Clock
-20
Symbol
tCOA
tCFA
tSIA
Parameter
Min
Max
20
Units
ns
Clock to Output
Clock to Feedback
Input Setup Time
Feedback Setup Time
Hold Time
10
10
8
16
ns
ns
tSFA
tHA
ns
10
11
22
ns
tWA
Clock Width
ns
tPA
Clock Period
ns
External Feedback 1/(tSIA + tCOA
)
33
38
45
MHz
MHz
MHz
ns
FMAXA
Internal Feedback 1/(tSFA + tCFA
No Feedback 1/(tPS
Asynchronous Reset/Preset Recovery Time
)
)
tARA
12
21
0777G–12/01
STAND-BY ICC VS.
NORMALIZED ICC VS. TEMP
SUPPLY VOLTAGE (TA = 25°C)
1.4
1.2
1.0
0.8
0.6
0.4
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
TBD
TBD
-40.0
0.0
25.0
75.0
TEMPERATURE (C)
4.5
4.8
5.0
5.3
5.5
SUPPLY VOLTAGE (V)
SUPPLY CURRENT VS.
SUPPLY CURRENT VS.
INPUT FREQUENCY (VCC = 5.0V, TA = 25°C)
INPUT FREQUENCY (VCC = 5.0V, TA = 25°C)
1.000
0.800
0.600
0.400
0.200
0.000
140.000
120.000
100.000
80.000
60.000
40.000
20.000
0.000
TBD
TBD
0.0
0.5
2.5
5.0
7.5
10.0
25.0
37.5
50.0
FREQUENCY (MHz)
0.0
0.5
2.5
5.0
7.5
10.0
25.0
37.5
50.0
FREQUENCY (MHz)
OUTPUT SOURCE CURRENT VS.
OUTPUT VOLTAGE (VCC = 5.0V, TA = 25°C)
OUTPUT SOURCE CURRENT VS.
SUPPLY VOLTAGE (VOH = 2.4V)
0.0
-10.0
-20.0
-30.0
-40.0
-50.0
-60.0
-70.0
-80.0
-90.0
0
-10
-20
-30
-40
TBD
TBD
-50
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00
OH (V)
V
OUTPUT SINK CURRENT VS.
OUTPUT SINK CURRENT VS.
SUPPLY VOLTAGE (VOL = 0.5V)
OUTPUT VOLTAGE (VCC = 5.0V, TA = 25°C)
140.0
120.0
100.0
80.0
60.0
40.0
20.0
0.0
1
1
1
0
0
TBD
TBD
0
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
22
ATF2500CQ
0777G–12/01
ATF2500CQ
INPUT CURRENT VS.
INPUT CLAMP CURRENT VS.
INPUT VOLTAGE (VCC = 5.0V, TA = 25°C)
INPUT VOLTAGE (VCC = 5.0V, TA = 35°C)
1
1
1
0
0
0
0
-20
-40
TBD
-60
TBD
-80
-100
-120
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
NORMALIZED TCO VS. TEMP
NORMALIZED TPD VS. VCC
1.2
1.1
1.0
0.9
0.8
1.1
1.0
0.9
0.8
TBD
TBD
-40.0
0.0
25.0
75.0
4.5
4.8
5.0
5.3
5.5
TEMPERATURE (V)
SUPPLY VOLTAGE (V)
NORMALIZED TCO VS. VCC
NORMALIZED TCO VS. TEMP
1.3
1.2
1.1
1.0
0.9
0.8
1.1
1.0
0.9
0.8
TBD
TBD
-40.0
0.0
25.0
75.0
4.5
4.8
5.0
5.3
5.5
SUPPLY VOLTAGE (V)
TEMPERATURE (V)
NORMALIZED TSU VS. TEMP
NORMALIZED TSU VS. VCC
1.2
1.1
1.0
0.9
0.8
1.2
1.1
1.0
0.9
0.8
TBD
TBD
-40.0
0.0
25.0
75.0
4.5
4.8
5.0
5.3
5.5
TEMPERATURE (C)
SUPPLY VOLTAGE (V)
23
0777G–12/01
DELTA TCO VS.
DELTA TPD VS.
OUTPUT LOADING
OUTPUT LOADING
1.00
0.90
0.80
0.70
0.60
0.50
0.40
0.30
0.20
0.10
0.00
8
6
4
TBD
TBD
2
0
-2
50
100
150
200
250
300
0
50
100
150
200
250
300
NUMBER OF OUTPUTS LOADING
OUTPUT LOADING (PF)
DELTA TPD VS. # OF OUTPUT SWITCHING
DELTA TCO VS. # OF OUTPUT SWITCHING
0.0
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.1
-0.2
-0.3
-0.4
-0.5
TBD
TBD
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
NUMBER OF OUTPUTS SWITCHING
NUMBER OF OUTPUTS SWITCHING
24
ATF2500CQ
0777G–12/01
ATF2500CQL
ATF2500CQL DC Characteristics
Symbol
Parameter
Condition
Min
Typ
Max
Units
IIL
Input Load Current
VIN = -0.1V to VCC + 1V
10
µA
Output Leakage
Current
ILO
ICC
IOS
VOUT = -0.1V to VCC + 0.1V
10
4
µA
mA
mA
V
CC = MAX,
VIN = GND or
CC f = 0 MHz,
Com.
2
2
Power Supply
Current Standby
ATF2500CQL
V
Ind., Mil.
5
Outputs Open
Output Short
Circuit Current
VOUT = 0.5V
-120
mA
VIL
VIH
Input Low Voltage
Input High Voltage
MIN ≤ VCC ≤ MAX
-0.6
2.0
0.8
VCC + 0.75
0.5
V
V
V
V
V
IOL = 8 mA
Com., Ind.
Mil.
Output Low
Voltage
VIN = VIH or VIL,
VCC = 4.5V
VOL
I
I
I
OL = 6 mA
0.5
OH = -100 µA
OH = -4.0 mA
VCC - 0.3
2.4
Output High
Voltage
VOH
VCC = MIN
ATF2500CQL AC Characteristics
-25
Symbol Parameter
Min
Max
25
25
18
18
25
25
25
25
Units
ns
tPD1
tPD2
tPD3
tPD4
tEA1
tER1
tEA2
tER2
tAW
Input to Non-registered Output
Feedback to Non-registered Output
Input to Non-registered Feedback
Feedback to Non-registered Feedback
Input to Output Enable
ns
ns
ns
ns
Input to Output Disable
ns
Feedback to Output Enable
ns
Feedback to Output Disable
ns
Asynchronous Reset Width
15
ns
tAP
Asynchronous Reset to Registered Output
28
25
ns
tAPF
Asynchronous Reset to Registered Feedback
ns
25
0777G–12/01
ATF2500CQL Register AC Characteristics, Input Pin Clock
-25
Symbol
tCOS
tCFS
tSIS
Parameter
Min
Max
12
7
Units
ns
Clock to Output
Clock to Feedback
Input Setup Time
Feedback Setup Time
Hold Time
0
20
20
0
ns
ns
tSFS
tHS
ns
ns
tWS
Clock Width
8
ns
tPS
Clock Period
146
ns
External Feedback 1/(tSIS + tCOS
)
31
37
62
MHz
MHz
MHz
ns
FMAXS
Internal Feedback 1/(tSFS + tCFS
No Feedback 1/(tPS
Asynchronous Reset/Preset Recovery Time
)
)
tARS
20
ATF2500CQL Register AC Characteristics, Product Term Clock
-25
Symbol
tCOA
tCFA
tSIA
Parameter
Min
Max
22
Units
ns
Clock to Output
Clock to Feedback
Input Setup Time
Feedback Setup Time
Hold Time
12
15
10
12
14
28
18
ns
ns
tSFA
tHA
ns
ns
tWA
Clock Width
ns
tPA
Clock Period
ns
External Feedback 1/(tSIA + tCOA
)
27
36
36
MHz
MHz
MHz
ns
FMAXA
Internal Feedback 1/(tSFA + tCFA
)
No Feedback 1/(tPS
)
tARA
Asynchronous Reset/Preset Recovery Time
15
26
ATF2500CQL
0777G–12/01
ATF2500CQL
STAND-BY ICC VS.
NORMALIZED ICC VS. TEMP
SUPPLY VOLTAGE (TA = 25°C)
1.4
1.2
1.0
0.8
0.6
0.4
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
TBD
TBD
-40.0
0.0
25.0
75.0
TEMPERATURE (C)
4.5
4.8
5.0
5.3
5.5
SUPPLY VOLTAGE (V)
SUPPLY CURRENT VS.
SUPPLY CURRENT VS.
INPUT FREQUENCY (VCC = 5.0V, TA = 25°C)
INPUT FREQUENCY (VCC = 5.0V, TA = 25°C)
140.000
120.000
100.000
80.000
60.000
40.000
20.000
0.000
1.000
0.800
0.600
0.400
0.200
0.000
TBD
TBD
0.0
0.5
2.5
5.0
7.5
10.0
25.0
37.5
50.0
FREQUENCY (MHz)
0.0
0.5
2.5
5.0
7.5
10.0
25.0
37.5
50.0
FREQUENCY (MHz)
OUTPUT SOURCE CURRENT VS.
SUPPLY VOLTAGE (VOH = 2.4V)
OUTPUT SOURCE CURRENT VS.
OUTPUT VOLTAGE (VCC = 5.0V, TA = 25°C)
0
-10
-20
-30
-40
0.0
-10.0
-20.0
-30.0
-40.0
-50.0
-60.0
-70.0
-80.0
-90.0
TBD
TBD
-50
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
0.00 0.50 1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50 5.00
VOH (V)
OUTPUT SINK CURRENT VS.
SUPPLY VOLTAGE (VOL = 0.5V)
OUTPUT SINK CURRENT VS.
OUTPUT VOLTAGE (VCC = 5.0V, TA = 25°C)
1
1
1
0
0
140.0
120.0
100.0
80.0
60.0
40.0
20.0
0.0
TBD
TBD
0
4.0
4.5
5.0
5.5
6.0
SUPPLY VOLTAGE (V)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
SUPPLY VOLTAGE (V)
27
0777G–12/01
INPUT CLAMP CURRENT VS.
INPUT CURRENT VS.
INPUT VOLTAGE (VCC = 5.0V, TA = 35°C)
INPUT VOLTAGE (VCC = 5.0V, TA = 25°C)
1
1
1
0
0
0
0
-20
-40
TBD
-60
TBD
-80
-100
-120
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
0.0
1.0
2.0
3.0
4.0
5.0
6.0
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
NORMALIZED TPD VS. VCC
NORMALIZED TPD VS. TEMP
1.2
1.1
1.0
0.9
0.8
1.1
1.0
0.9
0.8
TBD
TBD
4.5
4.8
5.0
5.3
5.5
-40.0
0.0
25.0
75.0
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
NORMALIZED TCO VS. VCC
NORMALIZED TCO VS. TEMP
1.3
1.2
1.1
1.0
0.9
0.8
1.1
1.0
0.9
0.8
TBD
TBD
-40.0
0.0
25.0
75.0
4.5
4.8
5.0
5.3
5.5
SUPPLY VOLTAGE (V)
TEMPERATURE (V)
NORMALIZED TSU VS. VCC
NORMALIZED TSU VS. TEMP
1.2
1.2
1.1
1.0
0.9
0.8
1.1
1.0
0.9
0.8
TBD
TBD
4.5
4.8
5.0
5.3
5.5
-40.0
0.0
25.0
75.0
SUPPLY VOLTAGE (V)
TEMPERATURE (C)
28
ATF2500CQL
0777G–12/01
ATF2500CQL
DELTA TPD VS.
DELTA TCO VS.
OUTPUT LOADING
OUTPUT LOADING
8
6
1.00
0.90
0.80
0.70
0.60
0.50
0.40
0.30
0.20
0.10
0.00
4
TBD
TBD
2
0
-2
0
50
100
150
200
250
300
50
100
150
200
250
300
OUTPUT LOADING (PF)
NUMBER OF OUTPUTS LOADING
DELTA TCO VS. # OF OUTPUT SWITCHING
DELTA TPD VS. # OF OUTPUT SWITCHING
1.0
0.8
0.6
0.4
0.2
0.0
0.0
-0.1
-0.2
-0.3
-0.4
-0.5
TBD
TBD
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10.0
NUMBER OF OUTPUTS SWITCHING
NUMBER OF OUTPUTS SWITCHING
29
0777G–12/01
Ordering Information
tPD
(ns)
tCOS
(ns)
Ext. fMAXS
(MHz)
Ordering Code
ATF2500C-10JC
ATF2500C-15JC
Package
44J
Operation Range
120
15
5.5
10
75
52
Commercial
44J
Commercial
(0°C to 70°C)
ATF2500C-15JI
44J
Industrial
(-40°C to 85°C)
ATF2500C-15KM/883
ATF2500C-15NM/883
44K
44L
Military/883C
(-55°C to 125°C)
Class B, Fully Compliant
5962 - 0152201M4X
5962 - 0152201M3X
44K
44L
Military/883C
(-55°C to 125°C)
Class B, Fully Compliant
20
11
40
ATF2500CL-20JC
ATF2500CL-20JI
44J
44J
Commercial
(0°C to 70°C)
Industrial
(-40°C to 85°C)
ATF2500CL-20KM/883
ATF2500CL-20NM/883
44K
44L
Military/883C
(-55°C to 125°C)
Class B, Fully Compliant
5962 - 0152202M4X
5962 - 0152202M3X
44K
44L
Military/883C
(-55°C to 125°C)
Class B, Fully Compliant
20
11
40
ATF2500CQ-20JC
ATF2500CQ-20PC
44J
Commercial
40P6
(0°C to 70°C)
ATF2500CQ-20JI
ATF2500CQ-20PI
44J
Industrial
40P6
(-40°C to 85°C)
ATF2500CQ-20GM/883
ATF2500CQ-20KM/883
ATF2500CQ-20NM/883
40D6
44K
44L
Military/883C
(-55°C to 125°C)
Class B, Fully Compliant
5962 - 0152203M2X
5962 - 0152203M4X
5962 - 0152203M3X
40D6
44K
44L
Military/883C
(-55°C to 125°C)
Class B, Fully Compliant
30
ATF2500CQL
0777G–12/01
ATF2500CQL
Ordering Information (Continued)
tPD
(ns)
tCOS
(ns)
Ext. fMAXS
(MHz)
Ordering Code
Package
Operation Range
25
12
31
ATF2500CQL-25JC
ATF2500CQL-25PC
44J
Commercial
40P6
(0°C to 70°C)
ATF2500CQL-25JI
ATF2500CQL-25PI
44J
Industrial
40P6
(-40°C to 85°C)
ATF2500CQL-25GM/883
ATF2500CQL-25KM/883
ATF2500CQL-25NM/883
40D6
44K
44L
Military/883C
(-55°C to 125°C)
Class B. Fully Compliant
5962 - 0152204M2X
5962 - 0152204M4X
5962 - 0152204M3X
40D6
44K
44L
Military/883C
(-55°C to 125°C)
Class B, Fully Compliant
Note:
*SMD numbers are TBD.
Using “C” Product for Industrial
To use commercial product for Industrial temperature ranges, down-grade one speed grade from the “I” to the “C” device
(7 ns “C” = 10 ns “I”) and derate power by 30%.
Package Type
40D6
44J
40-pin, 0.600" Wide, Ceramic, Dual Inline Package (Cerdip)
44-lead, Plastic J-leaded Chip Carrier OTP (PLCC)
44-lead, Ceramic J-leaded Chip Carrier (JLCC)
44K
40P6
44L
40-pin, 0.600" Wide, Plastic, Dual Inline Package OTP (PDIP)
44-pad, Ceramic Leadless Chip Carrier (LCC)
31
0777G–12/01
Packaging Information
40D6 – Cerdip
Dimension in Millimeters and (Inches)
Controlling dimension: Inches
MIL-STD-1835 D-5 CONFIG A (Glass Sealed)
53.09(2.090)
51.82(2.040)
PIN
1
15.49(0.610)
12.95(0.510)
48.26(1.900) REF
5.72(0.225)
MAX
0.127(0.005)MIN
SEATING
PLANE
1.78(0.070)
0.38(0.015)
0.66(0.026)
0.36(0.014)
5.08(0.200)
3.18(0.125)
1.65(0.065)
1.14(0.045)
2.54(0.100)BSC
15.70(0.620)
15.00(0.590)
0º~ 15º REF
0.46(0.018)
0.20(0.008)
17.80(0.700) MAX
04/11/01
TITLE
DRAWING NO. REV.
2325 Orchard Parkway
San Jose, CA 95131
40D6, 40-lead (0.600" Wide), Non-windowed, Ceramic Dual Inline
Package (Cerdip)
40D6
A
R
32
ATF2500CQL
0777G–12/01
ATF2500CQL
44J – PLCC
1.14(0.045) X 45˚
PIN NO. 1
1.14(0.045) X 45˚
0.318(0.0125)
0.191(0.0075)
IDENTIFIER
D2/E2
E1
E
B1
B
e
A2
A1
D1
D
A
0.51(0.020)MAX
45˚ MAX (3X)
COMMON DIMENSIONS
(Unit of Measure = mm)
MIN
4.191
MAX
4.572
3.048
–
NOM
NOTE
SYMBOL
A
–
A1
A2
D
2.286
–
0.508
–
17.399
16.510
17.399
16.510
–
17.653
D1
E
–
16.662 Note 2
17.653
–
Notes:
1. This package conforms to JEDEC reference MS-018, Variation AC.
2. Dimensions D1 and E1 do not include mold protrusion.
Allowable protrusion is .010"(0.254 mm) per side. Dimension D1
and E1 include mold mismatch and are measured at the extreme
material condition at the upper or lower parting line.
E1
–
16.662 Note 2
16.002
D2/E2 14.986
–
B
0.660
0.330
–
–
0.813
3. Lead coplanarity is 0.004" (0.102 mm) maximum.
B1
e
0.533
1.270 TYP
10/04/01
DRAWING NO. REV.
44J
TITLE
2325 Orchard Parkway
San Jose, CA 95131
44J, 44-lead, Plastic J-leaded Chip Carrier (PLCC)
B
R
33
0777G–12/01
44K – JLCC
D
0.89 X 45˚
1.14 X 45˚
D1
C
E2
b1
E
E1
b
e
A2
A1
A
0.20 C
D2
c
SEATING PLANE
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
NOM
MAX
NOTE
A
3.93
2.28
0.89
4.36
4.57
3.04
1.14
2.66
-
A1
A2
D
17.40
16.38
15.00
17.40
17.52
16.63
15.50
17.52
17.65
16.89
16.00
17.65
D1
D2
E
E1
E2
b
16.38
16.63
16.89
15.00
0.66
0.43
0.15
15.50
16.00
0.81
0.58
0.30
0.73
.025(.635) RADIUS MAX (3X)
-
b1
c
-
e
1.27 TYP
Note : Refer to MIL-STD-1835C-J1
09/18/01
DRAWING NO.
REV.
TITLE
44K, 44-lead, Non-windowed, Ceramic J-leaded Chip Carrier (JLCC)
2325 Orchard Parkway
San Jose, CA 95131
44K
A
R
34
ATF2500CQL
0777G–12/01
ATF2500CQL
40P6 – PDIP
D
PIN
1
E1
A
SEATING PLANE
A1
L
B
B1
e
E
COMMON DIMENSIONS
(Unit of Measure = mm)
0º ~ 15º REF
C
MIN
–
MAX
4.826
–
NOM
NOTE
SYMBOL
A
–
eB
A1
D
0.381
52.070
15.240
13.462
0.356
1.041
3.048
0.203
15.494
–
–
52.578 Note 2
15.875
E
–
E1
B
–
13.970 Note 2
0.559
–
B1
L
–
1.651
Notes:
1. This package conforms to JEDEC reference MS-011, Variation AC.
2. Dimensions D and E1 do not include mold Flash or Protrusion.
Mold Flash or Protrusion shall not exceed 0.25 mm (0.010").
–
3.556
C
–
–
0.381
eB
e
17.526
2.540 TYP
09/28/01
DRAWING NO. REV.
40P6
TITLE
2325 Orchard Parkway
San Jose, CA 95131
40P6, 40-lead (0.600"/15.24 mm Wide) Plastic Dual
Inline Package (PDIP)
B
R
35
0777G–12/01
44L – LCC
Dimensions in Millimeters and (Inches)
Controlling dimension: Inches
MIL-STD-1835 C-5
16.81(0.662)
16.26(0.640)
2.74(0.108)
2.16(0.085)
16.81(0.662)
16.26(0.640)
2.03(0.080)
1.40(0.055)
PIN 1
1.40(0.055)
1.14(0.045)
INDEX CORNER
2.41(0.095)
1.91(0.075)
0.635(0.025)
X 45˚
0.381(0.015)
0.305(0.012)
0.178(0.007)
RADIUS
12.70(0.500) BSC
0.737(0.029)
0.533(0.021)
1.27(0.050) TYP
1.02(0.040) X 45˚
2.16(0.085)
1.65(0.065)
12.70(0.500) BSC
04/11/01
DRAWING NO. REV.
TITLE
2325 Orchard Parkway
San Jose, CA 95131
44L, 44-pad (0.600" Wide), Non-windowed, Ceramic Lid, Leadless
Chip Carrier (LCC)
44L
A
R
36
ATF2500CQL
0777G–12/01
Atmel Headquarters
Atmel Operations
Corporate Headquarters
2325 Orchard Parkway
San Jose, CA 95131
TEL (408) 441-0311
FAX (408) 487-2600
Memory
RF/Automotive
Atmel Corporate
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TEL (408) 436-4270
FAX (408) 436-4314
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TEL (49) 71-31-67-0
FAX (49) 71-31-67-2340
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Atmel Colorado Springs
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TEL (719) 576-3300
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Atmel Rousset
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TEL (719) 576-3300
TEL (81) 3-3523-3551
FAX (81) 3-3523-7581
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Web Site
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© Atmel Corporation 2001.
Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty
which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors
which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does
not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted
by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical
components in life support devices or systems.
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Other terms and product names may be the trademarks of others.
Printed on recycled paper.
0777G–12/01/0M
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