ATR4254-PEQY [ATMEL]
Consumer Circuit, BICMOS, PQCC16, 4 X 4 MM, LEAD FREE, MO-220, QFN-16;
| 型号： | ATR4254-PEQY |
| 厂家： | 
ATMEL |
| 描述： | Consumer Circuit, BICMOS, PQCC16, 4 X 4 MM, LEAD FREE, MO-220, QFN-16 信息通信管理 商用集成电路 |
| 文件： | 总15页 (文件大小：259K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
•
•
•
•
•
•
•
High Dynamic Range for AM and FM
Integrated AGC for FM
High Intercept Point 3rd-order for FM
FM Amplifier Adjustable to Various Cable Impedances
High Intercept Point 2nd-order for AM
Low-noise Output Voltage
Low-noise
Low Power Consumption
AM/FM Antenna
Impedance
Matching IC
Electrostatic sensitive device.
Observe precautions for handling.
ATR4254
1. Description
The ATR4254 is an integrated low-noise AM/FM antenna impedance matching circuit
in BiCMOS technology. The device is designed specifically for car applications and is
suitable for windshield and roof antennas.
Figure 1-1. Block Diagram
1 (14)
FMIN
15 (13)
FMOUT
FM
2 (15)
GND1
3 (16)
4 (2)
FMGAIN
AGC
13 (10)
12 (9)
AGC
AGCADJ
VREF1
IAGC
14 (11)
VS
5 (3)
VREF2
AMIN
VREF
11 (8)
10 (7)
AMOUT1
AMOUT
8 (6)
AM
7 (5)
GND2
() Pin numbers in brackets = QFN16 4 × 4 package
Rev. 4879A–AUDR–09/05
2. Pin Configuration
Figure 2-1. Pinning SO16
Figure 2-2. Pinning QFN16 4 × 4
FMIN
NC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
16 15 14 13
FMOUT
VS
GND1
FMGAIN
AGC
NC
AGC
12 NC
1
2
3
4
11 VS
VREF2
NC
10 AGCADJ
9
VREF1
5
6 7 8
AGCADJ
VREF1
AMOUT1
AMOUT
VREF2
NC
GND2
AMIN
NC
Table 2-1.
Pin SSO16
Pin Description
Pin QFN16
Symbol
FMIN
Function
1
2
14
15
16
2
FM input
GND1
FMGAIN
AGC
Ground for FM part
FM gain adjustment
AGC output
3
4
5
3
VREF2
NC
Reference voltage 2 output
Not connected
6
1
7
5
GND2
AMIN
Ground for AM part
AM input
8
6
9
4
NC
Not connected
10
11
12
13
14
15
16
7
AMOUT
AMOUT1
VREF1
AGCADJ
VS
AM output
8
AM output
9
Reference voltage 1 output
10
11
13
12
Adjustment FM wide-band AGC threshold
Supply voltage
FMOUT
NC
FM output
Not connected
2
ATR4254
4879A–AUDR–09/05
ATR4254
3. Pin Description
3.1
FMIN
The input of the FM amplifier, FMIN, is a bipolar transitor’s base. A resistor or a coil is connected
between FMIN and VREF2. If a coil is used, the noise performance is excellent.
Figure 3-1. Internal Circuit at Pin FMIN
1
FMIN
ESD
3.2
3.3
GND1
To avoid cross-talk between AM and FM signals, the circuit has two separate ground pins.
GND1 is the ground for the FM part.
FMGAIN
The DC current of the FM amplifier transistor is adjusted by an external resistor which is con-
nected between FMGAIN and GND1. To influence the AC gain of the amplifier, a resistor is
connected in series to a capacitor between FMGAIN and GND1. The capacitor has to shorten
frequencies of 100 MHz.
Figure 3-2. Internal Circuit at Pin FMGAIN
ESD
3
FMGAIN
3.4
AGC
DC current flows into the AGC pin at high FM antenna input signals. This current has to be
amplified via the current gain of an external PNP transistor that feeds a PIN diode. This diode
dampens the antenna’s input signal and protects the amplifier input against overload. The maxi-
mum current which flows into the AGC pin is approximately 1 mA. In low-end applications, the
AGC function is not necessary and the external components can therefore be omitted.
3
4879A–AUDR–09/05
Figure 3-3. Internal Circuit at Pin AGC
AGC
4
ESD
VS
3.5
AGCADJ
The threshold of the AGC can be adjusted by varying the DC current at pin AGCADJ. If pin
AGCADJ is connected directly to GND1, the threshold is set to 96 dBµV at the FM amplifier out-
put. If a resistor is connected between AGCADJ and GND1, the threshold is shifted to higher
values with increasing resistances. If AGCADJ is open, the threshold is set to 106 dBµV.
Figure 3-4. Internal Circuit at Pin AGCADJ
65 kΩ
ESD
13
AGCADJ
3.6
FMOUT
The FM amplifier output is an open collector of a bipolar RF transistor. It should be connected to
VS via a coil.
Figure 3-5. Internal Circuit at Pin FMOUT
15
FMOUT
ESD
4
ATR4254
4879A–AUDR–09/05
ATR4254
3.7
AMIN
The AM input has an internal bias voltage. The DC voltage at this pin is VRef1/2. The input resis-
tance is about 470 kΩ. The input capacitance is less than 10 pF.
Figure 3-6. Internal Circuit at Pin AMIN
VREF1/2
470 kΩ
8
AMIN
ESD
3.8
AMOUT, AMOUT1
The buffered AM amplifier consists of a complementary pair of CMOS source followers. The
transistor gates are connected to AMIN. The pin AMOUT is the NMOS transistor's source, pin
AMOUT1 is the PMOS transistor's source. Due to the two different DC levels of these pins, they
have to be connected together via an external capacitor of about 100 nF. This technique can
achieve an excellent dynamic range.
Figure 3-7. Internal Circuit at Pins AMOUT1 and AMOUT
AMOUT1
11
ESD
AMOUT
10
ESD
3.9
VREF1
VREF1 is the stabilized voltage for the AM amplifier and the AGC block. To achieve excellent
noise performance at LW frequencies, it is recommended that this pin be connected to ground
via an external capacitor of about 1 µF.
5
4879A–AUDR–09/05
Figure 3-8. Internal Circuit at Pin VREF1
VS
12
VREF1
ESD
GND1
3.10 VREF2
For the DC biasing of the FM amplifier, a second voltage reference circuit is integrated. Since
the collector current is temperature independent, the output voltage has a negative temperature
coefficient of about –1 mV/K. To stabilize this voltage, an external capacitor to ground of a few
nF is recommended.
Figure 3-9. Internal Circuit at Pin VREF2
5
VREF2
ESD
GND1
3.11 GND2
GND2 is the ground for the AM amplifier.
6
ATR4254
4879A–AUDR–09/05
ATR4254
4. Functional Description
The ATR4254 is an integrated AM/FM antenna impedance matching circuit. It compensates
cable losses between the antenna (for example, windshield, roof or bumper antennas) and the
car radio, which is usually placed far away from the antenna.
The FM amplifier provides excellent noise performance. External components are used to adjust
the gain and the input-output matching impedance. Therefore, it is possible to adjust the ampli-
fier to various cable impedances (usually 50Ω, 75Ω or 150Ω). To protect the amplifier against
input overload, an Automatic Gain Control (AGC) is included on the chip. The AGC observes the
AC voltage at the FM amplifier output, rectifies this signal, and delivers DC current to dampen
the input antenna signal via an external PIN diode. The threshold for the AGC is adjustable. Sim-
ple and temperature-compensated biasing is possible due to the integrated voltage reference
VRef2
.
The AM part consists of a buffer amplifier. The voltage gain of this stage is approximately one.
The input resistance is 470 kΩ, the input capacitance less than 10 pF. The output resistance is
125Ω. An excellent dynamic range is achieved due to the complementary CMOS source follower
stage.
5. Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Reference point is ground (pins 2 and 7)
Parameters
Symbol
VS
Value
8.8
Unit
V
Supply voltage
Power dissipation, Ptot at Tamb = 85°C
Junction temperature
Ptot
460
mW
°C
°C
°C
V
Tj
150
Ambient temperature
Tamb
Tstg
–40 to +85
–50 to +150
±1000
Storage temperature
Electrostatic handling (HBM at ESD S.5.1)
±VESD
6. Thermal Resistance
Parameters
Symbol
Value
Unit
Junction ambient
RthJA
140
K/W
7
4879A–AUDR–09/05
7. Electrical Characteristics
VS = 8V, Tamb = 25°C, unless otherwise specified (see Figure 7-1 on page 9).
Parameters
Test Conditions
Pin
14
14
12
5
Symbol
VS
Min.
7.2
3.5
5.1
2.3
Typ.
8
Max.
8.8
Unit
V
Supply voltage
Supply currents
IS
4.8
5.4
2.6
–1
5.6
mA
V
Reference voltage 1 output (I12 = 0)
Reference voltage 2 output (I5 = 0)
Temperature dependence of VREF2
AM Amplifier
VRef1
VRef2
VRef2/∆T
5.7
2.8
V
5
mV/K
Input resistance
8
8
RAMIN
CAMIN
ROUT
a
470
kΩ
pF
Ω
Input capacitance
10
Output resistance
10
125
Voltage gain
8, 10
0.85
S1 switched to 2
B = 6 kHz
150 kHz to 300 kHz
500 kHz to 6.5 kHz
Output noise voltage (rms value)
2nd harmonic
10
10
VN1
VN2
–2
–6
dBµV
dBµV
S2 switched to 1
fAMIN = 500 kHz
Output voltage =
110 dBµV
–65
dBc
FM Amplifier
Supply current limit
Input resistance
Output resistance
Power gain
IAGC, IAGCADJ = 0A
f = 100 MHz
15
1
I15
RFMIN
RFMOUT
G
33
50
50
5
35
mA
Ω
f = 100 MHz
15
Ω
f = 100 MHz
1, 15
dB
f = 100 MHz
B = 120 kHz
Output noise voltage
15
15
VN
0
dBµV
dBµV
3rd-order output intercept
f = 100 MHz
132
AGC
f = 100 MHz
S2 switched to 1;
AGC threshold DC
current is 10 µA at
pin 4
AGC input voltage threshold
15
15
Vth1
96
dBµV
f = 100 MHz,
S2 switched to 2;
AGC threshold DC
current is 10 µA at
pin 4
AGC input voltage threshold
AGC output current
Vth2
106
dBµV
mA
AGC active
IAGC
1.2
8
ATR4254
4879A–AUDR–09/05
ATR4254
Figure 7-1. Test Circuit
VS
1
2
2.2 µH
FMOUT
S2
5 kΩ
2.2 nF
AMOUT
I3
I14
I15
2.2
µF
100 nF
9
100 nF
2.2 nF
+
16
150Ω
ATR4254
1
8
I4
FMIN
2.2 nF
2.2 µH
S1
2.2 nF
51Ω
15 pF
2
1
22Ω
VS
1 nF
2.2 nF
AMIN
9
4879A–AUDR–09/05
Figure 7-2. FM Intermodulation Distortion
dBµV
dBµV
Output
108 dBµV
Input
103 dBµV
58 dBµV
Gain = 5 dB
AGC not active
90
95
100
105
90
95
100
105
MHz
MHz
Input
118 dBµV
dBµV
dBµV
Output
100 dBµV
50 dBµV
AGC active
90
95
100
105
90
95
100
105
MHz
MHz
10
ATR4254
4879A–AUDR–09/05
ATR4254
Figure 7-3. Test Circuit for AM Large Signal Behavior
Analyzer
100 nF
100 nF
AMOUT1
LPF
DUT
AMOUT
AMIN
5 kΩ
Rin = 50Ω
1 nF
fcutoff = 500 kHz
50Ω
75 dBµV
115 dBµV
50Ω
f = 500 kHz
V0
Figure 7-4. AM Harmonic Distortion
VAMOUT
(dBµV)
115 dBµV
110
90
70
55 dBµV
45 dBµV
1.5
50
f (MHz)
0.5
1.0
11
4879A–AUDR–09/05
Figure 7-5. Application Circuit
12
ATR4254
4879A–AUDR–09/05
ATR4254
8. Ordering Information
Extended Type Number
Package
SO16
Remarks
ATR4254-TBJY
–
ATR4254-TBQY
SO16
Taping corresponding to ICE-286-3
ATR4254-PEPY
QFN16
QFN16
–
ATR4254-PEQY
Taping corresponding to ICE-286-3
9. Package Information
5.2
4.8
Package SO16
Dimensions in mm
10.0
9.85
3.7
1.4
0.2
0.25
0.10
0.4
3.8
1.27
6.15
5.85
8.89
16
9
technical drawings
according to DIN
specifications
1
8
13
4879A–AUDR–09/05
14
ATR4254
4879A–AUDR–09/05
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4879A–AUDR–09/05
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