ATmega325A-AUR [ATMEL]
8-bit Atmel Microcontroller with 16/32/64KB In-System Programmable Flash; 8位爱特梅尔微控制器与16/32 / 64KB系统内可编程闪存
| 型号： | ATmega325A-AUR |
| 厂家： | 
ATMEL |
| 描述： | 8-bit Atmel Microcontroller with 16/32/64KB In-System Programmable Flash |
| 文件： | 总24页 (文件大小：581K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Atmel ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
8-bit Atmel Microcontroller with 16/32/64KB In-System Programmable Flash
SUMMARY
Features
• High performance, low power Atmel® AVR® 8-Bit Microcontroller
• Advanced RISC architecture
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130 powerful instructions – most single clock cycle execution
32 × 8 general purpose working registers
Fully static operation
Up to 16MIPS throughput at 16MHz (Atmel ATmega165PA/645P)
Up to 20MIPS throughput at 20MHz (Atmel ATmega165A/325A/325PA/645A/3250A/3250PA/6450A/6450P)
On-chip 2-cycle multiplier
• High endurance non-volatile memory segments
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In-system self-programmable flash program memory
• 16KBytes (ATmega165A/ATmega165PA)
• 32KBytes (ATmega325A/ATmega325PA/ATmega3250A/ATmega3250PA)
• 64KBytes (ATmega645A/ATmega645P/ATmega6450A/ATmega6450P)
EEPROM
• 512Bytes (ATmega165A/ATmega165PA)
• 1Kbytes (ATmega325A/ATmega325PA/ATmega3250A/ATmega3250PA)
• 2Kbytes (ATmega645A/ATmega645P/ATmega6450A/ATmega6450P)
Internal SRAM
• 1KBytes (ATmega165A/ATmega165PA)
• 2KBytes (ATmega325A/ATmega325PA/ATmega3250A/ATmega3250PA)
• 4KBytes (ATmega645A/ATmega645P/ATmega6450A/ATmega6450P)
Write/erase cycles: 10,000 flash/100,000 EEPROM
Data retention: 20 years at 85°C/100 years at 25C (1)
Optional Boot Code Section with Independent Lock Bits
• In-System Programming by On-chip Boot Program
• True read-while-write operation
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Programming lock for software security
• Atmel QTouch® library support
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Capacitive touch buttons, sliders and wheels
Atmel QTouch and QMatrix acquisition
Up to 64 sense channels
• JTAG (IEEE std. 1149.1 compliant) interface
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Boundary-scan capabilities according to the JTAG standard
Extensive on-chip debug support
Programming of Flash, EEPROM, Fuses, and Lock Bits through the JTAG Interface
• Peripheral Features
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Two 8-bit Timer/Counters with Separate Prescaler and Compare Mode
One 16-bit Timer/Counter with Separate Prescaler, Compare Mode, and Capture Mode
Real time counter with separate oscillator
Four PWM channels
8-channel, 10-bit ADC
Programmable serial USART
Master/Slave SPI Serial Interface
Universal Serial Interface with Start Condition detector
Programmable Watchdog Timer with separate on-chip oscillator
On-chip Analog Comparator
Interrupt and Wake-up on pin change
• Special microcontroller features
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Power-on reset and programmable Brown-out detection
Internal calibrated oscillator
External and internal interrupt sources
Five sleep modes: Idle, ADC Noise Reduction, Power-save, Power-down and Standby
• I/O and packages
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54/69 programmable I/O lines
64/100-lead TQFP, 64-pad QFN/MLF and 64-pad DRQFN
• Speed grade:
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ATmega 165A/165PA/645A/645P: 0 - 16MHz @ 1.8 - 5.5V
ATmega325A/325PA/3250A/3250PA/6450A/6450P: 0 - 20MHz @ 1.8 - 5.5V
• Temperature range:
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-40°C to 85C industrial
• Ultra-low power consumption (picoPower® devices)
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Active mode:
• 1MHz, 1.8V: 215µA
• 32kHz, 1.8V: 8µA (including oscillator)
Power-down mode: 0.1µA at 1.8V
Power-save mode: 0.6µA at 1.8V (Including 32kHz RTC)
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Note:
1. Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM over
20 years at 85°C or 100 years at 25°C.
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1. Pin configurations
1.1
Pinout - TQFP and QFN/MLF
Figure 1-1. 64A (TQFP)and 64M1 (QFN/MLF) pinout Atmel
ATmega165A/ATmega165PA/ATmega325A/ATmega325PA/ATmega645A/ATmega645P.
DNC
(RXD/PCINT0) PE0
(TXD/PCINT1) PE1
1
2
3
PA3
PA4
PA5
PA6
48
47
46
INDEX CORNER
(XCK/AIN0/PCINT2) PE2
4
45
(AIN1/PCINT3) PE3
5
6
PA7
PG2
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
44
43
(USCK/SCL/PCINT4) PE4
(DI/SDA/PCINT5) PE5
(DO/PCINT6) PE6
7
8
9
42
41
40
(CLKO/PCINT7) PE7
(SS/PCINT8) PB0 10
(SCK/PCINT9) PB1 11
(MOSI/PCINT10) PB2 12
(MISO/PCINT11) PB3 13
39
38
37
36
(OC0A/PCINT12) PB4 14
(OC1A/PCINT13) PB5 15
(OC1B/PCINT14) PB6 16
35
34
33
PG1
PG0
Note:
The large center pad underneath the QFN/MLF packages is made of metal and internally connected to GND. It should be sol-
dered or glued to the board to ensure good mechanical stability. If the center pad is left unconnected, the package might loosen
from the board.
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1.2
Pinout - 100A (TQFP)
Figure 1-2. Pinout Atmel ATmega3250A/ATmega3250PA/ATmega6450A/ATmega6450P.
TQFP
1
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
DNC
PA3
2
(RXD/PCINT0) PE0
PA4
INDEX CORNER
3
(TXD/PCINT1) PE1
(XCK/AIN0/PCINT2) PE2
(AIN1/PCINT3) PE3
(USCK/SCL/PCINT4) PE4
(DI/SDA/PCINT5) PE5
(DO/PCINT6) PE6
(CLKO/PCINT7) PE7
VCC
PA5
4
PA6
5
PA7
6
PG2
7
PC7
8
PC6
9
DNC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
PH3 (PCINT19)
GND
PH2 (PCINT18)
DNC
PH1 (PCINT17)
PH0 (PCINT16)
DNC
(PCINT24) PJ0
(PCINT25) PJ1
DNC
DNC
DNC
DNC
DNC
DNC
DNC
PC5
(SS/PCINT8) PB0
(SCK/PCINT9) PB1
(MOSI/PCINT10) PB2
(MISO/PCINT11) PB3
(OC0A/PCINT12) PB4
(OC1A/PCINT13) PB5
(OC1B/PCINT14) PB6
PC4
PC3
PC2
PC1
PC0
PG1
PG0
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
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2. Overview
The Atmel ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P is a low-power CMOS 8-bit micro-
controller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, this
microcontroller achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power con-
sumption versus processing speed.
2.1
Block diagram
Figure 2-1. Block diagram.
PF0 - PF7
PA0 - PA7
PC0 - PC7
GND
VCC
PORTA DRIVERS
PORTF DRIVERS
PORTC DRIVERS
DATA REGISTER
PORTF
DATA DIR.
REG. PORTF
DATA REGISTER
PORTA
DATA DIR.
REG. PORTA
DATA REGISTER
PORTC
DATA DIR.
REG. PORTC
8-BIT DATA BUS
AVCC
CALIB. OSC
AGND
ADC
INTERNAL
OSCILLATOR
AREF
OSCILLATOR
PROGRAM
COUNTER
STACK
POINTER
WATCHDOG
TIMER
JTAG TAP
TIMING AND
CONTROL
PROGRAM
FLASH
MCU CONTROL
REGISTER
SRAM
ON-CHIP DEBUG
BOUNDARY-
SCAN
INSTRUCTION
REGISTER
TIMER/
COUNTERS
GENERAL
PURPOSE
REGISTERS
X
Y
Z
PROGRAMMING
INSTRUCTION
DECODER
INTERRUPT
UNIT
LOGIC
CONTROL
LINES
ALU
EEPROM
STATUS
REGISTER
AVR CPU
UNIVERSAL
SERIAL INTERFACE
SPI
USART
DATA REGISTER
PORTE
DATA DIR.
REG. PORTE
DATA REGISTER
PORTB
DATA DIR.
REG. PORTB
DATA REGISTER
PORTD
DATA DIR.
REG. PORTD
DATA REG. DATA DIR.
PORTG
REG. PORTG
PORTB DRIVERS
PORTD DRIVERS
PORTG DRIVERS
PORTE DRIVERS
PE0 - PE7
PB0 - PB7
PD0 - PD7
PG0 - PG4
The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are
directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one
single instruction executed in one clock cycle. The resulting architecture is more code efficient while achieving
throughputs up to ten times faster than conventional CISC microcontrollers.
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
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The Atmel ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P provides the following fea-
tures: 16K/32K/64K bytes of In-System Programmable Flash with Read-While-Write capabilities, 512/1K/2K bytes
EEPROM, 1K/2K/4K byte SRAM, 54/69 general purpose I/O lines, 32 general purpose working registers, a JTAG
interface for Boundary-scan, On-chip Debugging support and programming, three flexible Timer/Counters with
compare modes, internal and external interrupts, a serial programmable USART, Universal Serial Interface with
Start Condition Detector, an 8-channel, 10-bit ADC, a programmable Watchdog Timer with internal Oscillator, an
SPI serial port, and five software selectable power saving modes. The Idle mode stops the CPU while allowing the
SRAM, Timer/Counters, SPI port, and interrupt system to continue functioning. The Power-down mode saves the
register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or hardware
reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to maintain a timer base
while the rest of the device is sleeping. The ADC Noise Reduction mode stops the CPU and all I/O modules except
asynchronous timer and ADC, to minimize switching noise during ADC conversions. In Standby mode, the
XTAL/resonator Oscillator is running while the rest of the device is sleeping. This allows very fast start-up com-
bined with low-power consumption.
Atmel offers the QTouch® library for embedding capacitive touch buttons, sliders and wheels functionality into AVR
microcontrollers. The patented charge-transfer signal acquisition offers robust sensing and includes fully
debounced reporting of touch keys and includes Adjacent Key Suppression® (AKS®) technology for unambiguous
detection of key events. The easy-to-use QTouch Suite toolchain allows you to explore, develop and debug your
own touch applications.
The device is manufactured using Atmel’s high density non-volatile memory technology. The On-chip ISP Flash
allows the program memory to be reprogrammed In-System through an SPI serial interface, by a conventional non-
volatile memory programmer, or by an On-chip Boot program running on the AVR core. The Boot program can use
any interface to download the application program in the Application Flash memory. Software in the Boot Flash
section will continue to run while the Application Flash section is updated, providing true Read-While-Write opera-
tion. By combining an 8-bit RISC CPU with In-System Self-Programmable Flash on a monolithic chip, the Atmel
devise is a powerful microcontroller that provides a highly flexible and cost effective solution to many embedded
control applications.
The ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P AVR is supported with a full
suite of program and system development tools including: C Compilers, Macro Assemblers, Program Debug-
ger/Simulators, In-Circuit Emulators, and Evaluation kits.
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
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2.2
Comparison between Atmel
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P
Table 2-1.
Differences between: ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P.
Device
Flash
EEPROM
512Bytes
512Bytes
1Kbyte
1Kbyte
1Kbyte
1Kbyte
2Kbyte
2Kbyte
2Kbyte
2Kbyte
RAM
MHz
16
16
20
20
20
20
16
16
20
20
ATmega165A
ATmega165PA
ATmega325A
ATmega325PA
ATmega3250A
ATmega3250PA
ATmega645A
ATmega645P
ATmega6450A
ATmega6450P
16Kbyte
16Kbyte
32Kbyte
32Kbyte
32Kbytes
32Kbyte
64Kbyte
64Kbyte
64Kbyte
64Kbyte
1Kbyte
1Kbyte
2Kbyte
2Kbyte
2Kbyte
2Kbyte
4Kbyte
4Kbyte
4Kbyte
4Kbyte
2.3
Pin descriptions
2.3.1
VCC
Digital supply voltage.
2.3.2
2.3.3
GND
Ground.
Port A (PA7:PA0)
Port A is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port A output buf-
fers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port A pins that are
externally pulled low will source current if the pull-up resistors are activated. The Port A pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
Port A also serves the functions of various special features of the
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P as listed on ”Alternate functions of
Port B” on page 68.
2.3.4
Port B (PB7:PB0)
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B output buf-
fers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port B pins that are
externally pulled low will source current if the pull-up resistors are activated. The Port B pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
Port B has better driving capabilities than the other ports.
Port B also serves the functions of various special features of the
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P as listed on ”Alternate functions of
Port B” on page 68.
2.3.5
Port C (PC7:PC0)
Port C is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port C output buf-
fers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port C pins that are
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
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8285ES–AVR–02/2013
externally pulled low will source current if the pull-up resistors are activated. The Port C pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
Port C also serves the functions of special features of the Atmel
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P as listed on ”Alternate functions of
Port D” on page 70.
2.3.6
2.3.7
2.3.8
Port D (PD7:PD0)
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D output buf-
fers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port D pins that are
externally pulled low will source current if the pull-up resistors are activated. The Port D pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
Port D also serves the functions of various special features of the
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P as listed on ”Alternate functions of
Port D” on page 70.
Port E (PE7:PE0)
Port E is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port E output buf-
fers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port E pins that are
externally pulled low will source current if the pull-up resistors are activated. The Port E pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
Port E also serves the functions of various special features of the
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P as listed on ”Alternate functions of
Port E” on page 71.
Port F (PF7:PF0)
Port F serves as the analog inputs to the A/D Converter.
Port F also serves as an 8-bit bi-directional I/O port, if the A/D Converter is not used. Port pins can provide internal
pull-up resistors (selected for each bit). The Port F output buffers have symmetrical drive characteristics with both
high sink and source capability. As inputs, Port F pins that are externally pulled low will source current if the pull-up
resistors are activated. The Port F pins are tri-stated when a reset condition becomes active, even if the clock is not
running. If the JTAG interface is enabled, the pull-up resistors on pins PF7(TDI), PF5(TMS), and PF4(TCK) will be
activated even if a reset occurs.
Port F also serves the functions of the JTAG interface, see ”Alternate functions of Port F” on page 73.
2.3.9
Port G (PG5:PG0)
Port G is a 6-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port G output buf-
fers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port G pins that are
externally pulled low will source current if the pull-up resistors are activated. The Port G pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
Port G also serves the functions of various special features of the
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P as listed on page 75.
2.3.10
Port H (PH7:PH0)
Port H is a 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port H output buf-
fers have symmetrical drive characteristics with both high sink and source capability. As inputs, Port H pins that are
externally pulled low will source current if the pull-up resistors are activated. The Port H pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
Port H also serves the functions of various special features of the ATmega3250A/3250PA/6450A/6450P as listed
on page 76.
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2.3.11
Port J (PJ6:PJ0)
Port J is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port J output buffers
have symmetrical drive characteristics with both high sink and source capability. As inputs, Port J pins that are
externally pulled low will source current if the pull-up resistors are activated. The Port J pins are tri-stated when a
reset condition becomes active, even if the clock is not running.
Port J also serves the functions of various special features of the Atmel ATmega3250A/3250PA/6450A/6450P as
listed on page 78.
2.3.12
RESET
Reset input. A low level on this pin for longer than the minimum pulse length will generate a reset, even if the clock
is not running. The minimum pulse length is given in Table 28-13 on page 297. Shorter pulses are not guaranteed
to generate a reset.
2.3.13
2.3.14
2.3.15
XTAL1
Input to the inverting Oscillator amplifier and input to the internal clock operating circuit.
XTAL2
Output from the inverting Oscillator amplifier.
AVCC
AVCC is the supply voltage pin for Port F and the A/D Converter. It should be externally connected to VCC, even if
the ADC is not used. If the ADC is used, it should be connected to VCC through a low-pass filter.
2.3.16
AREF
This is the analog reference pin for the A/D Converter.
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
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3. Ordering Information
3.1
ATmega165A
Speed (MHz)(3)
Power Supply
Ordering Code(2)
Package(1)
Operation Range
ATmega165A-AU
64A
64A
64M1
64M1
64MC
64MC
ATmega165A-AUR(4)
ATmega165A-MU
Industrial
(-40C to 85C)
ATmega165A-MUR(4)
ATmega165A-MCH
ATmega165A-MCHR(4)
16
1.8 - 5.5V
ATmega165A-AN
64A
64A
64M1
64M1
ATmega165A-ANR(4)
ATmega165A-MN
ATmega165A-MNR(4)
Extended
(-40C to 105C)(5)
Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information
and minimum quantities.
2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also
Halide free and fully Green.
3. For Speed vs. VCC, see Figure 28-1 on page 295.
4. Tape & Reel
5. See characterization specifications at 105°C.
Package Type
64A
64-Lead, Thin (1.0mm) Plastic Gull Wing Quad Flat Package (TQFP)
64M1
64MC
64-pad, 9 x 9 x 1.0mm body, lead pitch 0.50mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF)
64-lead (2-row Staggered), 7 x 7 x 1.0 mm body, 4.0 x 4.0mm Exposed Pad, Quad Flat No-Lead Package (QFN)
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3.2
ATmega165PA
Speed (MHz)(3)
Power Supply
Ordering Code(2)
Package(1)
Operation Range
ATmega165PA-AU
64A
64A
64M1
64M1
64MC
64MC
ATmega165PA-AUR(4)
ATmega165PA-MU
Industrial
(-40C to 85C)
ATmega165PA-MUR(4)
ATmega165PA-MCH
ATmega165PA-MCHR(4)
16
1.8 - 5.5V
ATmega165PA-AN
64A
64A
64M1
64M1
ATmega165PA-ANR(4)
ATmega165PA-MN
ATmega165PA-MNR(4)
Extended
(-40C to 105C)(5)
Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information
and minimum quantities.
2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also
Halide free and fully Green.
3. For Speed vs. VCC, see Figure 28-1 on page 295.
4. Tape & Reel.
5. See characterization specifications at 105°C.
Package Type
64A
64-Lead, Thin (1.0mm) Plastic Gull Wing Quad Flat Package (TQFP)
64M1
64MC
64-pad, 9 x 9 x 1.0mm body, lead pitch 0.50mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF)
64-lead (2-row Staggered), 7 x 7 x 1.0mm body, 4.0 x 4.0 mm Exposed Pad, Quad Flat No-Lead Package (QFN)
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
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3.3
ATmega325A
Speed (MHz)(3)
Power Supply
Ordering Code(2)
Package(1)
Operation Range
ATmega325A-AU
64A
64A
64M1
64M1
ATmega325A-AUR(4)
ATmega325A-MU
ATmega325A-MUR(4)
Industrial
(-40C to 85C)
20
1.8 - 5.5V
ATmega325A-AN
64A
64A
64M1
64M1
ATmega325A-ANR(4)
ATmega325A-MN
ATmega325A-MNR(4)
Extended
(-40C to 105C)(5)
Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information
and minimum quantities.
2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also
Halide free and fully Green.
3. For Speed vs. VCC, see Figure 28-1 on page 295.
4. Tape & Reel
5. See characterizations specifications at 105°C.
Package Type
64A
64-Lead, Thin (1.0mm) Plastic Gull Wing Quad Flat Package (TQFP)
64M1
64-pad, 9 x 9 x 1.0mm body, lead pitch 0.50mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF)
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
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3.4
ATmega325PA
Speed (MHz)(3)
Power Supply
Ordering Code(2)
Package(1)
Operation Range
ATmega325PA-AU
64A
64A
64M1
64M1
ATmega325PA-AUR(4)
ATmega325PA-MU
ATmega325PA-MUR(4)
Industrial
(-40C to 85C)
20
1.8 - 5.5V
ATmega325PA-AN
64A
64A
64M1
64M1
ATmega325PA-ANR(4)
ATmega325PA-MN
ATmega325PA-MNR(4)
Extended
(-40C to 105C)(5)
Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information
and minimum quantities.
2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also
Halide free and fully Green.
3. For Speed vs. VCC, see Figure 28-1 on page 295.
4. Tape & Reel
5. See characterization specifications at 105°C.
Package Type
64A
64-Lead, Thin (1.0mm) Plastic Gull Wing Quad Flat Package (TQFP)
64M1
64-pad, 9 x 9 x 1.0mm body, lead pitch 0.50mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF)
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
12
8285ES–AVR–02/2013
3.5
ATmega3250A
Speed (MHz)(3)
Power Supply
Ordering Code(2)
Package(1)
Operation Range
ATmega3250A-AU
100A
100A
Industrial
(-40C to 85C)
ATmega3250A-AUR(4)
20
1.8 - 5.5V
ATmega3250A-AN
100A
100A
Extended
ATmega3250A-ANR(4)
(-40C to 105C)(5)
Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information
and minimum quantities.
2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also
Halide free and fully Green.
3. For Speed vs. VCC, see Figure 28-1 on page 295.
4. Tape & Reel
5. See characterization specifications at 105°C.
Package Type
100A
100-lead, 14 x 14 x 1.0mm, 0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP)
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
13
8285ES–AVR–02/2013
3.6
ATmega3250PA
Speed (MHz)(3)
Power Supply
Ordering Code(2)
Package(1)
Operation Range
ATmega3250PA-AU
100A
100A
Industrial
(-40C to 85C)
ATmega3250PA-AUR(4)
20
1.8 - 5.5V
ATmega3250PA-AN
100A
100A
Extended
ATmega3250PA-ANR(4)
(-40C to 105C)(5)
Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information
and minimum quantities.
2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also
Halide free and fully Green.
3. For Speed vs. VCC, see Figure 28-1 on page 295.
4. Tape & Reel
5. See characterization specifications at 105°C.
Package Type
100A
100-lead, 14 x 14 x 1.0mm, 0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP)
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
14
8285ES–AVR–02/2013
3.7
ATmega645A
Speed (MHz)(3)
Power Supply
Ordering Code(2)
Package(1)
Operation Range
ATmega645A-AU
64A
64A
64M1
64M1
ATmega645A-AUR(4)
ATmega645A-MU
ATmega645A-MUR(4)
Industrial
(-40C to 85C)
20
1.8 - 5.5V
Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information
and minimum quantities.
2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also
Halide free and fully Green.
3. For Speed vs. VCC, see Figure 28-1 on page 295.
4. Tape & Reel
Package Type
64A
64-Lead, Thin (1.0mm) Plastic Gull Wing Quad Flat Package (TQFP)
64M1
64-pad, 9 x 9 x 1.0mm body, lead pitch 0.50mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF)
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
15
8285ES–AVR–02/2013
3.8
ATmega645P
Speed (MHz)(3)
Power Supply
Ordering Code(2)
Package(1)
Operation Range
ATmega645P-AU
64A
64A
64M1
64M1
ATmega645P-AUR(4)
ATmega645P-MU
ATmega645P-MUR(4)
Industrial
(-40C to 85C)
20
1.8 - 5.5V
Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information
and minimum quantities.
2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also
Halide free and fully Green.
3. For Speed vs. VCC, see Figure 28-1 on page 295.
4. Tape & Reel
Package Type
64A
64-Lead, Thin (1.0mm) Plastic Gull Wing Quad Flat Package (TQFP)
64M1
64-pad, 9 x 9 x 1.0mm body, lead pitch 0.50mm, Quad Flat No-Lead/Micro Lead Frame Package (QFN/MLF)
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
16
8285ES–AVR–02/2013
3.9
ATmega6450A
Speed (MHz)(3)
20
Power Supply
Ordering Code(2)
Package(1)
100A
100A
Operation Range
ATmega6450A-AU
Industrial
(-40C to 85C)
1.8 - 5.5V
ATmega6450A-AUR(4)
Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information
and minimum quantities.
2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also
Halide free and fully Green.
3. For Speed vs. VCC, see Figure 28-1 on page 295.
4. Tape & Reel
Package Type
100A
100-lead, 14 x 14 x 1.0mm, 0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP)
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
17
8285ES–AVR–02/2013
3.10 ATmega6450P
Speed (MHz)(3)
Power Supply
Ordering Code(2)
Package(1)
100A
100A
Operation Range
ATmega6450P-AU
Industrial
(-40C to 85C)
20
1.8 - 5.5V
ATmega6450P-AUR(4)
Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information
and minimum quantities.
2. Pb-free packaging, complies to the European Directive for Restriction of Hazardous Substances (RoHS directive). Also
Halide free and fully Green.
3. For Speed vs. VCC, see Figure 28-1 on page 295.
4. Tape & Reel
Package Type
100A
100-lead, 14 x 14 x 1.0mm, 0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP)
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
18
8285ES–AVR–02/2013
4. Packaging Information
4.1
64A
PIN 1
B
e
PIN 1 IDENTIFIER
E1
E
D1
D
C
0°~7°
A2
A
A1
L
COMMON DIMENSIONS
(Unit of measure = mm)
MAX
NOM
NOTE
SYMBOL
MIN
A
–
–
1.20
A1
0.15
0.05
–
0.95
1.00
A2
1.05
D
15.75
13.90
15.75
16.00
14.00
16.00
16.25
D1
14.10 Note 2
Notes:
E
16.25
1.This package conforms to JEDEC reference MS-026, Variation AEB.
E1
13.90
14.00
14.10 Note 2
2. Dimensions D1 and E1 do not include mold protrusion. Allowable
protruis.2pe. Dionsare maximum
B
C
0.30
–
–
–
0.45
sion05mm r sideimensD1andE1
0.09
0.20
plastic body size dimensions including mold mismatch.
3. Lead coplanarity is 0.10mm maximum.
L
0.45
0.75
e
0.80 TYP
2010-10-20
TITLE
DRAWING NO. REV.
2325 Orchard Parkway
64A, 64-lead, 14 x 14mm Body Size, 1.0mm Body Thickness,
64A
C
San Jose, CA 95131
0.8mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP)
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
19
8285ES–AVR–02/2013
4.2
64M1
D
Marked Pin# 1 ID
E
SEATING PLANE
C
A1
TOP VIEW
A
K
0.08
C
L
Pin #1 Corner
SIDE VIEW
D2
Pin #1
Option A
1
Triangle
2
3
COMMON DIMENSIONS
(Unit of Measure = mm)
MAX
NOM
NOTE
SYMBOL
MIN
E2
Option B
A
0.80
0.90
1.00
Pin #1
Chamfer
A1
0.02
0.05
(C 0.30)
–
b
0.18
0.25
0.30
8.90
9.00
9.10
D
D2
5.20
8.90
5.20
5.40
9.00
5.60
9.10
5.60
Option C
K
Pin #1
Notch
(0.20 R)
E
e
b
E2
5.40
BOTTOM VIEW
e
0.50 BSC
0.35
0.45
L
0.40
1.40
1.25
1.55
Notes:
K
1. JEDEC Standard MO-220, (SAW Singulation) Fig. 1, VMMD.
2010-10-19
2. Dimension and tolerance conform to ASMEY14.5M-1994.
DRAWING NO. REV.
TITLE
2325 Orchard Parkway
San Jose, CA 95131
64M1, 64-pad, 9 x 9 x 1.0 mm Body, Lead Pitch 0.50 mm,
64M1
H
R
5.40 mm Exposed Pad, Micro Lead Frame Package (MLF)
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
20
8285ES–AVR–02/2013
4.3
64MC
C
Pin 1 ID
D
SIDE VIEW
y
A1
E
A
TOP VIEW
eT
L
eT/2
A26
B23
A34
B30
COMMON DIMENSIONS
(Unit of Measure = mm)
A1
A25
B1
B22
MIN
0.80
0.00
0.18
MAX
1.00
0.05
0.28
NOM
0.90
0.02
0.23
0.20 REF
7.00
4.00
7.00
4.00
0.65
0.65
–
NOTE
SYMBOL
0.40
A
b
R0.20
A1
b
D2
C
D
6.90
3.95
6.90
3.95
–
7.10
4.05
7.10
4.05
–
eT
D2
E
B7
B16
A8
A18
(0.18) REF
E2
eT
eR
K
B8
B15
A17
A9
L
E2
(0.1) REF
–
–
K
0.20
0.35
0.00
–
(REF)
BOTTOM VIEW
L
0.40
–
0.45
0.075
1. The terminal #1 ID is a Laser-marked Feature.
Note:
y
10/3/07
GPC
ZXC
DRAWING NO.
TITLE
REV.
64MC, 64QFN (2-Row Staggered),
7 x 7 x 1.00 mm Body, 4.0 x 4.0 mm Exposed Pad,
Package Drawing Contact:
packagedrawings@atmel.com
64MC
A
Quad Flat No Lead Package
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
21
8285ES–AVR–02/2013
4.4
100A
PIN 1
B
PIN 1 IDENTIFIER
E1
E
e
D1
D
C
0°~7°
A2
A
A1
L
COMMON DIMENSIONS
(Unit of Measure = mm)
MIN
–
MAX
1.20
NOM
NOTE
SYMBOL
A
–
–
A1
A2
D
0.05
0.95
15.75
13.90
15.75
13.90
0.17
0.09
0.45
0.15
1.00
16.00
14.00
16.00
14.00
–
1.05
16.25
D1
E
14.10 Note 2
16.25
Notes:
E1
B
14.10 Note 2
0.27
1. This package conforms to JEDEC reference MS-026, Variation AED.
2. Dimensions D1 and E1 do not include mold protrusion. Allowable
protrusion is 0.25mm per side. Dimensions D1 and E1 are maximum
plastic body size dimensions including mold mismatch.
C
–
0.20
3. Lead coplanarity is 0.08mm maximum.
L
–
0.75
e
0.50 TYP
2010-10-20
TITLE
DRAWING NO. REV.
2325 Orchard Parkway
San Jose, CA 95131
100A, 100-lead, 14 x 14mm Body Size, 1.0mm Body Thickness,
0.5mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP)
100A
D
R
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
22
8285ES–AVR–02/2013
5. Errata
5.1
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P Rev. G
No known errata.
5.2
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P Rev. A to F
Not sampled.
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P [SUMMARY]
23
8285ES–AVR–02/2013
Atmel Corporation
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© 2013 Atmel Corporation. All rights reserved. / Rev.: 8285ES–AVR–02/2013
Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, and others are registered trademarks or trademarks of Atmel Corporation or its
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