ATmega88PB-AN [ATMEL]
Advanced RISC architecture;型号: | ATmega88PB-AN |
厂家: | ATMEL |
描述: | Advanced RISC architecture |
文件: | 总25页 (文件大小:1096K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
8-bit AVR Microcontroller
ATmega48PB/88PB/168PB
DATASHEET SUMMARY
Introduction
Atmel® ATmega48PB/88PB/168PB is a low-power CMOS 8-bit
microcontroller based on the AVR enhanced RISC architecture. By executing
powerful instructions in a single clock cycle, the ATmega48PB/88PB/168PB
achieves throughputs approaching 1MIPS/MHz, allowing the system
designer to optimize power consumption versus processing speed.
Features
•
Advanced RISC architecture
–
–
–
–
–
131 instructions – most single clock cycle execution
32 x 8 general purpose working registers
Fully static operation
Up to 20MIPS throughput at 20MHz
On-chip 2-cycle Multiplier
•
High endurance non-volatile memory segments
–
4/8/16KBytes of in-system self-programmable Flash program
memory
–
–
–
–
–
256/512/512Bytes EEPROM
512/1K/1KBytes internal SRAM
Write/Erase cycles: 10,000 Flash/100,000 EEPROM
Data retention: 20 years at 85°C/100 years at 25°C
Optional boot code section with independent lock bits
•
In-system programming by on-chip boot program
•
True Read-While-Write (RWW) operation
–
Programming lock for software security
®
®
•
•
Atmel QTouch library support
–
–
–
Capacitive touch buttons, sliders and wheels
®
QTouch and QMatrix acquisition
Up to 64 sense channels
This is a summary document. A
complete document is available
on our Web site at
Peripheral Features
Two 8-bit Timer/Counters (TC) with separate prescaler and
compare mode
–
www.atmel.com
Atmel-42176G-ATmega48PB/88PB/168PB_Datasheet_Summary-03/2016
–
–
–
–
–
–
–
–
–
–
16-bit Timer/Counter with separate prescaler, compare mode, and capture mode
Real Time Counter (RTC) with separate oscillator
Six Pulse Width Modulation (PWM) channels
8-channel 10-bit Analog-to-Digital converter (ADC) with temperature measurement
Programmable serial USART with start-of-frame detection
Master/Slave Serial Interface (SPI)
Byte-oriented Two-Wire serial Interface (TWI), Philips I2C compatible
Programmable Watchdog Timer (WDT) with separate on-chip oscillator
On-chip Analog Comparator (AC)
Interrupt and Wake-up on pin change
•
256-channel capacitive touch and proximity sensing
•
Special microcontroller features
–
–
–
–
Power-On Reset (POR) and programmable brown-out detection (BOD)
Internal calibrated oscillator
External and internal interrupt sources
Six Sleep Modes: Idle, ADC Noise Reduction, Power-Save, Power-Down, Standby, and
Extended Standby
–
Unique device ID
•
•
•
•
•
I/O
–
27 programmable I/O pins
Packages
–
32-pin TQFP, VFQFN
Operating voltage
–
1.8V – 5.5V
Temperature range
-40°C to 105°C
Speed grades
–
–
–
–
0 - 4MHz at 1.8-5.5V
0 - 10MHz at 2.7-5.5.V
0 - 20MHz at 4.5-5.5V
•
Power consumption at 1MHz, 1.8V, 25°C
–
–
–
Active mode: 0.35mA
Power-down mode: 0.23μA
Power-save mode: <1.4μA (including 32kHz RTC)
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Table of Contents
Introduction......................................................................................................................1
Features.......................................................................................................................... 1
1. Description.................................................................................................................4
2. Configuration Summary.............................................................................................5
3. Ordering Information..................................................................................................6
3.1. ATmega48PB............................................................................................................................... 6
3.2. ATmega88PB............................................................................................................................... 6
3.3. ATmega168PB ............................................................................................................................ 7
4. Block Diagram........................................................................................................... 8
5. Pin Configurations..................................................................................................... 9
5.1. Pin Descriptions..........................................................................................................................10
6. I/O Multiplexing........................................................................................................13
7. Comparison Between Processors........................................................................... 14
8. Resources................................................................................................................15
9. Data Retention.........................................................................................................16
10. About Code Examples.............................................................................................17
11. Capacitive Touch Sensing....................................................................................... 18
11.1. QTouch Library...........................................................................................................................18
12. Packaging Information.............................................................................................19
12.1. 32A.............................................................................................................................................19
12.2. 32MS1........................................................................................................................................20
13. Errata.......................................................................................................................21
13.1. Errata ATmega48PB...................................................................................................................21
13.2. Errata ATmega88PB...................................................................................................................22
13.3. Errata ATmega168PB.................................................................................................................23
1.
Description
The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32
registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to
be accessed in one single instruction executed in one clock cycle. The resulting architecture is more code
efficient while achieving throughputs up to ten times faster than conventional CISC microcontrollers.
The ATmega48PB/88PB/168PB provides the following features: 4/8/16Kbytes of In-System
Programmable Flash with Read-While-Write capabilities, 256/512/512 bytes EEPROM, 512/1K/1Kbytes
SRAM, 27 general purpose I/O lines, 32 general purpose working registers, three flexible Timer/Counters
with compare modes, internal and external interrupts, a serial programmable USART, a byte-oriented 2-
wire Serial Interface (I²C), an SPI serial port, a 6-channel 10-bit ADC (8 channels in TQFP and VFQFN
packages), a programmable Watchdog Timer with internal Oscillator, and six software selectable power
saving modes. The Idle mode stops the CPU while allowing the SRAM, Timer/Counters, USART, 2-wire
Serial Interface, SPI port, and interrupt system to continue functioning. The Power-down mode saves the
register contents but freezes the Oscillator, disabling all other chip functions until the next interrupt or
hardware reset. In Power-save mode, the asynchronous timer continues to run, allowing the user to
maintain a timer base while the rest of the device is sleeping. The ADC Noise Reduction mode stops the
CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise during ADC
conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is
sleeping. This allows very fast start-up combined with low power consumption.
®
®
Atmel offers the QTouch library for embedding capacitive touch buttons, sliders and wheels
®
functionality into AVR microcontrollers. The patented charge-transfer signal acquisition offers robust
®
sensing and includes fully debounced reporting of touch keys and includes Adjacent Key Suppression
®
(AKS ) technology for unambiguous detection of key events. The easy-to-use QTouch Composer allows
you to explore, develop and debug your own touch applications.
The device is manufactured using Atmel’s high density non-volatile memory technology. The On-chip ISP
Flash allows the program memory to be reprogrammed In-System through an SPI serial interface, by a
conventional non-volatile memory programmer, or by an On-chip Boot program running on the AVR core.
The Boot program can use any interface to download the application program in the Application Flash
memory. Software in the Boot Flash section will continue to run while the Application Flash section is
updated, providing true Read-While-Write operation. By combining an 8-bit RISC CPU with In-System
Self-Programmable Flash on a monolithic chip, the Atmel ATmega48PB/88PB/168PB is a powerful
microcontroller that provides a highly flexible and cost effective solution to many embedded control
applications.
The ATmega48PB/88PB/168PB AVR is supported with a full suite of program and system development
tools including: C Compilers, Macro Assemblers, Program Debugger/Simulators, In-Circuit Emulators,
and Evaluation kits.
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2.
Configuration Summary
Table 2-1.ꢀConfiguration Summary
ATmega48PB
ATmega88PB
ATmega168PB
Pin count
32
32
32
Flash (KB)
4
8
16
SRAM (Bytes)
EEPROM (Bytes)
Max I/O pins
SPI
512
1024
512
1024
512
256
27
1
TWI (I2C)
1
USART
1
ADC
10-bit 15ksps
ADC channels
AC
8
1
8-bit Timer/Counters
16-bit Timer/Counters
PWM channels
Operating voltage
Max operating frequency
Temperature range
2
1
6
1.8V - 5.5V
20MHz
-40°C to +105°C
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3.
Ordering Information
3.1.
ATmega48PB
Speed [MHz](3) Power Supply [V] Ordering Code(2)
Package(1) Operational Range
20
1.8 - 5.5
ATmega48PB-AU
32A
Industrial
ATmega48PB-AUR(4)
ATmega48PB-MU
ATmega48PB-MUR(4)
32A
32MS1
32MS1
(-40°C to +85°C)
ATmega48PB-AN
32A
Industrial
ATmega48PB-ANR(4)
ATmega48PB-MN
ATmega48PB-MNR(4)
32A
32MS1
32MS1
(-40°C to +105°C)
Note: 1. This device can also be supplied in wafer form. Contact your local Atmel sales office for detailed
ordering information and minimum quantities.
2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS
directive). Also Halide free and fully Green.
3. See ”Speed Grades” on page 304.
4. Tape & Reel.
Package Type
32A
32-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)
32MS1 32-pad, 5.0x5.0x0.9mm body, Lead Pitch 0.50mm, Very-thin Fine pitch, Quad Flat No Lead
Package (VFQFN)
3.2.
ATmega88PB
Speed [MHz](3) Power Supply [V] Ordering Code(2)
Package(1) Operational Range
20
1.8 - 5.5
ATmega88PB-AU
32A
Industrial
ATmega88PB-AUR(4)
ATmega88PB-MU
ATmega88PB-MUR(4)
32A
32MS1
32MS
(-40°C to +85°C)
ATmega88PB-AN
32A
Industrial
ATmega88PB-ANR(4)
ATmega88PB-MN
ATmega88PB-MNR(4)
32A
32MS1
32MS1
(-40°C to +105°C)
Note: 1. This device can also be supplied in wafer form. Contact your local Atmel sales office for detailed
ordering information and minimum quantities.
2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS
directive).Also Halide free and fully Green.
3. See ”Speed Grades” on page 304.
Atmel ATmega48PB/88PB/168PB [DATASHEET]
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4. Tape & Reel.
Package Type
32A
32-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)
32MS1 32-pad, 5.0x5.0x0.9mm body, Lead Pitch 0.50mm, Very-thin Fine pitch, Quad Flat No Lead
Package (VFQFN)
3.3.
ATmega168PB
Speed [MHz] Power Supply [V]
20 1.8 - 5.5
Ordering Code(2)
Package(1) Operational Range
ATmega168PB-AU
32A
Industrial
ATmega168PB-AUR(3)
ATmega168PB-MU
ATmega168PB-MUR(3)
32A
32MS1
32MS1
(-40°C to +85°C)
ATmega168PB-AN
32A
Industrial
ATmega168PB-ANR(3)
ATmega168PB-MN
ATmega168PB-MNR(3)
32A
32MS1
32MS1
(-40°C to +105°C)
Note: 1. This device can also be supplied in wafer form. Contact your local Atmel sales office for detailed
ordering information and minimum quantities.
2. Pb-free packaging complies to the European Directive for Restriction of Hazardous Substances (RoHS
directive).Also Halide free and fully Green.
3. Tape & Reel.
Package Type
32A
32-lead, Thin (1.0mm) Plastic Quad Flat Package (TQFP)
32MS1 32-pad, 5.0x5.0x0.9mm body, Lead Pitch 0.50mm, Very-thin Fine pitch, Quad Flat No Lead
Package (VFQFN)
Atmel ATmega48PB/88PB/168PB [DATASHEET]
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4.
Block Diagram
Figure 4-1.ꢀBlock Diagram
SRAM
CPU
OCD
debugWire
PARPROG
SPIPROG
PB[7:0]
PC[6:0]
PD[7:0]
PE[3:0]
I/O
PORTS
I
N
/
O
U
T
FLASH
NVM
programming
XTAL1 /
TOSC1
Clock generation
8MHz
32.768kHz
GPIOR[2:0]
Calib RC
XOSC
XTAL2 /
TOSC2
External
clock
D
A
T
A
B
U
S
EEPROM
D
A
T
A
B
U
S
OC0A
OC0B
T0
Power
management
and clock
control
TC 0
16MHz LP
XOSC
(8-bit)
128kHz int
osc
MISO
MOSI
SCK
SS
EEPROMIF
SPI
AC
VCC
AIN0
AIN1
ACO
ADCMUX
Power
Watchdog
Timer
Supervision
POR/BOD &
RESET
RESET
GND
Internal
Reference
ADC[7:0]
AREF
INT[1:0]
PCINT[23:16], PCINT[14:0]
ADC
EXTINT
USART 0
TWI
OC1A/B
T1
ICP1
RxD0
TxD0
XCK0
TC 1
(16-bit)
OC2A
OC2B
SDA
SCL
TC 2
(8-bit async)
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5.
Pin Configurations
Figure 5-1.ꢀ32 TQFP Pinout ATmega48PB/88PB/168PB
(PCINT19/OC2B/INT1) PD3
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
PC1 (ADC1/PCINT9)
PC0 (ADC0/PCINT8)
PE3 (ADC7)
GND
(PCINT20/XCK/T0) PD4
(ACO) PE0
VCC
GND
AREF
PE1
PE2 (ADC6)
AVCC
(PCINT6/XTAL1/TOSC1) PB6
(PCINT7/XTAL2/TOSC2) PB7
PB5 (SCK/PCINT5)
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Figure 5-2.ꢀ32 VQFN Pinout ATmega48PB/88PB/168PB
(PCINT19/OC2B/INT1) PD3
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
PC1 (ADC1/PCINT9)
PC0 (ADC0/PCINT8)
PE3 (ADC7)
GND
(PCINT20/XCK/T0) PD4
(ACO) PE0
VCC
GND
AREF
PE1
PE2 (ADC6)
AVCC
(PCINT6/XTAL1/TOSC1) PB6
(PCINT7/XTAL2/TOSC2) PB7
PB5 (SCK/PCINT5)
NOTE:
Bottom pad should be
soldered to ground
5.1.
Pin Descriptions
5.1.1.
VCC
Digital supply voltage.
5.1.2.
GND
Ground.
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5.1.3.
Port B (PB[7:0]) XTAL1/XTAL2/TOSC1/TOSC2
Port B is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port B
output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs,
Port B pins that are externally pulled low will source current if the pull-up resistors are activated. The Port
B pins are tri-stated when a reset condition becomes active, even if the clock is not running.
Depending on the clock selection fuse settings, PB6 can be used as input to the inverting Oscillator
amplifier and input to the internal clock operating circuit.
Depending on the clock selection fuse settings, PB7 can be used as output from the inverting Oscillator
amplifier.
If the Internal Calibrated RC Oscillator is used as chip clock source, PB[7:6] is used as TOSC[2:1] input
for the Asynchronous Timer/Counter2 if the AS2 bit in ASSR is set.
5.1.4.
5.1.5.
Port C (PC[5:0])
Port C is a 7-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The PC[5:0]
output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs,
Port C pins that are externally pulled low will source current if the pull-up resistors are activated. The Port
C pins are tri-stated when a reset condition becomes active, even if the clock is not running.
PC6/RESET
If the RSTDISBL Fuse is programmed, PC6 is used as an I/O pin. Note that the electrical characteristics
of PC6 differ from those of the other pins of Port C.
If the RSTDISBL Fuse is unprogrammed, PC6 is used as a Reset input. A low level on this pin for longer
than the minimum pulse length will generate a Reset, even if the clock is not running. Shorter pulses are
not guaranteed to generate a Reset.
The various special features of Port C are elaborated in the Alternate Functions of Port C section.
5.1.6.
5.1.7.
Port D (PD[7:0])
Port D is an 8-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port D
output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs,
Port D pins that are externally pulled low will source current if the pull-up resistors are activated. The Port
D pins are tri-stated when a reset condition becomes active, even if the clock is not running.
Port E (PE[3:0])
Port E is an 4-bit bi-directional I/O port with internal pull-up resistors (selected for each bit). The Port E
output buffers have symmetrical drive characteristics with both high sink and source capability. As inputs,
Port E pins that are externally pulled low will source current if the pull-up resistors are activated. The Port
E pins are tri-stated when a reset condition becomes active, even if the clock is not running.
5.1.8.
5.1.9.
AVCC
AVCC is the supply voltage pin for the A/D Converter, PC[3:0], and PE[3:2]. It should be externally
connected to VCC, even if the ADC is not used. If the ADC is used, it should be connected to VCC through
a low-pass filter. Note that PC[6:4] use digital supply voltage, VCC
.
AREF
AREF is the analog reference pin for the A/D Converter.
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5.1.10. ADC[7:6] (TQFP and VFQFN Package Only)
In the TQFP and VFQFN package, ADC[7:6] serve as analog inputs to the A/D converter. These pins are
powered from the analog supply and serve as 10-bit ADC channels.
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6.
I/O Multiplexing
Each pin is by default controlled by the PORT as a general purpose I/O and alternatively it can be
assigned to one of the peripheral functions.
The following table describes the peripheral signals multiplexed to the PORT I/O pins.
Table 6-1.ꢀPORT Function Multiplexing
No PAD
EXTINT
PCINT
ADC/AC
OSC
T/C # 0
OC2B
T0
T/C # 1
ICP4
TC4
USART
I2C
SPI
1
PD[3]
PD[4]
PE[0]
VCC
INT1
PCINT19
PCINT20
PCINT24
2
XCK0
3
ACO
SDA1
SCL1
4
5
GND
6
PE[1]
PB[6]
PB[7]
PD[5]
PD[6]
PD[7]
PB[0]
PB[1]
PB[2]
PB[3]
PB[4]
PB[5]
AVCC
PE[2]
AREF
GND
PCINT25
PCINT6
PCINT7
PCINT21
PCINT22
PCINT23
PCINT0
PCINT1
PCINT2
PCINT3
PCINT4
PCINT5
7
XTAL1/TOSC1
XTAL2/TOSC2
8
9
OC0B
OC0A
T1
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
AIN0
AIN1
CLKO
ICP1
OC1A
OC1B
OC2A
SS0
TXD1
RXD1
XCK0
MOSI0
MISO0
SCK0
PCINT26
ADC6
ICP3
T3
SS1
PE[3]
PC[0]
PC[1]
PC[2]
PC[3]
PC[4]
PC[5]
PC[6]/RESET
PD[0]
PD[1]
PD[2]
PCINT27
PCINT8
ADC7
ADC0
ADC1
ADC2
ADC3
ADC4
ADC5
MOSI1
MISO1
SCK1
PCINT9
PCINT10
PCINT11
PCINT12
PCINT13
PCINT14
PCINT16
PCINT17
PCINT18
SDA0
SCL0
OC3A
OC3B
RXD0
TXD0
OC4A
OC4B
INT0
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7.
Comparison Between Processors
The ATmega48PB/88PB/168PB differ only in memory sizes, boot loader support, and interrupt vector
sizes. The table below summarizes the different memory and interrupt vector sizes for the devices.
Table 7-1.ꢀMemory Size Summary
Device
Flash
EEPROM
256Bytes
512Bytes
512Bytes
RAM
Interrupt Vector Size
1 instruction word/vector
1 instruction word/vector
2 instruction words/vector
ATmega48PB
ATmega88PB
ATmega168PB
4KBytes
8KBytes
16KBytes
512Bytes
1KBytes
1KBytes
ATmega88PB/168PB support a real Read-While-Write Self-Programming Mechanism (SPM). The SPM
instruction can only execute from the separate Boot Loader Section. In ATmega48PB there is no Read-
While-Write support and no separate Boot Loader Section. The SPM instruction can execute from the
entire Flash.
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8.
Resources
A comprehensive set of development tools, application notes and datasheets are available for download
on http://www.atmel.com/avr.
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9.
Data Retention
Reliability Qualification results show that the projected data retention failure rate is much less than 1 PPM
over 20 years at 85°C or 100 years at 25°C.
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10.
About Code Examples
This documentation contains simple code examples that briefly show how to use various parts of the
device. These code examples assume that the part specific header file is included before compilation. Be
aware that not all C compiler vendors include bit definitions in the header files and interrupt handling in C
is compiler dependent. Confirm with the C compiler documentation for more details.
For I/O Registers located in extended I/O map, “IN”, “OUT”, “SBIS”, “SBIC”, “CBI”, and “SBI” instructions
must be replaced with instructions that allow access to extended I/O. Typically “LDS” and “STS”
combined with “SBRS”, “SBRC”, “SBR”, and “CBR”.
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11.
Capacitive Touch Sensing
11.1. QTouch Library
The Atmel® QTouch® Library provides a simple to use solution to realize touch sensitive interfaces on
most Atmel AVR® microcontrollers. The QTouch Library includes support for the Atmel QTouch and Atmel
QMatrix® acquisition methods.
Touch sensing can be added to any application by linking the appropriate Atmel QTouch Library for the
AVR Microcontroller. This is done by using a simple set of APIs to define the touch channels and sensors,
and then calling the touch sensing API’s to retrieve the channel information and determine the touch
sensor states.
The QTouch Library is FREE and downloadable from the Atmel website at the following location: http://
www.atmel.com/technologies/touch/. For implementation details and other information, refer to the Atmel
QTouch Library User Guide - also available for download from the Atmel website.
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12.
Packaging Information
12.1. 32A
PIN 1 IDENTIFIER
PIN 1
B
e
E1
E
D1
D
C
0°~7°
A2
A
A1
L
COMMON DIMENSIONS
(Unit of measure = mm)
MIN
–
MAX
1.20
0.15
1.05
9.25
7.10
9.25
7.10
0.45
0.20
0.75
NOM
NOTE
SYMBOL
A
–
–
A1
A2
D
0.05
0.95
8.75
6.90
8.75
6.90
1.00
9.00
7.00
9.00
7.00
–
D1
E
Note 2
Note 2
Notes:
1. This package conforms to JEDEC reference MS-026, Variation ABA.
2. Dimensions D1 and E1 do not include mold protrusion. Allowable
protrusion is 0.25mm per side. Dimensions D1 and E1 are maximum
plastic body size dimensions including mold mismatch.
3. Lead coplanarity is 0.10mm maximum.
E1
B
0.30
C
0.09
0.45
–
L
–
e
0.80 TYP
2010-10-20
TITLE
DRAWING NO. REV.
32A,32-lead, 7 x 7mm body size, 1.0mm body thickness,
0.8mm lead pitch, thin profile plastic quad flat package (TQFP)
32A
C
Atmel ATmega48PB/88PB/168PB [DATASHEET]
19
Atmel-42176G-ATmega48PB/88PB/168PB_Datasheet_Summary-03/2016
12.2. 32MS1
TOP VIEW
D
SIDE VIEW
C
32
0.08 C
1
2
PIN 1 ID
E
0.10
2X
2X
C
A3
A1
0.10 C
BOTTOM VIEW
D2
A
L
(32X)
0.10 C
e e/2
E2
COMMON DIMENSIONS
(Unit of Measure = mm)
2
MIN
MAX
TYP
NOTE
SYMBOL
1
A
A1
A3
b
0.80
0.00
-
-
0.90
0.05
Pin 1 Corner
See Option A,B
Option A
32
K
(32X)
b
Option B
PIN
Notch
(R 0.20)
# 1 ID
PIN
Chamfer
(C 0.30)
# 1 ID
0.20 REF
0.25
5.00
3.10
5.00
3.10
0.50
0.40
-
0.18
4.90
3.00
4.90
3.00
-
0.30
5.10
3.20
5.10
3.20
-
2
1
1
D
32
32
D2
E
NOTE:
1. Refer to JEDEC Drawing MO-220, Variation VHHD-2 (Figure 1/Saw
Singulation)
2. Dimension “b” applies to metalized terminal and is measured between
0.15mm and 0.30mm from the terminal tip. If the terminal has the
optional radius on the other end of the terminal, the dimensions
should not be measured in that radius area.
E2
e
L
0.30
0.20
0.50
-
K
12/4/13
TITLE
DRAWING NO.
REV.
GPC
32MS1, 32-pad 5.0x5.0x0.9 mm Body, 0.50mm pitch, 3.1x3.1
mm Exposed pad, Saw Singulated Thermally Enhanced
Plastic Very-thin Fine pitch, Quad Flat No Lead package
Package Drawing Contact:
ZMF
32MS1
A
packagedrawings@atmel.com
(VFQFN)
Atmel ATmega48PB/88PB/168PB [DATASHEET]
20
Atmel-42176G-ATmega48PB/88PB/168PB_Datasheet_Summary-03/2016
13.
Errata
13.1. Errata ATmega48PB
The revision letter in this section refers to the revision of the ATmega48PB device.
13.1.1. Rev. A
– Wrong device ID when using debugWire
– Power consumption in power save modes
– USART start-up functionality not working
– External capacitor on AREF pin
1.) Wrong device ID when using debugWire
The device ID returned using debugWire is incorrect.
Problem Fix/Workaround
None.
2.) Power consumption in power save modes
Power consumption in power save modes will be higher due to improper control of internal power
management.
Problem Fix/Workaround
None.
3.) USART start-up functionality not working
While in power save modes, the USART start bit detection logic fails to wakeup the device.
Problem Fix/Workaround
None.
4.) External capacitor on AREF pin
If an external capacitor is used on the analog reference pin (AREF), it should be equal to or larger than
100nF. Smaller capacitor value can make the AREF buffer unstable with large ringing which will reduce
the accuracy of the ADC.
Problem Fix/Workaround
None.
13.1.2. Rev. B
– External capacitor on AREF pin
1.) External capacitor on AREF pin
If an external capacitor is used on the analog reference pin (AREF), it should be equal to or larger than
100nF. Smaller capacitor value can make the AREF buffer unstable with large ringing which will reduce
the accuracy of the ADC.
Problem Fix/Workaround
None.
Atmel ATmega48PB/88PB/168PB [DATASHEET]
21
Atmel-42176G-ATmega48PB/88PB/168PB_Datasheet_Summary-03/2016
13.1.3. Rev. C
No known errata.
13.1.4. Rev. D to J
Not sampled.
13.1.5. Rev. K
No known errata.
13.2. Errata ATmega88PB
The revision letter in this section refers to the revision of the ATmega88PB device.
13.2.1. Rev. A
– Wrong device ID when using debugWire
– Power consumption in power save modes
– USART start-up functionality not working
– External capacitor on AREF pin
1.) Wrong device ID when using debugWire
The device ID returned using debugWire is incorrect.
Problem Fix/Workaround
None.
2.) Power consumption in power save modes
Power consumption in power save modes will be higher due to improper control of internal power
management.
Problem Fix/Workaround
None.
3.) USART start-up functionality not working
While in power save modes, the USART start bit detection logic fails to wakeup the device.
Problem Fix/Workaround
None.
4.) External capacitor on AREF pin
If an external capacitor is used on the analog reference pin (AREF), it should be equal to or larger than
100nF. Smaller capacitor value can make the AREF buffer unstable with large ringing which will reduce
the accuracy of the ADC.
Problem Fix/Workaround
None.
13.2.2. Rev. B
– External capacitor on AREF pin
1.) External capacitor on AREF pin
Atmel ATmega48PB/88PB/168PB [DATASHEET]
22
Atmel-42176G-ATmega48PB/88PB/168PB_Datasheet_Summary-03/2016
If an external capacitor is used on the analog reference pin (AREF), it should be equal to or larger than
100nF. Smaller capacitor value can make the AREF buffer unstable with large ringing which will reduce
the accuracy of the ADC.
Problem Fix/Workaround
None.
13.2.3. Rev. C
No known errata.
13.2.4. Rev. D to J
Not sampled.
13.2.5. Rev. K
No known errata.
13.3. Errata ATmega168PB
The revision letter in this section refers to the revision of the ATmega168PB device.
13.3.1. Rev. A
– Wrong device ID when using debugWire
– Power consumption in power save modes
– USART start-up functionality not working
– External capacitor on AREF pin
1.) Wrong device ID when using debugWire
The device ID returned using debugWire is incorrect.
Problem Fix/Workaround
None.
2.) Power consumption in power save modes
Power consumption in power save modes will be higher due to improper control of internal power
management.
Problem Fix/Workaround
None
3.) USART start-up functionality not working
While in power save modes, the USART start bit detection logic fails to wakeup the device.
Problem Fix/Workaround
None.
4.) External capacitor on AREF pin
If an external capacitor is used on the analog reference pin (AREF), it should be equal to or larger than
100nF. Smaller capacitor value can make the AREF buffer unstable with large ringing which will reduce
the accuracy of the ADC.
Problem Fix/Workaround
Atmel ATmega48PB/88PB/168PB [DATASHEET]
23
Atmel-42176G-ATmega48PB/88PB/168PB_Datasheet_Summary-03/2016
None.
13.3.2. Rev. B
– Power consumption in power save modes
– External capacitor on AREF pin
1.) Power consumption in power save modes
Power consumption in power save modes will be higher due to improper control of internal power
management.
Problem Fix/Workaround
None
2.) External capacitor on AREF pin
If an external capacitor is used on the analog reference pin (AREF), it should be equal to or larger than
100nF. Smaller capacitor value can make the AREF buffer unstable with large ringing which will reduce
the accuracy of the ADC.
Problem Fix/Workaround
None.
13.3.3. Rev. C
– External capacitor on AREF pin
1.) External capacitor on AREF pin
If an external capacitor is used on the analog reference pin (AREF), it should be equal to or larger than
100nF. Smaller capacitor value can make the AREF buffer unstable with large ringing which will reduce
the accuracy of the ADC.
Problem Fix/Workaround
None.
13.3.4. Rev. D
No known errata.
13.3.5. Rev. D to M
Not sampled.
13.3.6. Rev. N
No known errata.
Atmel ATmega48PB/88PB/168PB [DATASHEET]
24
Atmel-42176G-ATmega48PB/88PB/168PB_Datasheet_Summary-03/2016
Atmel Corporation
1600 Technology Drive, San Jose, CA 95110 USA
T: (+1)(408) 441.0311
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|
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©
2016 Atmel Corporation. / Rev.: Atmel-42176G-ATmega48PB/88PB/168PB_Datasheet_Summary-03/2016
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