U217B-FP [ATMEL]

Analog Circuit, 1 Func, BIPolar, PDSO8, SO-8;
U217B-FP
型号: U217B-FP
厂家: ATMEL    ATMEL
描述:

Analog Circuit, 1 Func, BIPolar, PDSO8, SO-8

光电二极管
文件: 总11页 (文件大小:148K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
U217B  
Zero-Voltage Switch with Adjustable Ramp  
Description  
The integrated circuit, U217B, is designed as a zero- A ramp generator allows power control function by  
voltage switch in bipolar technology. It is used to control period group control, whereas full-wave logic guarantees  
resistive loads at mains by a triac in zero-crossing mode. that full mains cycles are used for load switching.  
Features  
Simple power control  
Direct supply from the mains  
Ramp generator  
Current consumption 0.5 mA  
Reference voltage  
Very few external components  
Applications  
Full-wave drive – no DC current component in the  
Full-wave power control  
load circuit  
Temperature regulation  
Negative output current pulse typ. 100 mA –  
short-circuit protected  
Power blinking switch  
Block Diagram  
L
D1  
BYT86/800  
R2  
18 k  
2 W  
Load  
1000 W  
220 k  
(250 V~)  
R1  
(Rsync  
)
R4  
100 k  
C2  
C1  
100 F/  
16 V  
2
8
5
VM  
=
2.2 F/  
10 V  
1
7
6
Ramp  
generator  
230 V~  
Synchronization  
Supply  
TIC  
GND  
MT2  
MT1  
236N  
100  
R3  
R5  
15 k  
3
4
+
+
Full-wave logic  
max  
min  
G
Pulse  
amplifier  
Comparator  
100 k  
Reference voltage  
1.25 V  
R6  
U217B  
58 k  
N
Figure 1. Block diagram with typical circuit, period group control 0 to 100%  
Order Information  
Extended Type Number  
Package  
DIP8  
SO8  
Remarks  
U217B-x  
U217B-xFP  
Tube  
Tube  
U217B-xFPG3  
SO8  
Taped and reeled  
Rev. A3, 05-Nov-99  
1 (11)  
U217B  
Pin Description  
U217B  
1
2
3
4
8
7
6
5
Ramp  
V
sync  
Ramp  
control  
C
Ramp  
GND  
1
U217B  
OP+  
Output  
2
C
2
–V  
S
OP–  
V
S
Figure 3. Pin 1 internal network  
Figure 2. Pinning  
Pin  
1
Symbol  
Ramp  
Function  
Ramp output  
t
2
C
RAmp  
Ramp capacitor  
V
1
3
OP+  
OP–  
OP non-inverting input  
OP inverting input  
Supply voltage  
Final voltage  
1.4 V  
V
min  
4
5
V
S
6
Output  
GND  
Trigger pulse output  
Ground  
Initial voltage  
max  
7.3 V  
T
V
7
8
V
sync  
Voltage synchronization  
–V  
S(Pin5)  
Figure 4. Threshold voltage of the ramp  
General Description  
The integrated circuit U217B is a triac controller for zero-  
crossing mode. It is designed to control power in  
switching resistive loads of mains supplies.  
Triac Firing Current (Pulse)  
This depends on the triac requirement. It can be limited  
with gate series resistance which is calculated as follows:  
Information regarding supply sync. is provided at Pin 8  
7.5 V – V  
Gmax  
via resistor R  
.
Sync  
R
Gmax  
– 36  
I
Gmax  
To avoid DC load on the mains, the full-wave logic  
guarantees that complete mains cycles are used for load  
switching.  
I
Gmax  
I =  
P
t
p
T
A fire pulse is released when the inverted input of the  
comparator is negative (Pin 4) with respect to the  
non–inverted input (Pin 3) and internal reference voltage.  
A ramp generator with free selectable duration can be  
where:  
V
G
= Gate voltage  
IGmax = Maximum gate current  
I
= Average gate current  
= Firing pulse width  
= Mains period duration  
p
performed by capacitor C at Pin 2. The ramp function is  
2
t
p
used for open-loop control (figure 4), but also for applica-  
tion with proportional band regulation (figure 11). Ramp  
T
voltage available at capacitor C is decoupled across the  
2
Firing Pulse Width tp (Figure 5)  
emitter follower at Pin l. To maintain the lamp flicker  
specification, ramp duration is adjusted according to the  
controlling load. In practice, interference should be  
avoided (temperature control). Therefore, a two-point  
control is preferred to proportional control. One can use  
internal reference voltage for simple applications. In that  
case, Pin 3 is inactive and connected to Pin 7 (GND), see  
figure 13.  
This depends on the latching current of the triac and its  
load current. The firing pulse width is determined by the  
zero-crossing identification which can be influenced with  
the help of sync. resistance, R , (figure 6).  
sync  
I
V
M
2
L
t =  
p
arc. sin  
P 2  
2 (11)  
Rev. A3, 05-Nov-99  
U217B  
whereby:  
The series resistance R can be calculated (figures 7  
1
I
V
P
=
=
=
Latching current of the triac  
Mains supply, effective  
Power load (user’s power)  
and 8) as follows:  
L
M
2
V
V
(V  
V )  
min – Smax  
M – S  
R
1max  
= 0.85  
; P  
=
(R1)  
2 I  
tot  
2 R  
1
Total current consumption is influenced by the firing  
pulse width which can be calculated as follows:  
I
= I + I + I  
S P x  
tot  
t
p
VM 2 sin (  
3.5  
)–0.6 V  
2
Rsync  
–49 k  
whereby:  
10–5  
A
V
V
= Mains voltage  
= Limiting voltage of the IC  
= Total current consumption  
= Current requirement of the IC (without load)  
= Current requirement of other peripheral  
components  
M
S
10.00  
I
I
I
tot  
V
= 230 V  
mains  
S
x
1.00  
0.10  
0.01  
P
(R1)  
= Power dissipation at R  
1
50  
I
L
( mA)  
200  
40  
30  
V
=230V  
100  
50  
Mains  
10  
100  
1000  
P ( W )  
10000  
20  
10  
0
Figure 5. Output pulse width  
3600  
3200  
2800  
2400  
2000  
1600  
1200  
800  
15  
0
3
6
9
12  
I
( mA )  
tot  
Figure 7. Maximum resistance of R1  
6
5
V
=230V  
Mains  
400  
4
3
2
1
0
0
0
200 400 600 800 1000 1200  
tp  
Figure 6. Synchronization resistance  
Supply Voltage  
The integrated circuit U217B (which also contains  
internal voltage limiting) can be connected via the diode  
15  
0
3
6
9
12  
I
( mA )  
tot  
(D ) and the resistor (R ) with the mains supply. An  
1
1
internal climb circuit limits the voltage between Pin 5 and  
7 to a typical value of 9.25 V.  
Figure 8. Power dissipation of R1  
according to current consumption  
Rev. A3, 05-Nov-99  
3 (11)  
U217B  
Absolute Maximum Ratings  
Reference point Pin 7  
Parameters  
Supply current  
Sync. current  
Output current ramp generator  
Input voltages  
Symbol  
–I  
I
Sync.  
Value  
30  
5
Unit  
mA  
mA  
mA  
V
V
V
Pin 5  
Pin 8  
Pin 1  
Pin 1, 3, 4, 6  
Pin 2  
S
I
3
O
–V  
–V  
V  
I
S
2 to V  
I
S
Pin 8  
±V  
7.3  
I
Power dissipation  
T
= 45°C  
= 100°C  
P
P
T
j
400  
125  
125  
mW  
mW  
°C  
amb  
tot  
tot  
T
amb  
Junction temperature  
Operating ambient temperature range  
Storage temperature range  
T
T
0 to 100  
–40 to + 125  
°C  
°C  
amb  
stg  
Thermal Resistance  
Parameters  
Symbol  
R
thJA  
Value  
200  
Unit  
K/W  
Junction ambient  
Electrical Characteristics  
–V = 8.5 V, T  
= 25°C, reference point Pin 7, unless otherwise specified  
S
amb  
Parameters  
Supply-voltage limitation  
Supply current  
Voltage limitation  
Synchronous current  
Zero detector  
Test Conditions / Pin  
Symbol  
–V  
Min.  
8.6  
Typ.  
9.25  
Max.  
9.9  
500  
8.7  
Unit  
V
A
V
mA  
A
–I = 5 mA  
Pin 5  
Pin 5  
Pin 8  
Pin 8  
S
S
–I  
S
I = ± 1 mA  
± V  
7.5  
0.12  
8
I
±I  
±I  
sync  
sync  
35  
Output pulse width  
V = 230 V  
M
,
R
sync  
R
sync  
= 220 k  
= 470 k  
t
P
t
P
260  
460  
s
s
Output pulse current  
Comparator  
Input offset voltage  
Input bias current  
Common-mode input  
voltage  
V = 0 V  
6
Pin 6  
–I  
100  
1
mA  
O
Pin 3,4  
Pin 4  
Pin 3,4  
V
I0  
5
15  
1
mV  
A
V
I
IB  
–V  
(V –1)  
IC  
S
Threshold internal  
reference  
V = 0 V  
3
Pin 4  
–V  
1.25  
V
T
Ramp generator, Pin 1, figure 1  
Period  
–I = 1 mA, I  
S
=1 mA,  
sync  
C = 100 F, C = 1 F,  
1
2
R = 100 k  
T
1.5  
1.40  
7.3  
17  
s
4
Final voltage  
Initial voltage  
Charge current  
V
V
0.9  
6.8  
13  
1.80  
7.8  
26  
V
V
A
1
1
V = 0 V, I = 1 mA Pin 2  
2
–I  
2
8
4 (11)  
Rev. A3, 05-Nov-99  
U217B  
Applications  
L
R
L
270 k  
Load  
1N4007  
V
M
= 230 V ~  
N
18 k  
56  
1.5 W  
VDR  
+5 V  
8
1
6
5
4
7
CNY21  
U217B  
2
3
56 k  
47 F/  
10 V  
I
1.5 mA  
I
39 k  
V
I
Figure 9. Power switch  
L
D
1
1N4007  
2.2 F/  
10 V  
C
2
R
(R  
18 k  
2 W  
/
Load  
1000 W  
2
220 k  
(250 V~)  
R
1
)
sync  
R
8
R
4
C
1
470 k  
2
8
5
100 k  
V
=
M
BC237  
1
7
6
Ramp  
generator  
230 V~  
Synchronization  
Full-wave logic  
Supply  
NTC/M87  
B value =  
3988  
R
R
6
1)  
(25)  
R
5
100 k  
100 k  
3
4
100  
R
+
+
Pulse  
amplifier  
R
9
3
Comparator  
150  
Reference voltage  
1.25 V  
U217B  
R
p
R
7
220 k  
130 k  
N
Figure 10. Temperature control 15 to 35°C with sensor monitoring  
NTC–Sensor M 87 Fabr. Siemens  
1)  
R( ) =100 k /B =3988  
25  
R
(15)  
= 159 k  
R
5
determines the proportional range  
R( ) = 64.5 k  
35  
Rev. A3, 05-Nov-99  
5 (11)  
U217B  
L
0.5 ...  
2.2 kW  
BYT86/800  
270 k  
100 nF/  
250 V ~  
V = 230 V ~  
M
18 k /  
1.5 W  
56  
82  
N
8
6
5
7
U217B  
1
2
3
4
150 k  
110 k  
0.47 F/  
10 V  
47 F/ 16V  
Figure 11. Power blinking switch with f 2.7 Hz, duty cycle 1:1, power range 0.5 to 2.2 kW  
6 (11)  
Rev. A3, 05-Nov-99  
U217B  
– T  
L
BYT86/800  
1N4148  
R
1
0.35 ...  
1.5 kW  
R
4
Load  
= 230 V ~  
510 k  
680 k  
R
5
V
M
680 k  
R
2
R
3
13 k /2 W  
I = 50 mA  
H
62  
N
1N4148  
R
16  
8
6
5
7
220 k  
R
6
U217B  
9.1 k  
R
7
12 k  
1
2
3
4
R
10  
R
15  
C
3
910 k  
25 k  
R
9
10 nF  
C
1
NTC  
33 k  
2.2 F  
12 k  
R
8
C
5
C
C
2
4
100 F/  
12 V  
56 k  
47 F  
1 F  
Figure 12. Room temperature control with definite reduction (remote control) for a temperature range of 5 to 30°C  
Rev. A3, 05-Nov-99  
7 (11)  
U217B  
L
220 k  
BYT51G  
Load/ 1000 W  
= 230 V ~  
V
M
18 k  
1.5 W  
VDR  
56  
N
8
6
5
7
220 k  
(680 k  
U217B  
500 k  
(2 M  
1
2
3
4
50 k  
(200 k  
10 nF  
68 F/  
10 V  
NTC  
Figure 13. Two–point temperature control for a temperature range of 15 to 30°C  
8 (11)  
Rev. A3, 05-Nov-99  
U217B  
L
D
1
R
sync  
BYT51G  
Load/400 W  
430 k  
V
M
= 230 V~  
18 k /  
1.5 W  
R
1
92  
N
R
3
8
6
5
7
NTC  
200 k  
U217B  
D
2
1N4148  
1
2
3
4
R
6
R /  
15  
50 k  
27 k  
330 k  
R / 39 k  
4
R
5
C
2
8.2 k  
R /  
7
150 nF  
C
3
C
1
33 F/  
10 V  
68 F/  
10 V  
Figure 14. Two-point temperature control for a temperature range of 18 to 32°C and a hysteresis of ± 0.5°C at 25°C  
Rev. A3, 05-Nov-99  
9 (11)  
U217B  
Package Information  
Package DIP8  
Dimensions in mm  
9.8  
9.5  
7.77  
7.47  
1.64  
1.44  
4.8 max  
3.3  
6.4 max  
0.5 min  
0.36 max  
0.58  
0.48  
9.8  
8.2  
2.54  
7.62  
8
5
technical drawings  
according to DIN  
specifications  
1
4
Package SO8  
Dimensions in mm  
5.2  
4.8  
5.00  
3.7  
4.85  
1.4  
0.2  
0.25  
0.10  
0.4  
3.8  
1.27  
6.15  
5.85  
3.81  
8
5
technical drawings  
according to DIN  
specifications  
1
4
10 (11)  
Rev. A3, 05-Nov-99  
U217B  
Ozone Depleting Substances Policy Statement  
It is the policy of TEMIC Semiconductor GmbH to  
1. Meet all present and future national and international statutory requirements.  
2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems  
with respect to their impact on the health and safety of our employees and the public, as well as their impact on  
the environment.  
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as  
ozone depleting substances (ODSs).  
The Montreal Protocol (1987) and its London Amendments (1990) intend to severely restrict the use of ODSs and  
forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban  
on these substances.  
TEMIC Semiconductor GmbH has been able to use its policy of continuous improvements to eliminate the use of  
ODSs listed in the following documents.  
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively  
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental  
Protection Agency (EPA) in the USA  
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.  
TEMIC Semiconductor GmbH can certify that our semiconductors are not manufactured with ozone depleting  
substances and do not contain such substances.  
We reserve the right to make changes to improve technical design and may do so without further notice.  
Parameters can vary in different applications. All operating parameters must be validated for each customer  
application by the customer. Should the buyer use TEMIC Semiconductors products for any unintended or  
unauthorized application, the buyer shall indemnify TEMIC Semiconductors against all claims, costs, damages,  
and expenses, arising out of, directly or indirectly, any claim of personal damage, injury or death associated with  
such unintended or unauthorized use.  
TEMIC Semiconductor GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany  
Telephone: 49 (0)7131 67 2594, Fax number: 49 (0)7131 67 2423  
Rev. A3, 05-Nov-99  
11 (11)  

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