U4065B-AFL [ATMEL]
FM Receiver IC; FM接收器IC
| 型号： | U4065B-AFL |
| 厂家： | 
ATMEL |
| 描述： | FM Receiver IC |
| 文件： | 总34页 (文件大小：350K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
• On-chip Control Functions are Available for System Gain Adjust
(dB Linear versus DC Current)
• Low Noise LO Design
• ESD Protected
Benefits
FM Receiver IC
U4065B
• All Front-end Functions of a High-performance FM Receiver Except the RF
Preamplifier are Integrated
• Improved Dynamic Range by High Current Double-balanced Mixer Design and a New
AGC Conception with 3 Loops On-chip
• Improved Blocking and Intermod Behavior Due to a Unique “Interference” Sensor
Controlling the AGC
• Easy Cascading of 3 IF Filters (Ceramic) Enabled by Two On-chip IF Preamplifiers
Description
The IC U4065B is a bipolar integrated FM front-end circuit. It contains a mixer, an
oscillator, two IF preamplifiers and an unique interference sensor. The device is
designed for high-performance car radio and home receiver applications.
Rev. 4807A–AUDR–05/04
Figure 1. Block Diagram
VS
VS
IF gain adjust
ANT
IF BPF
IF tank
IF BPF
IF output
IF BPF
19
18
5
3
20
7
21 4
RF tank
16
14
2
PIN
Mixer
IF 1
IF 2
ATT
AGC
wide band
and IF
13
AGC adjust
(wide band)
RF
Interference
mixer
RF tank
NC
12
VREF = 4 V
IF and
LO tank
detector
23
24
17
Voltage
Local
oscillator
regulator
6
+
9
11
1
8
22
10
VS
Interference
IF BPF
LO output
VTUNE
VS
AGC level
2
U4065B
4807A–AUDR–05/04
U4065B
Pin Configuration
Figure 2. Pinning SO24
1
2
3
4
5
6
7
8
9
24 LOB
23 LOE
LOBUFF
GND1
22
21
20
GND5
IF2OUT
GAINIF1
IF2IN
IF1IN
GND4
MIXOUT2
MIXOUT1
19
18
17
VS
IF1OUT
VREF
GND2
IMIFIN
16
MIXIN2
10
11
15
14
AGCOUT
MIXIN1
GND3
IMMIXOUT
NC 12
13
AGCWB
3
4807A–AUDR–05/04
Pin Description
Pin
Symbol
Function
1
LOBUFF
GND1
Buffered local oscillator output
Ground of the second IF amplifier
Output of the second IF amplifier
Gain control of the first IF amplifier
Input of the second IF amplifier
Supply voltage
2
3
IF2OUT
GAINIF1
IF2IN
4
5
6
VS
7
IF1OUT
GND2
Output of the first IF amplifier
Ground
8
9
IMIFIN
AGCOUT
IMMIXOUT
NC
Input of the amplifier for the IM sensor
Output of the automatic gain control
Output of the intermodulation mixer
Not connected
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
AGCWB
GND3
Threshold adjustment of the wideband AGC
Mixer ground
MIXIN1
MIXIN2
VREF
Input 1 of the double-balanced mixer
Input 2 of the double-balanced mixer
Reference voltage output
Mixer output 1
MIXOUT1
MIXOUT2
GND4
Mixer output 2
Ground of the first IF amplifier
Input of the first IF amplifier
Oscillator ground
IF1IN
GND5
LOE
Local oscillator (emitter)
Local oscillator (base)
LOB
4
U4065B
4807A–AUDR–05/04
U4065B
LOBUFF
Figure 3. Buffered Local Oscillator Output
+
23
50
1
ESD
1 V
The buffered local oscillator used for output, drives the FM input of the PLL circuit (for
example, U428xBM family). The typical parallel output resistance at 100 MHz is 70 Ω,
the parallel output capacitance is about 10 pF. When using an external load of 500 Ω/10
pF, the oscillator swing is about 100 mV. The second harmonic of the oscillator fre-
quency is less than -15 dBc.
GND1
Figure 4. Ground of the Second IF Amplifier
8
ESD
2
There is no internal connection to the other ground pins.
IF2OUT
Figure 5. Output of the Second IF Amplifier
3
ESD
VS
VREF
The parallel output capacitance to ground is about 7 pF. The external load resistance
must be connected to VS. The DC current into the pin is typically 3 mA.
Note:
The supply voltage VS has to be protected against IF distortion.
5
4807A–AUDR–05/04
GAINIF1
Figure 6. Gain Control of the First IF Amplifier
17 VREF
2 kΩ
ESD
4
The gain of the first IF amplifier can be adjusted by a resistor to ground. This is useful,
for example, to compensate for the insertion loss tolerances of the ceramic BPFs. It
must be ensured that the output current of the pin does not exceed 150 µA in any case.
Linear increasing in the current out of GAINIF1 results in a linear dB increase of the gain
(0.15 dB/µA).
I4 = 0, thus, G = Gmin = 2 dB
I4 = 140 µA, thus, G = Gmax = 22 dB
IF2IN
Figure 7. Input of the Second IF Amplifier
VREF
5
ESD
The parallel input resistance is 330 Ω. The parallel input capacitance is about 12 pF. No
DC current is allowed. To avoid overload of this stage, an internal detector watches the
input level and causes current at the AGCOUT pin.
6
U4065B
4807A–AUDR–05/04
U4065B
IF1OUT
Figure 8. Output of the First IF Amplifier
VS
ESD
330
7
The parallel output resistance is 330 Ω which allows the use of standard ceramic BPF.
The parallel output capacitance is about 7 pF. The DC voltage at the pin is 0.5 V less
than VS.
IMIFIN
Figure 9. Input of the IF Amplifier for the IM Sensor
9
ESD
The parallel input resistance is 330 Ω. The amplifier is extremely sensitive to AC signals.
An IF signal with a few hundred µV at this pin will cause current at the AGC output.
Therefore, attention needs to be paid when connecting the standard ceramic filter
between IMOUT and this pin. The reference point of the filter has to be free of any AC
signal, no DC current shall appear at this pin.
7
4807A–AUDR–05/04
AGCOUT
Figure 10. Output of the Automatic Gain Control
10
1k
ESD
1 V
The AGC output is an open collector output. The current of the pin diode is this current
multiplied by the current gain of the external PNP transistor. The DC voltage at the pin
may vary from 2 V to VS, therefore, this pin can easily be used as an indicator of the
AGC regulation state.
IMMIXOUT
Figure 11. Output of the Intermodulation Mixer
VS
ESD
300
11
1 V
The parallel output resistance is 330 Ω which allows the use of standard ceramic BPF
without any further matching network. It must be ensured that the ground pin of the filter
is free of AC signals.
AGCWB
Figure 12. Threshold Adjustment of the Wideband AGC
VREF
35k
32k
ESD
13
The threshold of the wideband AGC can be adjusted by an external resistor to ground.
The setting range is 10 dB. For minimum blocking, this pin is connected to ground. To
set the threshold to lower levels, the resistance should have a value of up to a few hun-
dred kΩ.
8
U4065B
4807A–AUDR–05/04
U4065B
MIXIN1
MIXIN2
VREF
Figure 13. Input 1 of the Double-balanced Mixer
VREF
2.5k
15
ESD
The parallel input resistance is 1.2 kΩ. The parallel input capacitance is about 9 pF.
When using the mixer in an unbalanced way, this pin needs to be grounded for RF sig-
nals by an external capacitance of a few nF. DC current is not allowed.
Figure 14. Input 2 of the Double-balanced Mixer
VREF
2.5k
16
ESD
The parallel input resistance is 1.6 kΩ. The parallel input capacitance is about 7 pF. The
double sideband noise figure of the unbalanced mixer is about 7 dB. If using the mixer in
balanced mode, the noise figure will be reduced by about 0.8 dB.
Figure 15. Reference Voltage Output
VS
200
4.6 V
17
ESD
The internal temperature-compensated reference voltage is 3.9 V and it is used as bias
voltage for most blocks. Therefore, the electrical characteristics of the U4065B are
mainly independent of the supply voltage. The internal output resistance of the refer-
ence voltage is less than 10 Ω. To avoid internal coupling across this pin, external
capacitors are required. The maximum output current is IREF = 5 mA.
9
4807A–AUDR–05/04
MIXOUT1, MIXOUT2
Figure 16. Mixer Output 1, 2
19
18
ESD
The mixer output is an open collector of a bipolar transistor. The minimum voltage at
these pins is 5 V (VS - voltage swing). The DC current into these pins is typically 9 mA.
Good LO and RF suppression at the mixer output can be achieved by symmetrical load
conditions at the pins MIXOUT1 and MIXOUT2.
IF1IN
Figure 17. Input of the First IF Amplifier
21
VREF
330
ESD
The typical input resistance is 330 Ω. The DC voltage is almost identical to the reference
voltage. DC current must be avoided at this pin.
10
U4065B
4807A–AUDR–05/04
U4065B
LOE
Figure 18. Emitter of the Local Oscillator
23
ESD
An external capacitor is connected between LOE and ground. The ground pin of this
capacitor must be connected to pin GND5, the chip-internal ground of the local
oscillator.
LOB
Figure 19. Base of the Local Oscillator
24
ESD
The tank of the local oscillator is connected at pin LOB. The ground pin of this tank
needs to be connected to pin GND5, the chip-internal ground of the local oscillator’s
pin 24. The resonant resistance of the tank should be about 250 Ω. Minimum Q of the
unloaded tank is 50.
11
4807A–AUDR–05/04
Functional Description
The U4065B FM-frontend IC is the dedicated solution for high-end car radios. A new
design philosophy enables to build up tuners with superior behavior. This philosophy is
based on the fact that the sensitivity of state of the art designs is at the physical border
and cannot be enhanced any more. On the other hand, the spectral power density in the
FM-band increases. An improvement of reception can only be achieved by increasing
the dynamic range of the receiver. This description is to give the designer an introduc-
tion to get familiar with this new product and its philosophy.
The Signal Path
The U4065B offers the complete signal path of an FM-frontend IC including a highly lin-
ear mixer and two IF preamplifiers. The mixer is a double-balanced, high-current Gilbert
Cell. A high transit frequency of the internal transistors enables the use of the emitter
grounded circuit with its favorable noise behavior. The full balanced output offers LO
carrier reduction.
The first IF preamplifier has a dB-linear gain adjustment by DC means. Thus, different
ceramic filter losses can be compensated and the overall tuner gain can be adapted to
the individual requirements. The low noise design suppresses post stage noise in the
signal path. Input and output resistance is 330 Ωto support standard ceramic filters. This
is achieved without feedback, which would cause different input impedances when vary-
ing the output impedance.
The second IF preamplifier enables the use of three ceramic filters with real 330 Ωinput-
and output termination. Feedthrough of signals is kept low. The high level of output com-
pression is necessary to keep up a high dynamic range.
Beneath the signal path the local oscillator part and the AGC signal generation can be
found on chip. The local oscillator uses the collector grounded colpitts type. A low phase
noise is achieved with this access. A mutual coupling in the oscillator coil is not
necessary.
The AGC Concept
Special care was taken to design a unique AGC concept. It offers 3 AGC loops for differ-
ent kinds of reception conditions. The most important loop is the interference sensor
part.
In today’s high-end car radios, the FM AGC is state of the art. It is necessary to reduce
the influence of 3rd and higher order intermodulation to sustain reception in the pres-
ence of strong signals in the band. On one hand, it makes sense to reduce the desired
signal level by AGC as few as possible to keep up stereo reception, on the other hand
two or more strong out-of-channel signals may interfere and generate an intermodula-
tion signal on the desired frequency. By introducing input attenuation, the level of the
intermod signal decreases by a higher order, whereas the level of the desired signal
shows only a linear dependency on the input attenuation. Therefore, input attenuation
by pin diodes may keep up reception in the presence of strong signals.
The standard solution to generate the pin diode current is to pick up the RF-signal in
front of the mixer. Because the bandwidth at that point is about 1.5 MHz, this is called
wideband AGC. The threshold of AGC start is a critical parameter. A low threshold does
not allow any intermodulation but has the disadvantage of blocking if there is only one
strong station on the band or if the intermod signals do not cover the desired channel. A
higher AGC threshold may tolerate a certain ground floor of intermodulation. This avoids
blocking, but it has the disadvantage, that no reception is possible, if the interfering sig-
nals generate an intermod signal inside the desired channel. This contradiction could
not be overcome in the past.
12
U4065B
4807A–AUDR–05/04
U4065B
With the new U4065B IC, there is a unique access to this problem. This product has an
interference sensor on chip. Thus, an input signal attenuation is only performed if the
interfering signals do generate an intermod signal inside the desired channel. If they do
not, the existing wideband AGC is active but up to 20 dB higher levels. The optimum
AGC state is always generated.
The Figure 20 to Figure 23 on page 14 illustrate the situation. In Figure 20 the AGC
threshold of a standard tuner is high to avoid blocking. But then the intermod signal sup-
presses the desired signal. The interference sensor of the U4065B ensures that the
AGC threshold is kept low as illustrated in Figure 21 on page 14.
In Figure 22 on page 14 the situation is reversed. The AGC threshold of a standard
tuner is kept low to avoid intermod problems. But then blocking makes the desired sig-
nal level drop below the necessary stereo level. In this case, the higher wideband AGC
level of the U4065B enables perfect stereo reception.
By principle, this interference sensor is an element with a third order characteristic. For
input levels of zero, the output level is zero, too. With increasing input level, the output
level is increased with the power of three, thus preferring intermod signals compared to
linear signals. At the same time, a down conversion to the IF level of 10.7 MHz is per-
formed. If a corresponding 10.7 MHz IF filter selects the intermod signals, only an output
is generated, if an intermod signal inside the 10.7 MHz channel is present.
The circuit blocks interference sensor and IF, and detector build up a second IF chain. In
an FM system, the maximum deviation of a 3rd order intermod signal is the triple max
deviation of the desired signal. Therefore, the ceramic IF BPF between pin 11 and pin 9
may be a large bandwidth type. This is all that is needed for this unique feature.
A further narrow band AGC avoids overriding the second IF amplifier. The amplitude
information of the channel is not compressed in order to maintain multipath detection in
the IF part of the receiver.
Figure 20. A High AGC Threshold Causes the Intermod Signal to Suppress the Desired
Signal
Level
Interfering signals
Intermod signal
Intermod signal
Desired
signal
Stereo-level
Noise floor
Desired
Frequency
frequency
13
4807A–AUDR–05/04
Figure 21. AGC Threshold Settings
Level
Interfering signals
Desired
signal
Stereo-level
Noise floor
Intermod
signal
Intermod signal
Desired
frequency
Frequency
Figure 22. A Low AGC Threshold Causes the Blocking Signal to Suppress the Desired
Signal
Level
Strong signal
Stereo-level
Desired
signal
Noise floor
Desired
Frequency
frequency
Figure 23. The Correct AGC Threshold Enables Optimum Reception
Level
Strong signal
Desired
signal
Stereo-level
Noise floor
Desired
Frequency
frequency
14
U4065B
4807A–AUDR–05/04
U4065B
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Reference point is ground (pins 2, 8, 14, 20 and 22)
Parameters
Symbol
VS
Value
10
Unit
V
Supply voltage
Power dissipation at Tamb = 85°C
Junction temperature
Ambient temperature range
Storage temperature range
Ptot
470
mW
°C
Tj
125
Tamb
Tstg
-30 to +85
-50 to +125
°C
°C
Electrostatic handling: Human body model (HBM),
all I/O pins tested against the supply pins
± VESD
2000
V
Thermal Resistance
Parameters
Symbol
Value
Unit
Thermal resistance
RthJA
90
K/W
Electrical Characteristics
VS = 8.0 V, fRF = 98 MHz, fOSC 108.7 MHz, fIF = fOSC - fRF = 10.7 MHz
Reference point is ground (pins 2, 8, 14, 20, and 22),Tamb = 25°C, unless otherwise specified.
Parameters
Test Conditions
Pin
Symbol
VS
Min.
Typ.
8
Max.
10
Unit
V
Supply voltage
Supply current
3, 6, 10, 18, 19
3, 6, 10, 18, 19
7
Itot
37
47
mA
Oscillator (GND5 Has to be Connected to External Oscillator Components)
24
23
1
VLOB
VLOE
VLOBUFF
160
100
90
RG24 = 220 Ω, unloaded Q
of LOSC = 70, RL1 = 520 Ω
Oscillator voltage
mV
70
220
-15
Harmonics
1
dBc
Output resistance
Voltage gain
1
RLO
70
Ω
Between 1 and 23
0.9
Mixer (GND3 Has to be Separated from GND1, GND2 and GND4)
Conversion power gain
Source impedance:
GC
IP3
5
4
7
6
10
14
dB
3rd-order input intercept
Conversion transconductance
Noise figure
dBm
RG15,16 = 200 Ω
Load impedance:
RL18,19 = 200 Ω
gC
8
mA/V
dB
NFDSB
Rignd15
Cignd15
Rignd16
Cignd16
Rii15,16
Cii15,16
Cignd18,19
7
Input resistance to ground
Input capacitance to ground
Input resistance to ground
Input capacitance to ground
Input-input resistance
f = 100 MHz
f = 100 MHz
f = 100 MHz
f = 100 MHz
15
1.2
9
kΩ
pF
15
16
1.6
7
kΩ
pF
16
Between 15 and 16
Between 15 and 16
18 and 19
1.6
5
kΩ
pF
Input-input capacitance
Output capacitance to GND
9
pF
15
4807A–AUDR–05/04
Electrical Characteristics (Continued)
VS = 8.0 V, fRF = 98 MHz, fOSC 108.7 MHz, fIF = fOSC - fRF = 10.7 MHz
Reference point is ground (pins 2, 8, 14, 20, and 22),Tamb = 25°C, unless otherwise specified.
Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
First IF Preamplifier (IF 1)
Gain control deviation by I4
Gain control slope
4
4
17
20
24
dB
dGIF1/dI4
0.15
dB/µA
External control current to ground
At Gmin
At Gnom
At Gmax
I4min
I4nom
I4max
0
70
140
µA
dB
Power gain
At I4min
At I4nom
Gmin
Gnom
Gmax
-2.5
11
19
2
12
22
2.5
16
28
Between 21 and 7
Between 21 and 7
Source impedance:
RG21 = 200 Ω,
Load impedance:
At I4max
Noise figure
At Gmax
At Gnom
RL7 = 200 Ω
NFmin
NFnom
NFmax
7
9
15
dB
At Gmin
Temperature coefficient of the gain
at Gnom
TKnom
+0.045
dB/K
1 dB compression at Gnom
-3 dB cut-off frequency at Gnom
Input resistance
7
7
Vcnom
fcnom
RiIF1
CiIF1
RoIF1
CoIF1
70
50
330
5
mV
MHz
Ω
f = 10 MHz
f = 10 MHz
f = 10 MHz
f = 10 MHz
21
21
7
270
270
400
400
Input capacitance
pF
Output resistance
330
7
Ω
Output capacitance
7
pF
Second IF Preamplifier (IF 2)
Source impedance:
RG5 = 200 Ω
Load impedance:
RL3 = 200 Ω
Power gain
Between 5 and 3
GIF2
15
18
19
dB
Noise figure
NFIF2
Vcomp
fc
7
500
50
330
12
50
7
dB
mV
MHz
Ω
1 dB compression
3
3
5
5
3
3
-3 dB cutoff frequency
Parallel input resistance
Parallel input capacitance
Parallel output resistance
Parallel output capacitance
Voltage Regulator
f = 10 MHz
f = 10 MHz
f = 10 MHz
f = 10 MHz
RiIF2
CiIF2
RoIF2
CoIF2
270
400
pF
kΩ
pF
Regulated voltage
17
17
Vref
Iref
3.7
5
3.9
4.9
50
V
Maximum output current
mA
Internal differential
resistance, dc17/di17 when I17 = 0
17
17
rd17
7
Ω
Power supply suppression
f = 50 Hz
psrr
36
50
dB
16
U4065B
4807A–AUDR–05/04
U4065B
Electrical Characteristics (Continued)
VS = 8.0 V, fRF = 98 MHz, fOSC 108.7 MHz, fIF = fOSC - fRF = 10.7 MHz
Reference point is ground (pins 2, 8, 14, 20, and 22),Tamb = 25°C, unless otherwise specified.
Parameters
Test Conditions
Pin
Symbol
Min.
Typ.
Max.
Unit
AGC Input Voltage Thresholds (AGC Threshold Current is 10 µA at Pin 10)
IF2 input
5
9
VthIF2
VthIFD
85
42
86
43
92
48
dBµV
dBµV
IF and detector
fiRF = 100 MHz
V at pin 13 = 0 V
I through pin 13 = 0 A
Mixer input level of
wideband sensor
Between 15 and 16
VthWB1
VthWB2
95
85
98
87
100
90
dBµV
dBµV
Figure 24. Test Circuit
VO IF
4.7n
4.7n
VI IF
50
5
6
2
1
6
2
Gain IF 1
50
5
0 to 140 µA
1
I4
RL7 RG5
VI IF
50
50
2
7
4
20
5
V
O IF
5
1
1
6
5
21
I3
3
6
2
2
VS
RG21
RL3
4.7n
I18,19
IF 1
IF 2
VS
VO IF
VS
I10
10
13
18
2
6
5
AGC
block
50
R13
I13
19
14
RL18,19
1
AGC adjust
(wide band)
Mixer
4.7n
15
16
2
6
5
6
Voltage
VS
RG15,16
regulator
50
I6
1
4.7n
1µ
VI RF
Interference
mixer
17
9
VREF = 4 V
RG24
8p
24
23
RG9
4.7n
Local
Interference
amplifier
2
6
1
47p
oscillator
fOSC
LOSC
5
33p
COSC
50
22
11
12
8
1
VI IF
RLOBUFF
RG11
Z/Ω
50 200
VO IF
470p
RL1
1
2
6
2
4
6
1
RF Transformers MCL
Type TMO 4 - 1
IL = 0.7 dB
50
VLOBUFF
fLOBUFF
5
5
4.7n
0
0
17
4807A–AUDR–05/04
Local Oscillator
Figure 25. LO Principle Application
RG24
VOSC24
24
23
Local
oscillator
47p
33p
fOSC
VOSC1, fOSC
1
Oscillator
output
buffer
520
Tamb
Free running oscillator frequency fOSC ≈ 110 MHz, VOSC24 = 160 mV, RG24 = 220 Ω, QL = 70
Figure 26. Oscillator Swing versus Temperature
180
160
140
120
100
80
60
40
20
0
-30
-10
10
30
50
70
90
Tamb (°C)
18
U4065B
4807A–AUDR–05/04
U4065B
Mixer
fOSC = 110.7 MHz, VOSC24 160 mV, fIF = 10.7 MHz
Figure 27. Mixer Principle Application
VOIF
50
IL2
18
19
14
15
IL1
2 VIRF1
fRF1
1
5
2
1
5
2
6
Mixer
6
2 VIRF2
fRF2
50
RG24
24
23
Local
VS
oscillator
47p
22p
fOSC
Tamb
Conversion power gain GC = 20 log (VOIF/VIRF) + IL1 (dB) + IL2 (dB)
IL1, IL2 insertion loss of the RF transformers
Figure 28. Mixer Characteristic
120
100
80
60
40
20
0
Conversion characteristic
3rd order
IM-characteristic
0
20
40
60
80
100
120
VIRF1, VIRF2 (dBµV)
19
4807A–AUDR–05/04
Figure 29. Conversion Power Gain of the Mixer Stage versus Temperature
8
7
6
5
4
3
2
1
0
-30
-10
10
30
50
70
90
Tamb (°C)
Figure 30. Current of the Mixer Stage versus Temperature
11.0
10.7
10.4
10.1
9.8
9.5
9.2
8.9
8.6
8.3
8.0
-30
-10
10
30
50
70
90
Tamb (°C)
20
U4065B
4807A–AUDR–05/04
U4065B
First IF Preamplifier
Figure 31. First IF Preamplifier Principle Application
VOIF
VOIF7
L7 = 200
VIIF21
1 : 2
IL1
21
2 : 1
IL2
7
IF
R
RG21 = 200
50
1
5
2
6
2
1
5
50
Tamb
V (pin 4)
I4
4
fIF
6
2VIIF
Power gain GIF = 20 log (VOIF/VIIF) + IL1 (dB) + IL2 (dB)
IL1, IL2 = insertion loss of the RF transformers
Figure 32. Power Gain of the First IF Amplifier versus I4
25
T = 90°C
20
15
T = -30°C
10
5
0
T = 30 °C
-5
0
20
40
60
80
100
120
140
I4 (µA)
21
4807A–AUDR–05/04
Figure 33. Power Gain of the First IF Amplifier versus Frequency
25
20
Gmax
15
10
5
Gnom
0
Gmin
-5
-10
10
20
30
40
50
60
70
80
90
100
f (MHz)
Figure 34. V (Pin 4) versus I4
3.8
3.6
3.4
3.2
3.0
2.8
T = 90°C
T = 30°C
T = -30°C
2.6
2.4
2.2
2.0
0
20
40
60
80
100
120
140
I4 (µA)
22
U4065B
4807A–AUDR–05/04
U4065B
Second IF Preamplifier
Figure 35. Second IF Preamplifier Principle Application
VS
330
VOIF
VIIF5
VOIF3
3
2 : 1
IL2
5
1 : 2
IL1
IF
RL3 = 200
RG5 = 200
2
1
5
2
6
1
5
50
fIF
2 VIIF
50
Tamb
6
Power gain GIF = 20 log (VOIF/VIIF) + IL1 (dB) + IL2 (dB)
IL1; IL2 = insertion loss of the RF transformers
Figure 36. Power Gain of the Second IF Amplifier versus Temperature
18.5
18.0
17.5
17.0
16.5
16.0
15.5
15.0
-30 -20
-10
0
10
20
30
40
50
60
70
80
90
Tamb (°C)
23
4807A–AUDR–05/04
Figure 37. Power Gain of the Second IF Amplifier versus Frequency
20
18
16
14
12
10
8
6
4
2
0
10
20
30
40
50
60
70
80
90
100
f (MHz)
Figure 38. AGC Threshold (110 = 1 µA) of the Second IF Amplifier versus Temperature
87.0
86.8
86.6
86.4
86.2
86.0
-30
-10
10
30
50
70
90
Tamb (°C)
Figure 39. AGC Characteristic of the Second IF Amplifier Input
10000.00
1000.00
100.00
110 (90°C)/µA
110 (-30°C)/µA
10.00
1.00
0.10
110 (30°C)/µA
0.01
80
85
90
95
100
105
VIIF (dBµA)
24
U4065B
4807A–AUDR–05/04
U4065B
Interference Sensor (Mixer)
Figure 40. Interference Sensor Principle Application
50
15
IL1
2 VIRF1
RL11 = 200
RG15/16
= 200
2
Interference
mixer
1
5
fIRF1
11
IL2
6
2 VIRF2
fIRF2
VOIF
fIF
16
2
1
5
50
6
fLO
Local
oscillator
VS
IL1 = IL2 = 0.7 dB
Test conditions for characteristic VOIF versus VIRF1
:
fLO = 100 MHz, fRF1 = 89.3 MHz, VIRF2 = 0, fIF = fLO - fRF1 = 10.7 MHz
Test conditions for 3rd order IM-characteristic VOIF versus VIRF1, VIRF2
:
fLO = 100 MHz, fRF1 = 89.4 MHz, fRF2 = 89.5 MHz, fIF = fLO - (2 fRF1 - 1 fRF2) = 10.7 MHz
IL1, IL2 = insertion loss of the RF transformer
Figure 41. Characteristics of the Interference Sensor (Mixer)
90
80
70
Conversion
characteristic
60
50
40
30
20
10
0
3rd order
IM-characteristic
60
65
70
75
80
85
90
95
100
VIRF (dBµV)
25
4807A–AUDR–05/04
Figure 42. Conversion Characteristic of the Interference Sensor (Mixer)
100
90
-30°C
80
70
60
30°C
50
40
30
90°C
20
10
0
70
75
80
85
90
95
100
105
110
115
VIRF (dBµV)
Figure 43. Third-order Interference Characteristic of the Interference Sensor (Mixer)
80
70
60
-30°C
50
40
30°C
30
90°C
20
70
75
80
85
90
95
100
105
110
115
VIRF (dBµV)
26
U4065B
4807A–AUDR–05/04
U4065B
Interference Sensor (Amplifier)
Figure 44. Interference Sensor Principle Application
10
VIIF9
9
1 : 2
IL1
VS
IF
I10
RG9 = 200
50
2
1
5
Tamb
fIF
6
2 VIIF
IL1 = 0.7 dB
AGC Thresholds
Figure 45. AGC Threshold of the Interference IF Amplifier versus Temperature
45.0
44.5
44.0
43.5
43.0
42.5
42.0
41.5
41.0
-30 -20
-10
0
10
20
30
40
50
60
70
80
90
Tamb (°C)
Figure 46. Wideband AGC Threshold (I10 = 1 µA) versus I13
105
108 MHz
100
88 MHz
95
90
98 MHz
85
0
5
10
15
20
25
30
35
40
45
50
55
I13 (µA)
27
4807A–AUDR–05/04
Figure 47. Wideband AGC Threshold (I10 = 1 µA) versus Temperature
100
U13 = 0 V
98
96
94
I13 = 30 µA
92
90
88
86
84
82
80
I13 = 0 A
-30
-20
-10
0
10
20
30
40
50
60
70
80
90
Tamb (°C)
AGC Characteristics
Figure 48. AGC Characteristic of the Interference IF and Detector Block
10000.00
-30°C
1000.00
90°C
100.00
30°C
10.00
1.00
0.10
0.01
35
45
55
65
75
85
95
VIIF (dBµV)
Figure 49. Characteristic of the Wideband AGC (I13 = 0 V)
10000.00
1000.00
-30°C
100.00
10.00
30°C
1.00
90°C
0.10
0.01
80
85
90
95
100
105
110
115
120
VIIF (dBµV)
28
U4065B
4807A–AUDR–05/04
U4065B
Figure 50. Characteristic of the Wideband AGC (V13 = 0 V)
10000.00
1000.00
-30°C
100.00
10.00
30°C
1.00
0.10
90°C
0.01
90
95
100
105
110
115
120
VIRF (dBµV)
DC Characteristics
Figure 51. Supply Current versus Supply Voltage
18
16
I6
14
12
10
8
I18, I19
6
I3
4
2
0
6.0
6.5
7.0
7.5
8.0
8.5
9.0
9.5
10.0
VS (V)
Figure 52. Reference Voltage versus Temperature
3.88
3.87
3.86
3.85
3.84
3.83
3.82
3.81
-30 -20
-10
0
10
20
30
40
50
60
70
80
90
Tamb (°C)
29
4807A–AUDR–05/04
Figure 53. Supply Current versus Temperature
40
35
30
I3 + I6 + I18 + I19
25
20
15
I6
I18, I19
10
I3
5
0
-30
-10
10
30
50
70
90
Tamb (°C)
Figure 54. Reference Voltage versus I17
4.00
3.95
3.90
3.85
3.80
3.75
-10
-8
-6
-4
-2
0
2
4
I17 (mA)
30
U4065B
4807A–AUDR–05/04
U4065B
Figure 55. Application Diagram
31
4807A–AUDR–05/04
Part List
Item
Description
Q1
BFR93AR (BFR93A)
Q2
BC858
D1
S392D
D2
S391D
D3, D4, D5
BB804
L1
11 turns, 0.35 mm wire, 3 mm diameter (approximately 220 nH)
L2
2.2 mH (high Q type)
L3
TOKO® 7KL-type, # 600ENF-7251x
TOKO 7KL-type, # 291ENS 2341IB
TOKO 7KL-type, # M600BCS-1397N
TOKO 7KL-type, # 291ENS 2054IB
TOKO type SKM 2 (230 KHZ)
TOKO type SKM 3 (180 KHZ)
L4
L5
L6
CF1
CF2, CF3, CF4
32
U4065B
4807A–AUDR–05/04
U4065B
Ordering Information
Extended Type Number
Package
Remarks
U4065B-AFL
SO24 plastic
SO24 plastic
–
U4065B-AFL3
Taping according to ICE-286-3
Package Information
Package SO24
Dimensions in mm
9.15
8.65
15.55
15.30
7.5
7.3
2.35
0.25
0.10
0.25
0.4
10.50
10.20
1.27
13.97
24
13
technical drawings
according to DIN
specifications
1
12
33
4807A–AUDR–05/04
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Literature Requests
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Disclaimer: Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard
warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any
errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and
does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are
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© Atmel Corporation 2004. All rights reserved.
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4807A–AUDR–05/04
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