U4082B-FL [ATMEL]
暂无描述;
| 型号： | U4082B-FL |
| 厂家： | 
ATMEL |
| 描述： | 暂无描述 电信集成电路 光电二极管 |
| 文件： | 总30页 (文件大小：541K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Features
•
•
•
•
•
•
•
•
•
•
Low-voltage Operation 3V to 6.5V
Attenuator Gain Range Between Transmit and Receive: 52 dB
Four-point Signal Sensing for Improved Sensitivity
Monitoring System for Background Noise Level
Adjustable Microphone Amplifier Gain
Mute Function
Chip Disable for Active/Standby Operation
On-board Filter
Low-voltage
Voice-switched
IC for
Hands-free
Operation
Dial Tone Detector
Compatible with U4083B Speaker Amplifier
Benefits
•
•
Fast Channel Switching Allows Quasi-duplex Operation
Proper Operation in Noisy Surroundings
1. Description
The low-voltage voice-switched speakerphone circuit, U4082B, incorporates a wide
range of functions. The versatility of the device is further enhanced by giving access to
internal circuit points. The block diagram (see Figure 1-1) shows amplifiers, level
detectors, transmit and receive attenuators operating in complementary functions,
background noise monitors, chip disable, dial tone detector and mute function. Due to
low-voltage operation, the device can be operated either by a low supply or via a tele-
phone line requiring 5.5 mA typically. Stand-alone operation is enabled by a coupling
transformer (Tip and Ring) or in conjunction with a handset speech network, as shown
in Figure 1-2 on page 2.
U4082B
Figure 1-1. Block Diagram
MIC
11 MICO 10 17 TLI2
9
8
7
HTI
6
HTO-
TI
TO
-
-
+
T Attenuator
VS
-
5
+
HTO+
+
VB
VB
12
MUTE
VB
27
CPR
AGC
Background
Noise Monitor
Background
Noise Monitor
16
CPT
23
TLI1
Level
Detectors
Level
Detectors
18
TLO2
Attenuator
Control
25
RLO1
19
24
TLO1
RLO2
Dial Tone
Detector
4
+
-
VS
U4082B
28
VB
GND
Filter
+1
400Ω
2
FI
3
CD
R Attenuator
20
RLI2
15
14
22 21
13
26
RLI1
1 PD
VB
CT
RECO
VCI
RI
Rev. 4743D–CORD–03/06
Figure 1-2. Block Diagram with External Circuit
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U4082B
4743D–CORD–03/06
U4082B
2. Pin Configuration
Figure 2-1. Pinning SO28
1
2
28 GND
FO
FI
27
26
25
24
23
22
21
20
CPR
RLI1
3
CD
4
RLO1
TLO1
TLI1
VS
5
HTO+
HTO-
HTI
6
7
RECO
8
RI
TO
9
RLI2
TI
10
11
12
13
14
19
18
17
16
15
RLO2
TLO2
TLI2
CPT
VB
MICO
MIC
MUTE
VCI
CT
Table 2-1.
Pin Description
Pin
1
Symbol
FO
Function
Filter output. Output impedance is less than 50Ω
Filter input. Input impedance is greater than 1 MΩ
2
FI
Chip disable. A logic low (< 0.8V) sets normal operation. A logic high (> 2V) disables the IC to conserve
power. Input impedance is nominally 90 kΩ
3
4
5
CD
VS
Supply voltage 2.8V to 6.5V, approximately 5 mA. AGC circuit reduces the receive attenuator gain at
25 dB, receive mode at 2.8V
Output of the second hybrid amplifier (Hybrid output). Gain is internally set at –1 to provide a differential
output, (in conjunction with HTO–) to the hybrid transformer
HTO+
6
7
HTO–
HTI
Output of the first hybrid amplifier. Hybrid output. Gain is set by external resistors
Input and summing node for the first hybrid amplifier. DC level is approximately VB
Transmit attenuator output. DC level is approximately VB
8
TO
9
TI
Transmit attenuator input. Maximum signal level is 350 mVrms. Input impedance is approximately 10 kΩ
Microphone amplifier output. Gain is set by external resistors
10
11
MICO
MIC
Microphone amplifier input. Bias voltage is approximately VB
Mute input. A logic low (< 0.8V) sets normal operation. A logic high (> 2V) mutes the microphone
amplifier without affecting the rest of the circuit. Input impedance is nominally 90 kΩ
12
MUTE
Volume control input. When VCI = VB, the receive attenuator is at maximum gain when in receive mode.
When VCI = 0.3 VB, the receive gain is down 35 dB. It does not affect the transmit mode
13
14
VCI
CT
Response time. An RC at this pin sets the response time for the circuit to switch modes
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4743D–CORD–03/06
Table 2-1.
Pin Description (Continued)
Pin
15
Symbol
VB
Function
Output voltage ≈ VS/2. It is a system AC ground and biases the volume control. A filter cap is required
An RC at this pin sets the time constant for the transmit background monitor
Transmit level detector input on the microphone/speaker side
16
17
CPT
TLI2
Transmit level detector output on the microphone/speaker side, and input to the transmit background
monitor
18
TLO2
19
20
RLO2
RLI2
Receive level detector output on the microphone/speaker side
Receive level detector input on the microphone/speaker side
Input receive attenuator and dial tone detector. Maximum input level is 350 mVrms. Input impedance is
approximately 10 kΩ
21
RI
22
23
24
25
26
27
28
RECO
TLI1
Receive attenuator output. DC level is approximately VB
Transmit level detector input on the line side
TLO1
RLO1
RLI1
Transmit level detector output on the line side
Receive level detector output on the line side and input to the receive background monitor
Receive level detector input on the line side
CPR
An RC at this pin sets the time constant for the receive background monitor
Ground
GND
3. Introduction
3.1
General
The fundamental difference between the operation of a speakerphone and a handset is that of
half duplex versus full duplex. The handset is full duplex since conversation can occur in both
directions (transmit and receive) simultaneously. A speakerphone has higher gain levels in both
paths, and attempting to converse in full-duplex mode results in oscillatory problems due to the
loop that exists within the system. The loop is formed by the receive and transmit paths, the
hybrid and the acoustic coupling (speaker to microphone).
The only practical and economical solution used to date is to design the speakerphone to oper-
ate in half-duplex mode. That is, only one person speaks at a time, while the other listens. To
achieve this, a circuit is required which can detect who is talking, switch on the appropriate path
(transmit or receive), and switch off (attenuate) the other path. In this way, the loop gain is main-
tained less than unity. When the talkers exchange functions, the circuit must quickly detect this,
and switch the circuit appropriately. By providing speech-level detectors, the circuit operates in a
“hands-free” mode, eliminating the need for a “push-to-talk” switch.
The handset has the same loop as the speakerphone. Oscillations do not occur because the
gains are considerably lower and the coupling from the earpiece to the mouthpiece is almost
nonexistent (the receiver is normally held against a person's ear).
The U4082B provides the necessary level detectors, attenuators, and switching control for a
properly operating speakerphone. The detection sensitivity and timing are externally controlla-
ble. Additionally, the U4082B provides background noise monitors (which make the circuit
insensitive to room and line noise), hybrid amplifiers for interfacing to Tip and Ring, the micro-
phone amplifier, and other associated functions.
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U4082B
4743D–CORD–03/06
U4082B
3.2
Transmit and Receive Attenuators TI, TO and RI, RECO
The attenuators are functionally complementary; that is, when one is at maximum gain
(+6.0 dB), the other is at maximum attenuation (–46 dB), and vice versa. Neither is ever fully on
or off. The sum of their gains remains constant (within a nominal error band of ±0.1 dB) at a typ-
ical value of –40 dB (see Figure 7-1 on page 17). Their purpose is to control the transmit and
receive paths to provide the half-duplex operation required in a speakerphone.
The non-inverting attenuators have a –3.0 dB (from maximum gain) frequency of approximately
100 kHz. The input impedance of each attenuator (TI and RI) is nominally 10 kΩ (see Figure
3-1). To prevent distortion, the input signal should be limited to 350 mVrms. The maximum
recommended input signal is independent of the volume control setting. The diode clamp on the
inputs limits the input swing, and thus the maximum negative output swing. This results in a
specific VRECO and VTOL definition as given in the table “Electrical Characteristics” on page 14.
The output impedance is less than 10Ωuntil the output current limit (typically 2.5 mA) is reached.
Figure 3-1. Attenuator Input Stage
VB
11 kΩ
to Attenuator
Input
RI 21
TI 9
5 kΩ
95 kΩ
The attenuators are controlled by the single output of the control block, which is measurable at
pin CT (pin 14). When pin CT is at +240 mV with respect to VB, the circuit is in receive mode
(receive attenuator is at +6.0 dB). When pin CT is at –240 mV with respect to VB, the circuit is in
transmit mode (transmit attenuator is at +6.0 dB). The circuit is in an idle mode when the CT
voltage is equal to VB causing the attenuators' gain to be halfway between their fully on and fully
off positions (–20 dB each). Monitoring the CT voltage (with respect to VB) is the most direct
method of monitoring the circuit's mode.
The attenuator control has seven inputs: two from the comparators operated by the level detec-
tors, two from the background noise monitors, volume control, dial-tone detector, and AGC.
They are described in the sections that follow.
3.3
Level Detectors
There are four level detectors, two on the receive side and two on the transmit side. As shown in
Figure 3-2 on page 6, the terms in parentheses form one system, and the other terms form the
second system. Each level detector is a high-gain amplifier with back-to-back diodes in the feed-
back path, resulting in nonlinear gain which permits operation over a wide dynamic range of
speech levels. Refer to the graphs of Figures 7-2, 7-3 and 7-4 on page 18 for their DC and AC
transfer characteristics. The sensitivity of each level detector is determined by the external resis-
tor and capacitor at each input (TLI1, TLI2, RLI1, and RLI2). Each output charges an external
capacitor through a diode and limiting resistor, thus providing a DC representation of the input
AC signal level. The outputs have a quick rise time (determined by the capacitor and an internal
350Ω resistor) and a slow decay time set by an internal current source and the capacitor. The
capacitors on the four outputs should have the same value (±10%) to prevent timing problems.
As can be seen in Figure 1-2 on page 2, on the receive side, one level detector (RLI1) is located
at the receive input, receiving the same signal as at Tip and Ring, and the other (RLI2) is at the
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4743D–CORD–03/06
output of the speaker amplifier. On the transmit side, one level detector (TLI2) is at the output of
the microphone amplifier, while the other (TLI1) is at the hybrid output. The outputs RLO1 and
TLO1 feed a comparator, whose output is fed to the attenuator control block. Likewise, outputs
RLO2 and TLO2 feed a second comparator which also goes to the attenuator control block. The
truth table for the effects of the level detectors is given in the section “Attenuator Control Block”
on page 8.
3.4
Background Noise Monitors
This circuit distinguishes speech (which consists of bursts) from background noise (a relatively
constant signal level). There are two background noise monitors, one for the receive path and
the other for the transmit path. The receive background noise monitor is operated by the
RLI1-RLO1 level detector, while the transmit background noise monitor is operated by the
TLI2-TLO2 level detector (Figure 3-2).
They monitor the background noise by storing a DC voltage representative of the respective
noise levels in capacitors at CPR and CPT. The voltages at these pins have slow rise times
(determined by the external RC), but fast decay times. If the signal at RLI1 (or TLI2) changes
slowly, the voltage at CPR (or CPT) will remain more positive than the voltage at the non-invert-
ing input of the monitor's output comparator. When speech is present, the voltage on the
non-inverting input of the comparator will rise more quickly than the voltage at the inverting input
(due to the burst characteristic of speech), causing its output to change. This output is sensed by
the attenuator control block.
Figure 3-2. Level Detectors
VS
Level detector
Background noise monitor
-
(CPT)
CPR
(TLI2) RLI1
(17) 26
4 µA
(16)
27
100 kΩ
-
-
+
-
+
+
350Ω
47 µF
+
5.1 kΩ
0.1 µF
VB
(18)25
2 µF
(TLO2) RLO1
56 kΩ
33 kΩ
36 mV
Signal input
VB
15
Level detector
4 µA
VB
C4 (C3)
-
+
+
(RLI2) TLI1
C2 (C1)
-
350Ω
(20) 23
To attenuator
control block
Comparator
24
TLO1
(RLO2)
5.1 kΩ
(19)
2 µF
0.1 µF
Signal input
The 36 mV offset at the comparator's input keeps the comparator from changing state unless the
speech level exceeds the background noise by approximately 4.0 dB. The time constant of the
external RC (approximately 4.7s) determines the response time to background noise variations.
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U4082B
4743D–CORD–03/06
U4082B
3.5
Volume Control
The volume control input at VCI (pin 13) is sensed as a voltage with respect to VB. It affects the
attenuators in receive mode only and has no effect during idle or transmit mode.
In receive mode, the attenuator receive gain, GR, is +6.0 dB, and attenuator transmit gain GT is
–46 dB under the condition that VCI = VB. When VCI < VB, the attenuator receive gain is
reduced (Figure 7-5 on page 19), whereas the attenuator transmit gain is increased; their sum,
however, remains constant. Voltage deviation at VCI changes the voltage at CT, which in turn
controls the attenuators (see section “Attenuator Control Block” on page 8).
The volume control setting does not affect the maximum attenuator input signal at which notice-
able distortion occurs.
The bias current at VCI is typically –60 nA. It does not vary significantly with the VCI voltage or
supply voltage VS.
3.6
Dial Tone Detector
The dial tone detector is a comparator with one side connected to the receive input (RI) and the
other to VB with a 15 mV offset (see Figure 3-3). If the circuit is in idle mode, and the incoming
signal is greater than 15 mV (10 mVrms), the comparator's output will change, disabling the
receive idle mode. The receive attenuator will then be at a setting determined mainly by the vol-
ume control.
This circuit prevents the dial tone (which would be considered as continuous noise) from fading
away as the circuit would have the tendency to switch to idle mode. By disabling the receive idle
mode, the dial tone remains at the normally-expected full level.
Figure 3-3. Dial Tone Detector
To R attenuator
RI
-
21
+
To attenuator
control
C4
15 mV
VB
3.7
AGC
The AGC circuit affects the circuit only in receive mode, and only when the supply voltage is less
than 3.5V. As VS < 3.5V, the gain of the receive attenuator is reduced as seen in Figure 7-6 on
page 19. The transmit path attenuation changes such that the sum of the transmit and receive
gains remains constant.
The purpose of this feature is to reduce the power (and current) used by the speaker when a
line-powered speakerphone is connected to a long line where the available power is limited. By
reducing the speaker power, the voltage sag at VS is controlled, preventing possible erratic
operation.
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4743D–CORD–03/06
3.8
Attenuator Control Block
The attenuator control block has seven inputs:
• The output of the comparator operated by RLO2 and TLO2 (microphone/speaker side) –
designated C1
• The output of the comparator operated by RLO1 and TLO1 (Tip/Ring side) – designated C2
• The output of the transmit background noise monitor – designated C3
• The output of the receive background noise monitor – designated C4
• The volume control
• The dial tone detector
• The AGC circuit
The single output of the control block controls the two attenuators. The effect of C1 to C4 is as
follows:
Table 3-1.
Mode Selection Table
Inputs
C1
T
C2
T
C3
1
C4
X
Y
Y
1
Output Mode
Transmit
T
R
T
Y
Y
X
0
Fast Idle
Fast Idle
Receive
R
R
T
R
T
X
0
Slow Idle
Slow Idle
Slow Idle
Slow Idle
T
R
T
0
R
R
0
0
R
X
0
Note:
X = Do not care; Y = C3 and C4 are not both 0.
3.9
Term Definitions
• “Transmit” means the transmit attenuator is fully on (+6.0 dB), and the receive attenuator is at
maximum attenuation (–46 dB).
• “Receive” means both attenuators are controlled by the volume control. At maximum volume,
the receive attenuator is fully on (+6.0 dB), and the transmit attenuator is at maximum
attenuation (–46 dB).
• “Fast Idle” means both transmit and receive speech are present in approximately equal
levels. The attenuators are quickly switched (30 ms) to idle mode until one speech level
dominates the other.
• “Slow Idle” means speech has ceased in both transmit and receive paths. The attenuators
are then slowly switched (1s) to idle mode.
• Switching to full transmit or receive mode from any other mode is at the fast rate (≈ 30 ms).
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U4082B
4743D–CORD–03/06
U4082B
3.10 Summary of the Truth Table
• The circuit will switch to transmit if
- both transmit level detectors sense higher signal levels relative to the respective
receive level detectors (TLI1 versus RLI1, TLI2 versus RLI2), and
- the transmit background noise monitor indicates the presence of speech.
• The circuit will switch to receive if
- both receive level detectors sense higher signal levels relative to the respective
transmit level detectors, and
- the receive background noise monitor indicates the presence of speech.
• The circuit will switch to fast idle mode if the level detectors disagree on the relative strengths
of the signal levels, and at least one of the background noise monitors indicates speech. For
example, referring to the block diagram (Figure 1-2 on page 2), if there is a sufficient signal at
the microphone amp output (TLI2) to override the speaker signal (RLI2) and there is sufficient
signal at the receive input (RLI1) to override the signal at the hybrid output (TLI1), and either
or both background monitors indicate speech, then the circuit will be in fast idle mode.
Two conditions that can cause fast idle mode:
- when both talkers are attempting to gain control of the system by talking at the same time,
and
- when one talker is in a very noisy environment, forcing the other talker to continually
override that noise level. In general, fast idle mode will occur infrequently.
• The circuit will switch to slow idle mode when
- both talkers are quiet (no speech present), or
- when one talker's speech level is continuously overridden by noise at the other speaker's
location. The time required to switch the circuit between transmit, receive, fast idle and
slow idle is determined in part by the components at pin 14 (see the section on switching
times for a more complete explanation of the switching time components). A diagram of
the CT circuitry is shown in Figure 3-4, and operates as follows:
Figure 3-4. CT Attenuator Control Block Circuit
VB
15
RT
-
+
To attenuators
C1 to C4
2 kΩ
14
CT
I1
4
Attenuator
control
CT
I2
Volume control
Dial tone detector
AGC
60 µA
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4743D–CORD–03/06
– RT is typically 120 kΩ, and CT is typically 5.0 µF.
– To switch to receive mode, I1 is turned on (I2 is off), charging the external capacitor to
+240 mV above VB. (An internal clamp prevents further charging of the capacitor.)
– To switch to transmit mode, I2 is turned on (I1 is off), bringing down the voltage on the
capacitor to –240 mV with respect to VB.
– To switch to idle mode quickly (fast idle), the current sources are turned off, and the
internal 2 kΩ resistor is switched on, discharging the capacitor to VB with a time
constant of 2 kΩ × CT.
– To switch to idle mode slowly (slow idle), the current sources are turned off, the
switch at the 2 kΩ resistor is open, and the capacitor discharges to VB through the
external resistor, RT, with a time constant of = RT × CT.
3.11 Microphone Amplifier
The microphone amplifier (pins 10, 11) has the non-inverting input internally connected to VB,
while the inverting input and the output are pinned out.
Unlike most operational amplifiers, this amplifier has an all-NPN output stage which maximizes
phase margin and gain bandwidth. This feature ensures stability at gains less than unity, as well
as with a wide range of reactive loads.
The open loop gain is typically 80 dB (f < 100 Hz), and the gain-bandwidth is typically 1.0 MHz
(see Figure 7-7 on page 19). The maximum peak-to-peak output swing is typically (VS – 1V) with
an output impedance of < 10Ω until current limiting is reached (typically 1.5 mA). Input bias cur-
rent at MIC is typically –40 nA.
Figure 3-5. Microphone Amplifier and Mute
RMF
RMI
VS
10
+
-
VB
11
MICO
From
microphone
MIC
VS
90 kΩ
12
MUTE
75 kΩ
10
U4082B
4743D–CORD–03/06
U4082B
3.12 Hybrid Amplifiers
The two hybrid amplifiers (at HTO+, HTO–, and HTI), in conjunction with an external trans-
former, provide the two-to-four-wire converter for interfacing to the telephone line. The gain of
the first amplifier (HTI to HTO–) is set by external resistors (gain = –RHF / RHI in Figure 1-2 on
page 2), and its output drives the second amplifier, the gain of which is internally set at –1.0.
Unlike most operational amplifiers, these amplifiers have an all-NPN output stage, which maxi-
mizes phase margin and gain bandwidth. This feature ensures stability at gains less than unity,
as well as with a wide range of reactive loads. The open-loop gain of the first amplifier is typically
80 dB, and the gain bandwidth of each amplifier is approximately 1.0 MHz (see Figure 7-6 on
page 19). The maximum output swing (peak to peak) of each amplifier is typically 1.2V less than
VS with an output impedance of < 10Ω until current limiting is reached (typically 8.0 mA). The
output current capability is guaranteed to be a minimum of 5.0 mA. The bias current at HTI is
typically –30 nA.
The connections to the coupling transformer are shown in Figure 1-1 on page 1. Balancing the
network is necessary to match the line impedance.
3.13 Filter
The operation of the filter circuit is determined by the external components. The circuit within the
U4082B from pins FI to FO is a buffer with a high input impedance (> 1 MΩ) and a low output
impedance (< 50Ω). The configuration of the external components determines whether the cir-
cuit is a high-pass filter (as shown in Figure 1-2 on page 2), a low-pass filter, or a band-pass
filter.
As a high-pass filter, with the components shown in Figure 3-6 on page 12, the filter will keep out
the 60Hz (and 120Hz) hum which can be picked up by the external telephone lines.
As a low-pass filter (Figure 3-7 on page 12), it can be used to roll off the high-end frequencies in
the receive circuit, which aids in protecting against acoustic feedback problems.
With an appropriate choice of an input coupling capacitor to the low-pass filter, a band-pass filter
is formed.
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4743D–CORD–03/06
Figure 3-6. High-pass Filter
VB
R2
VS
56 kΩ
R1
300 kΩ
220 kΩ
C1
4700 pF
1
2
FO
FI
C2
4700 pF
260 µA
50
0
305Hz
-3.0
1
1
fN =
C2R1R2
2π
for C1 = C2
-30
fN
Figure 3-7. Low-pass Filter
VB
220 kΩ
0.01 µF
R2
C1
R1
FI
2
1
+1
VI
FO
13 kΩ
13 kΩ
C2
0.001 µF
4.0
20 kHz
0
-3.0
1
1
fN =
C1C2R2
2π
for R1 = R2
-30
fN
12
U4082B
4743D–CORD–03/06
U4082B
3.14 Power Supply, VB, and Chip Disable
The power supply voltage at pin 4 (VS) is between 3.5V and 6.5V for normal operation, but
reduced operation is possible down to 2.8V (see Figure 7-6 on page 19 and section “AGC” on
page 7). The power supply current is shown in Figure 7-9 on page 20 for both power-up and
power-down mode.
The output voltage at VB (pin 15) is approximately (VS – 0.7) / 2, and provides the AC ground for
the system. The output impedance at VB is approximately 400Ω (see Figure 7-10 on page 20),
and in conjunction with the external capacitor at VB, forms a low-pass filter for power supply
rejection. Figure 7-11 on page 21 gives an indication of the amount of rejection with different
capacitors. The capacitor value depends on whether the circuit is powered by the telephone line
or a power supply.
Since VB biases the microphone and hybrid amplifiers, the amount of supply rejection at their
outputs is directly related to the rejection at VB, as well as their respective gains. Figure 8-1 on
page 22 depicts this graphically.
The chip disable (CD, pin 3) permits powering down the IC to conserve power and/or for muting
purposes. With CD < 0.8V, normal operation is in effect.
With 2.0V < CD < VS, the IC is in power-down mode. In power-down mode, the microphone and
the hybrid amplifiers are disabled, and their outputs reach the high-impedance state. Addition-
ally, the bias is removed from the level detectors.
The bias is not removed from the filter (pins 1 and 2), the attenuators (pins 8, 9, 21 and 22), or
from pins 13, 14, and 15 (the attenuators are disabled, however, and will not pass a signal). The
input impedance at CD is typically 90 kΩ, has a threshold of approximately 1.5V, and the voltage
at this pin must be kept within the range of ground and VS (see Figure 7-8 on page 20). If CD is
not used, the pin should be grounded.
4. Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Reference point pin 28, Tamb = 25° C, unless otherwise specified.
Parameters
Symbol
Value
Unit
Supply voltage, pin 4
VS
–1.0 to +7.0
V
Voltages
Pin 3, 12
Pin 13
–1.0 to (VS + 1.0)
–1.0 to (VS + 0.5)
–0.5 to (VS + 0.5)
V
Pin 2, 9, 21
Storage temperature range
Junction temperature
Tstg
Tj
–55 to +150
125
°C
°C
°C
Ambient temperature range
Tamb
–20 to +60
Power dissipation
Tamb = 60°C, SO28
Ptot
520
120
mW
K/W
Maximum thermal resistance
Junction ambient, SO28
RthJA
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5. Recommended Operating Conditions
Parameters
Test Conditions
Symbol
Min.
3.5
0
Typ.
Max.
6.5
Unit
V
Supply voltage
Pin 4
VS
CD input
Pin 3
VS
V
MUTE input
Pin 12
Output current
Pin 15
IB
-
500
VB
µA
V
0.3 ×
VB
Volume control input
Attenuator input signal voltage
Pin 13
VCI
Pins 9, 21
0
350
40
mVrms
dB
Microphone amplifier,
hybrid amplifier gain
0
At RECO, TO; pins 8, 22
At MICO; pin 10
At HTO–, HTO+; pins 6, 5
0
0
0
±2.0
±1.0
±5.0
Load current
mA
Ambient temperature range
Tamb
–20
+60
° C
6. Electrical Characteristics
Tamb = +25°C, VS = 5.0 V, CD ≤0.8 V, unless otherwise specified
Parameters
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
Power Supply
VS = 6.5V, CD = 0.8V
VS = 6.5V, CD = 2.0V
5.5
600.0
8.0
800.0
mA
µA
Supply current
IS
CD input resistance
CD input voltage
VS = VCD = 6.5V
RCD
50.0
90.0
kΩ
High
Low
VCDH
VCDL
2.0
0.0
VS
0.8
V
VS = 3.5V
VS = 5.0V
1.3
2.1
Output voltage
VB
V
1.8
2.4
Output resistance
Power supply rejection ratio
Attenuators
IVB = 1 mA
ROVB
400.0
54.0
Ω
CVB = 220 µF, f = 1 kHz
PSRR
dB
f = 1.0 kHz, VCI = VB
R mode, RI = 150 mVrms
(VS = 5.0V)
Receive attenuator gain
GR
+4.0
–0.5
+6.0
+8.0
dB
(VS = 3.5V)
Gain change
VS = 3.5V versus VS = 5.0V
–VS = 2.8V versus VS = 5.0V
RI = 150 mVrms
∆GR1
∆GR2
GRI
0.0
–25.0
–20.0
52.0
35.0
VB
+0.5
–15.0
–17.0
54.0
AGC gain change
Idle mode
–22.0
49.0
27.0
dB
Range R to T mode
Volume control range
RECO DC voltage
RECO DC voltage
RECO high voltage
∆GR3
VCR
R Mode, 0.3 VB < VCI < VB
R mode
dB
V
VRECO
∆VRECO
VRECOH
R to T mode
±10
±150.0
mV
V
IO = –1 mA, RI = VB + 1.5V
3.7
7.0
IO = 1 mA, RI = VB – 1V,
output measured with respect to VB
RECO low voltage
RI input resistance
VRECOL
RRI
–1.5
10.0
–1.0
14.0
V
RI < 350 mVrms
kΩ
14
U4082B
4743D–CORD–03/06
U4082B
6. Electrical Characteristics (Continued)
Tamb = +25°C, VS = 5.0 V, CD ≤0.8 V, unless otherwise specified
Parameters
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
f = 1 kHz
T mode, TI = 150 mVrms
Idle mode, TI = 150 mVrms
Range T to R mode
GT
GTI
GTI
+4.0
–22.0
49.0
+6.0
–20.0
52.0
+8.0
–17.0
54.0
Transmit attenuator gain
dB
TO DC voltage
TO DC voltage
TO high voltage
T Mode
VTO
VTO
VB
V
mV
V
T to R Mode
±100
±150.0
IO = –1.0 mA, TI = VB + 1.5V
VTOH
3.7
7.0
IO = + 1.0 mA
TI = VB – 1.0V
output measured with respect to VB
TO low voltage
VTOL
–1.5
–1.0
14.0
V
TI input resistance
Gain tracking
TI < 350 mVrms
RTI
10.0
±0.1
kΩ
GR + GT, at T, Idle, R
GTR
dB
Attenuator Control
Pin 14 – VB
R mode, VCI = VB
Idle mode
+240.0
0.0
CT voltage
VCT
mV
T mode
–240.0
CT source current
R mode
T mode
ICTR
ICTT
ICTS
RFI
–85.0
+40.0
–60.0
+60.0
0.0
–40.0
+85.0
µA
µA
µA
kΩ
nA
mV
CT sink current
CT slow idle current
CT fast idle internal resistance
VCI input current
1.5
2.0
3.6
IVCI
VDT
–60.0
15.0
Dial tone detector threshold
10.0
20.0
Microphone Amplifier VMUTE < 0.8V, GVCL = 31 dB
VMICO – VB
Feedback R = 180 kΩ
MICO
VOS
Output offset
–50.0
70.0
0.0
+50.0
mV
Open loop gain
f < 100Hz
GVOLM
GBWM
VMICOH
VMICOL
IBM
80.0
1.0
dB
MHz
V
Gain bandwidth
Output high voltage
Output low voltage
Input bias current (MIC)
IO= –1.0 mA, VS = 5.0V
IO = +1.0 mA
3.7
200.0
mV
nA
–40.0
f = 1 kHz, VMUTE = 2.0V
300Hz < f < 10 kHz
G
G
–55.0
dB
dB
Muting (∆ gain)
–68.0
90.0
MUTE input resistance
MUTE input high
MUTE input low
Distortion
VS = VMUTE = 6.5V
RMUTE
VMUTEH
VMUTEL
THDM
50.0
2.0
kΩ
V
VS
0.0
0.8
V
300Hz < f < 10 kHz
0.15
%
Hybrid Amplifiers
HTO– Offset
VHTO – VB, Feedback R = 51 kΩ
Feedback R = 51 kΩ
HVOS
HBVOS
GVOLH
GB
–20.0
–30.0
60.0
0.0
0.0
+20.0
+30.0
mV
mV
dB
HTO to HTO+ Offset
Open loop gain
Gain bandwidth
HTI to HTO–, f < 100Hz
80.0
1.0
MHz
15
4743D–CORD–03/06
6. Electrical Characteristics (Continued)
Tamb = +25°C, VS = 5.0 V, CD ≤0.8 V, unless otherwise specified
Parameters
Test Conditions
HTO– to HTO+
at HTI
Symbol
GVCLH
IBH
Min.
Typ.
0.0
Max.
Unit
dB
nA
V
Closed loop gain
Input bias current
HTO high voltage
HTO low voltage
HTO+ high voltage
HTO+ low voltage
–0.35
+0.35
–30.0
IO = –5.0 mA
IO = +5.0 mA
IO = –5.0 mA
IO = +5.0 mA
VHT
VHT
VHT
VHT
H
L
3.7
3.7
250.0
450.0
mV
V
H
L
mV
300 Hz < f < 10 kHz
(see Figure 6-1)
Distortion
d
0.3
1.0
%
Level Detectors and Background Noise Monitors
Current ratio from T to R
Transmit receive switching threshold
at RLI1 + RLI2 to 20 mA
at TLI1 + TLI2 to switch
ITH
0.8
1.2
Source current
RLO1, RLO2, TLO1, TLO2
RLO1, RLO2, TLO1, TLO2
IO = 1.2 mA
ILSO
ILSK
RCP
ICPLK
–2.0
4.0
mA
µA
Ω
Sink current
CPR, CPT output resistance
CPR, CPT leakage current
Filter
35
–0.2
µA
Voltage offset at FO
FO sink current
VFO – VB, 220 kΩ from VB to FI
FOVOS
IFO
–200.0
150.0
–90
260
0.0
mV
µA
nA
400.0
FI bias current
IFI
–50.0
System Distortion
From FI to RECO,
FO connected to RI
R Mode
T Mode
dR
dT
0.5
0.8
3.0
3.0
%
%
From MIC to HTO–/HTO+,
includes T attenuator
Figure 6-1. Hybrid Amplifier Distortion Test
6
HTO-
R
51 kΩ
10 kΩ
7
R
1200Ω
-
Amplifier
HTI
VI
0.1 µF
+
-
VB
5
Analyzer
+
HTO+
VB
16
U4082B
4743D–CORD–03/06
U4082B
7. Temperature Characteristics
Parameters
Typical Value at 25°C
5.0 mA
Typical Change –20°C to +60°C
Supply current, CD = 0.8 VIS
Supply current, CD = 2.0 VIS
VB output voltage, VS = 5.0V VO
Attenuator gain (maximum gain)
Attenuator gain (maximum attenuation)
Attenuator input resistance (at TI, RI)
Dial tone detector threshold
–0.3%/°C
–0.4%/°C
400.0 µA
2.1V
+0.8%/°C
+6.0 dB
–46.0 dB
10.0 kΩ
15.0 mV
±60.0 µA
0.0 mV
0.0008 dB/°C
0.004 dB/°C
+0.6%/°C
+20.0 mV/° C
–0.15%/°C
±4.0 mV/°C
±0.02%/°C
–10.0 nA/°C
0.001%/°C
CT source, sink current
Microphone, hybrid amplifier offset
Transmit receive switching threshold
Sink current at RLO1, RLO2, TLO1, TLO2
Closed loop gain (HTO– to HTO+)
1.0
4.0 µA
0.0 dB
Figure 7-1.
Attenuator Gain versus VCT (Pin 14)
10
0
-10
R attenuator
T attenuator
-20
-30
-40
-50
-320
-160
0
160
320
VCT - VB (mV)
17
4743D–CORD–03/06
Figure 7-2. Level Detector DC Transfer Characteristics
500
400
300
200
100
0
0
-20
-40
-60
II (µA)
-80
-100
Figure 7-3. Level Detector AC Transfer Characteristics
300
R = 5.1 kΩ
C = 0.1 µF
250
↓
200
150
100
← R = 10 kΩ
C = 0.047 µF or 0.1 µF
f = 1 kHz
50
0
4
60
80
100
0
20
Vi (mVrms)
Figure 7-4. Level Detector AC Transfer Characteristics versus Frequency
20
10
Vi= 10 mV
0
i
-10
Vi= 40 mV
-20
-30
-40
100
1000
f (Hz)
10000
18
U4082B
4743D–CORD–03/06
U4082B
Figure 7-5. Receive Attenuator versus Volume Control
10
0
-10
Receive mode
-20
-30
-40
← Minimum recommended level
1.2
0.1
0.3
0.5
0.7
0.9
VCI/VB
Figure 7-6. Receive Attenuation Gain versus VS
10
0
-10
-20
-30
-40
2.8
3
3.2
3.4
3.6
VS (V)
Figure 7-7. Microphone and 1st-hybrid Amplifier Open-loop Gain and Phase versus Frequency
120
100
120
100
Microphone amp.
phase
80
60
80
60
Hybrid amp. phase
Gain
40
20
0
40
20
0
0.1
1
10
f (kHz)
100
1000
19
4743D–CORD–03/06
Figure 7-8. Input Characteristics at CD, MUTE
120
100
← Valid for 0 ≤ CD, MUTE ≤ VS
→
80
60
40
20
0
8
2
4
6 6.5
0
Input Voltage (V)
Figure 7-9. Supply Current versus Supply Voltage
10
8
CD ≤ 0.8V
6
4
2
2V ≤ CD ≤ VS
0
0
2
4
6
8
V
S (V)
Figure 7-10. VB Output Characteristics
3.0
2.5
2.0
1.5
1.0
0.5
0
VS = 6V
VS = 3.5V
0
0.5
1.0
1.5
2.0
2.5
-IB (mA) (Load Current)
20
U4082B
4743D–CORD–03/06
U4082B
Figure 7-11. VB Power Supply Rejection versus Frequency Characteristics and VB Capacitor
80
CVB = 1000 µF
500 µF
60
40
20
200 µF
100 µF
50 µF
2
0.3
1
3
f (kHz)
8. Design Guidelines
8.1
Switching Time
The switching time of the U4082B circuit is determined primarily by CT (pin 14, refer to Figure
3-3 on page 7), and secondarily by the capacitors at the level detector outputs (RLO1, RLO2,
TLO1, TLO2). For more information, please refer to Figure 1-2 on page 2.
The time to switch from idle to receive or transmit mode is determined by the capacitor at CT,
together with the internal current sources. The switching time is:
∆MinimalV × CT
240Minimal × 5
∆MinimalT = ------------------------------------------ = ---------------------------------------- = 20.0 ms
I
60
where
∆V = 240 mV
CT = 5 µF
I
= 60 µA
If the circuit switches directly from receive to transmit mode (or vice versa), the total switching
time would be 40 ms.
The switching time depends upon the mode selection. If the circuit is going to “fast idle”, the time
constant is determined by the CT capacitor, and the internal 2 kΩ resistor. With CT = 5 µF, the
time constant is approximately 10 ms, giving a switching time to idle of approximately 30 ms (for
95% change). Fast idle is an infrequent mode, however, occurring when both speakers are talk-
ing and competing for control of the circuit. The switching time from idle back to either transmit or
receive mode is described above.
By switching to “slow idle” the time constant is determined by the CT capacitor and RT, the exter-
nal resistor (see Figure 3-4 on page 9). With CT = 5.0 µF and RT = 120 kΩ, the time constant is
approximately 600 ms, giving a switching time of approximately 1.8 seconds (for 95% change).
The switching period to slow idle begins when both speakers have stopped talking. The switch-
ing time back to the original mode will depend on how soon that speaker begins speaking again.
The sooner the speaking starts during the 1.8s period, the quicker the switching time since a
smaller voltage excursion is required. The switching time is determined by the internal current
source as described above.
21
4743D–CORD–03/06
The above switching times occur, however, after the level detectors have detected the appropri-
ate signal levels, since their outputs operate the attenuator control block. Referring to Figure 3-2
on page 6, the rise time of the level detectors' outputs to new speech is quick by comparison
(approximately 1 ms), determined by the internal 350Ω resistor and the external capacitor (typi-
cally 2 µF). The output's decay time is determined by the external capacitor and an internal 4 µA
current source, giving a decay rate of 60 ms for a 120 mV excursion at RLO or TLO. Total
response time of the circuit is not constant since it depends on the relative strength of the sig-
nals at the different level detectors and the timing of the signals with respect to each other. The
capacitors at the four outputs (RLO1, RLO2, TLO1, TLO2) must be of equal value (±10%) to
prevent problems in timing and level response.
The rise time of the level detector's outputs is not significant since it is so short. The decay time,
however, provides a significant part of the “hold time” necessary to hold the circuit during the
normal pauses in speech.
The components at the inputs of the level detectors (RLI1, RLI2, TLI1, TLI2) do not affect the
switching time but rather affect the relative signal levels required to switch the circuit and the fre-
quency response of the detectors.
8.2
Design Equations
The following definitions are used at 1 kHz with reference to Figure 1-2 on page 2 and Figure 8-3
on page 23 where coupling capacitors are omitted for the sake of simplicity:
• GMA is the gain of the microphone amplifier measured from the microphone output to TI
(typically 35V/V, or 31 dB)
• GT is the gain of the transmit attenuator, measured from TI to TO
• GHA is the gain of hybrid amplifiers, measured from TO to the HTO–/HTO+ differential output
(typically 10.2V/V, or 20.1 dB)
• GHT is the gain from HTO–/HTO+ to Tip/Ring for transmit signals, and includes the balance
network (measured at 0.4V/V, or –8 dB)
Figure 8-1. VB Power Supply Rejection of the Microphone and Hybrid Amplifiers
100
HTO-, CVB = 1000 µF
80
= 220 µF
60
MICO,
CVB = 1000 µF
40
20
= 220 µF
0
0.3
1
3
2
f (kHz)
22
U4082B
4743D–CORD–03/06
U4082B
Figure 8-2. Typical Output Swing versus VS
6
5
MICO
HTO -,
HTO +
4
TO, RO
3
2
TO
FO
RO
1
0
3
4
5
6
VS (V)
Figure 8-3. Basic Clock Diagram for Design Purposes
MIC amp.
Hybrid amp.
HTO-/HTO+
TI
TO
MICO
T attenuator
R2
I1
R1
I2
GHIT
Tip
TLI2
TLI1
-
+
-
Comparator
C1
Comparator
C2
+
Acoustic
coupling
Attenuator
control
GST
Hybrid
Ring
+
-
+
-
RLI1
I4
RLI2
I3
GHR
R3
SAO
R4
R attenuator
FI
FO
RECO
RI
Speaker amp.
Filter
• GST is the side tone gain, measured from HTO–/HTO+ to the filter input (measured at
0.18 V/V, or –15 dB)
• GHR is the gain from Tip/Ring to the filter input for receive signals (measured at 0.833V/V or
–1.6 dB)
• GFO is the gain of the filter stage, measured from the input of the filter to RI, typically 0 dB
• GR is the gain of the receive attenuator measured from RI to RECO
• GSA is the gain of the speaker amplifier, measured from RECO to the differential output of the
U4083B (typically 22V/V or 26.8 dB)
• GAC is the acoustic coupling, measured from the speaker differential voltage to the
microphone output voltage
23
4743D–CORD–03/06
8.2.1
Transmit Gain
The transmit gain, from the microphone output (VM) to Tip and Ring, is determined by the output
characteristics of the microphone, and the desired transmit level. For example, a typical electret
microphone will produce approximately 0.35 mVrms under normal speech conditions. To
achieve 100 mVrms at Tip/Ring, an overall gain of 285V/V is necessary. The gain of the transmit
attenuator is fixed at 2.0 (+6.0 dB), and the gain through the hybrid of Figure 1-2 on page 2
(GHT) is nominally 0.4 (–8.0 dB). Therefore, a gain of 357V/V is required of the microphone and
hybrid amplifiers. It is desirable to have the majority of that gain in the microphone amplifier for
three reasons:
1. The low-level signals from the microphone should be amplified as soon as possible to
minimize signal/noise problems;
2. to provide a reasonable signal level to the TLI2 level detector;
3. and to minimize any gain applied to broadband noise generated within the attenuator.
However, to cover the normal voice band, the microphone amplifier's gain should not
exceed 48 dB (Figure 7-7 on page 19). For the circuit in Figure 8-3 on page 23, the gain
of the microphone amplifier was set at 35V/V (31 dB), and the differential gain of the
hybrid amplifiers was set at 10.2V/V (20.1 dB).
8.2.2
Receive Gain
The overall receive gain depends on the incoming signal level and the desired output power at
the speaker. Nominal receive levels (independent of the peaks) at Tip/Ring can be 35 mVrms
(–27 dBm), although on long lines that level can be down to 8.0 mVrms (-40 dBm). The speaker
power is:
10dBm/10 × 0.6
PSPK = --------------------------------------
(1)
RS
where RS is the speaker impedance, and the dBm term is the incoming signal level increased by
the gain of the receive path. Experience has shown that approximately 30 dB gain is a satisfac-
tory amount for the majority of applications. Using the above numbers and equation 1, it would
appear that the resulting power to the speaker is extremely low. However, equation 1 does not
consider the peaks in normal speech which can be 10 to 15 times the rms value. Considering
the peaks, the overall average power approaches 20 to 30 mW on long lines, and much more on
short lines.
Referring to Figure 1-2 on page 2, the gain from Tip/Ring to the filter input was measured at
0.833V/V (–1.6 dB), the filter's gain is unity, and the receive attenuator's gain is 2.0V/V (+6.0 dB)
at maximum volume. The speaker amplifier's gain is set at 22V/V (26.8 dB) which puts the over-
all gain at approximately 31.2 dB.
8.2.3
Loop Gain
The total loop gain (of Figure 8-3 on page 23) must add up to less than 0 dB to obtain a stable
circuit. This can be expressed as:
GMA + GT + GHA + GST + GFO + GR + GSA + GAC < 0
( 2 )
Using the typical numbers mentioned above, and knowing that GT + GR = –40 dB, the required
acoustic coupling can be determined:
GAC < –[31 + 20.1 + (–15) + 0 + (–40) + 26.8] = –22.9 dB( 3 )
24
U4082B
4743D–CORD–03/06
U4082B
An acoustic loss of at least 23 dB is necessary to prevent instability and oscillations, commonly
referred to as “singing”. However, the following equations show that greater acoustic loss is nec-
essary to obtain proper level detection and switching.
8.2.4
Switching Thresholds
To switch comparator C1, currents I1 and I3 need to be determined. Referring to Figure 8-3 on
page 23, with a receive signal VL applied to Tip/Ring, a current I3 will flow through R3 into RLI2
according to the following equation:
VL
------
R3
GSA
----------
2
I3
=
×
G
HR × GFO × GR
×
(4)
where the terms in the brackets are the V/V gain terms. The speaker amplifier gain is divided by
two since GSA is the differential gain of the amplifier, and V3 is obtained from one side of that
output. The current I1, coming from the microphone circuit, is defined by:
V
M × GMA
I1 = --------------------------
R1
(5)
where VM is the microphone voltage. Since the switching threshold occurs when I1 = I3, combin-
ing the above two equations yields:
R1 [GHR × GFO × GR × GSA
]
------ --------------------------------------------------------------------
VM = VL ×
×
(6)
R3
GMA × 2
This is the general equation defining the microphone voltage necessary to switch comparator C1
when a receive signal VL is present. The highest VM occurs when the receive attenuator is at
maximum gain (+6.0 dB). Using the typical numbers for equation 6 yields:
VM = 0.52 × VL
(7)
To switch comparator C2, currents I2 and I4 need to be determined. With sound applied to the
microphone, a voltage VM is created by the microphone, resulting in a current I2 into TLI1:
VM
-------
R2
GHA
----------
2
I2
=
×
G
MA × GT ×
(8)
Since GHA is the differential gain of the hybrid amplifiers, it is divided by two to obtain the voltage
V2 applied to R2. Comparator C2 switches when I4 = I2. I4 is defined by:
VL
I4 = ------[GHR × GFO
]
(9)
R4
Setting I4 = I2, and combining the above equations results in:
R4 [GMA × GT × GHA
]
------ -------------------------------------------------
VL = VM
×
×
(10)
R2
GHR × GFO × 2
25
4743D–CORD–03/06
This equation defines the line voltage at Tip/Ring necessary to switch comparator C2 in the
presence of a microphone voltage. The highest VL occurs when the circuit is in transmit mode
(GT = +6.0 dB). Using the typical numbers for equation 10 yields:
VL = 840 × VM (or VM = 0.0019 × VL) (11)
At idle, where the gain of the two attenuators is –20 dB (0.1V/V), equations 6 and 10 yield the
same result:
VM = 0.024 × VL
(12)
Equations 7, 11, and 12 define the thresholds for switching, and are represented in Figure 8-4
The "M" terms are the slopes of the lines (0.52, 0.024, and 0.0019) which are the coefficients of
the three equations. The MR line represents the receive to transmit threshold, in that it defines
the microphone signal level necessary to switch to transmit in the presence of a given receive
signal level. The MT line represents the transmit to receive threshold. The MI line represents the
idle condition, and defines the threshold level on one side (transmit or receive) necessary to
overcome noise on the other.
Figure 8-4. Switching Thresholds
MR
VM
MI
MT
VL
Some comments on the graph (see Figure 8-4):
• Acoustic coupling and side tone coupling were not included in equations 7 and 12. Those
couplings will affect the actual performance of the final speakerphone due to their interaction
with speech at the microphone and the receive signal coming in at Tip/Ring. The effects of
those couplings are difficult to predict due to their associated phase shifts and frequency
response. In some cases the coupling signal will add, and other times subtract from the
incoming signal. The physical design of the speakerphone enclosure, as well as the specific
phone line to which it is connected, will affect the acoustic and side tone couplings,
respectively.
• The MR line helps define the maximum acoustic coupling allowed in a system, which can be
found from the following equation:
R1
GAC(MAX) = ------------------------------------
(13 )
2 × R3 × GMA
26
U4082B
4743D–CORD–03/06
U4082B
Equation 13 is independent of the volume control setting. Conversely, the acoustic coupling of a
designed system helps determine the minimum slope of that line. Using the component values
of Figure 1-2 on page 2 in equation 13 yields a GAC(MAX) of –37 dB. Experience has shown, how-
ever, that an acoustic coupling loss of 40 dB is desirable.
• The MT line helps define the maximum side tone coupling (GST) allowed in the system. GST
can be found using the following equation:
R4
GST = -----------------------------------
(14)
2 × R2 × GFO
Using the component values of Figure 1-2 on page 2 in equation 14 yields a maximum side tone
of 0 dB. Experience has shown, however, that a minimum of 6.0 dB loss is preferable.
The above equations can be used to determine the resistor values for the level detector inputs.
Equation 6 can be used to determine the R1-R3 ratio, and equation 10 can be used to determine
the R1-R2 ratio. In Figure 8-3 on page 23, R1-R4 each represent the combined impedance of the
resistor and coupling capacitor at each level detector input. The magnitude of each RC's imped-
ance should be kept within the range of 2.0 kΩ to 15 kΩ in the voice band (due to the typical
signal levels present) to obtain the best performance from the level detectors. The specific R
and C at each location will determine the frequency response of that level detector.
9. Application Information
9.1
Dial Tone Detector
The threshold for the dial tone detector is internally set at 15 mV (10 mVrms) below VB (see Fig-
ure 3-3 on page 7). That threshold can be reduced by connecting a resistor from RI to ground.
The resistor value is calculated from:
VB
R = 10 k ------- – 1
∆V
where VB is the voltage at pin 15, and ∆V is the amount of threshold reduction. By connecting a
resistor from VS to RI, the threshold can be increased. The resistor value is calculated from:
V
S – VB
R = 10 k -------------------- – 1
∆V
where ∆V is the amount of the threshold increase.
9.2
Background Noise Monitors
For testing or circuit analysis purposes, the transmit or receive attenuators can be set to the “on”
position by disabling the background noise monitors and applying a signal so as to activate the
level detectors. Grounding the CPR pin will disable the receive background noise monitor,
thereby indicating the “presence of speech” to the attenuator control block. Grounding CPT does
the same for the transmit path.
Additionally, the receive background noise monitor is automatically disabled by the dial tone
detector whenever the receive signal exceeds the detector's threshold.
27
4743D–CORD–03/06
9.3
Transmit/Receive Detection Priority
Although the U4082B was designed to have idle mode such that the attenuators are halfway
between their full on and full off positions, idle mode can be biased towards the transmit or the
receive side. With this done, gaining control of the circuit from idle will be easier for that side
towards which it is biased since that path will have less attenuation at idle.
By connecting a resistor from CT (pin 14) to ground, the circuit will be biased towards the trans-
mit side. The resistor value is calculated from:
VB
R = RT ------- – 1
∆V
where
RT = 120 kΩ (typ.) connected between pin 14 and 15.
∆V= VB – V14 (see Figure 7-1 on page 17).
By connecting a resistor from CT (pin 14) to VS, the circuit will be biased towards the receive
side. The resistor value is calculated from:
V
S – VB
R = RT -------------------- – 1
∆V
Switching time will be somewhat affected in each case due to the different voltage excursions
required to get to transmit and receive from idle. For practical considerations, the ∆V shift should
not exceed 100 mV.
28
U4082B
4743D–CORD–03/06
U4082B
10. Ordering Information
Extended Type Number
Package
SO28
Remarks
U4082B-MFLG
Tube, Pb-free
U4082B-MFLG3G
SO28
Taped and reeled, Pb-free
11. Package Information
9.15
8.65
Package SO28
Dimensions in mm
18.05
17.80
7.5
7.3
2.35
0.25
0.25
0.10
0.4
10.50
10.20
1.27
16.51
28
15
technical drawings
according to DIN
specifications
1
14
29
4743D–CORD–03/06
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