U6084B-MFPG3Y [ATMEL]

PWM Power Control with Automatic Duty-cycle Reduction; PWM功率控制,具有自动占空比降低
U6084B-MFPG3Y
型号: U6084B-MFPG3Y
厂家: ATMEL    ATMEL
描述:

PWM Power Control with Automatic Duty-cycle Reduction
PWM功率控制,具有自动占空比降低

驱动器 MOSFET驱动器 驱动程序和接口 接口集成电路 功率控制 光电二极管
文件: 总11页 (文件大小:234K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
Features  
Pulse-width Modulation up to 2-kHz Clock Frequency  
Protection Against Short-circuit, Load-dump Overvoltage and Reverse VS  
Duty Cycle 0% to 100% Continuously  
Output Stage for Power MOSFET  
Interference and Damage Protection According to VDE 0839 and  
ISO/TR 7637/1  
PWM Power  
Control with  
Automatic  
Duty-cycle  
Reduction  
Charge-pump Noise Suppressed  
Ground-wire Breakage Protection  
1. Description  
The U6084B is a PWM-IC with bipolar technology designed for the control of an  
N-channel power MOSFET used as a high-side switch. The IC is ideal for use in the  
brightness control (dimming) of lamps such as in dashboard applications. For constant  
brightness, the preselected duty cycle can be reduced automatically as a function of  
the supply voltage.  
U6084B  
Figure 1-1. Block Diagram with External Circuit  
VBatt  
C5  
VS  
Rsh  
9
16  
11  
12  
Short circuit  
latch monitoring  
Current monitoring  
+ short circuit detection  
5
6
13  
14  
Charge  
pump  
RC oscillator  
C3  
47 nF  
PWM  
Logic  
C1  
47 kΩ  
Control input  
Output  
3
Duty cycle  
range  
0-100%  
C2  
Duty cycle  
reduction  
Voltage  
monitoring  
Enable/  
disable  
4
1
2
R3  
150 Ω  
Ground  
.
Rev. 4677C–AUTO–09/05  
2. Pin Configuration  
Figure 2-1. Pinning SO16  
GND  
1
2
16 VS  
15  
EN/DIS  
VI  
NC  
OUTPUT  
3
4
14  
REDUCT  
NC  
2 VS  
13  
12  
5
6
SENSE  
OSC  
NC  
11 DELAY  
10 NC  
7
8
LATCH  
9
NC  
Table 2-1.  
Pin Description  
Pin  
1
Symbol  
GND  
EN/DIS  
VI  
Function  
IC ground  
2
Enable/disable  
Control input (duty cycle)  
Duty cycle reduction  
Attenuation  
3
4
REDUCT  
NC  
5
6
OSC  
Oscillator  
7
NC  
Not connected  
8
NC  
Not connected  
9
LATCH  
NC  
Status short-circuit latch  
Not connected  
10  
11  
12  
13  
14  
15  
16  
DELAY  
SENSE  
2VS  
Short-circuit protection delay  
Current sensing  
Voltage doubler  
Output  
OUTPUT  
NC  
Not connected  
VS  
Supply voltage VS  
2
U6084B  
4677C–AUTO–09/05  
U6084B  
3. Functional Description  
3.1  
Pin1 – GND  
3.1.1  
Ground-wire Breakage  
To protect the FET in case of ground-wire breakage, a 820-kresistor between gate and source  
is recommended to provide proper switch-off conditions.  
3.2  
3.3  
Pin 2 – Enable/Disable  
The dimmer can be switched on or off with pin 2, independently of the set duty cycle.  
Table 3-1.  
V2  
Pin 2 Function  
Function  
Disable  
Enable  
> approximately 0.7V or open  
< 0.7V or connected to pin 1  
Pin 3 – Control Input  
The pulse width is controlled by means of an external potentiometer (47 k). The characteristic  
(angle of rotation/duty cycle) is linear. The duty cycle be varied from 0% to 100%. It is possible to  
further restrict the duty cycle with resistors R1 and R2 (Figure 7-1 on page 9).  
Pin 3 is protected against short-circuit to VBatt and ground GND (VBatt 16.5V).  
3.4  
Pin 4 – Duty Cycle Reduction  
With pin 4 connected according to Figure 7-1 on page 9, the set duty cycle is reduced to  
Batt 12.5V. This causes a power reduction in the FET and in the lamps. In addition, the  
brightness of the lamps is largely independent of the supply voltage range, VBatt = 12.5V to 16V.  
V
3.4.1  
Output Slope Control  
The rise and fall time (tr, tf) of the lamp voltage can be limited to reduce radio interference. This  
is done with an integrator which controls a power MOSFET as source follower. The slope time is  
controlled by an external capacitor C4 and the oscillator current (Figure 7-1 on page 9).  
Calculation:  
C4  
--------  
×
tf = tr = VBatt  
Iosc  
With VBatt = 12V, C4 = 470 pF and Iosc = 40 µA, the controlled slope is  
470 pF  
------------------  
tf = tr = 12V ×  
× 141 µs  
40 µA  
3.5  
Pin 5 – Attenuation  
Capacitor C4 connected to pin 5 damps oscillation tendencies.  
3
4677C–AUTO–09/05  
3.6  
Pin 6 – Oscillator  
The oscillator determines the frequency of the output voltage. This is defined by an external  
capacitor, C2. It is charged with a constant current, I, until the upper switching threshold is  
reached. A second current source is then activated which taps a double current, 2 × I, from the  
charging current. The capacitor, C2, is thus discharged by the current, I, until the lower switching  
threshold is reached. The second source is then switched off again and the procedure starts  
once more.  
3.6.1  
Example for Oscillator Frequency Calculation  
VT100 = VS × α1 = (VBatt IS × R3) × α1  
VT<100 = VS × α2 = (VBatt IS × R3) × α2  
VTL = VS × α3 = (VBatt IS × R3) × α3  
where  
V
V
V
T100 = High switching threshold 100% duty cycle  
T<100 = High switching threshold < 100% duty cycle  
TL = Low switching threshold  
α1, α2 and α3 are fixed values  
The above mentioned threshold voltages are calculated for the following values given in the  
datasheet.  
V
Batt = 12V, IS = 4 mA, R3 = 150Ω  
α1 = 0.7, α2 = 0.67 and α3 = 0.28  
V
V
V
T100 = (12V – 4 mA × 150) × 0.7 8V  
T<100 = 11.4V × 0.67 = 7.6V  
TL = 11.4V × 0.28 = 3.2V  
For a duty cycle of 100%, the oscillator frequency, f, is as follows:  
Iosc  
f = ----------------------------------------------------------- where C2 = 22 nF and Iosc = 40 µA  
2 × (VT100 VTL) × C2  
Therefore:  
40 µA  
f = --------------------------------------------------------------- = 18 9Hz  
2 × (8V 3.2V) × 22 nF  
For a duty cycle of less than 100%, the oscillator frequency, f, is as follows:  
Iosc  
f = ----------------------------------------------------------------------------------------------------------  
2 × (VT<100 VTL) × C2 + 4 × VBatt × C4  
where C4 = 470 pF  
40 µA  
f = -------------------------------------------------------------------------------------------------------------------------- = 185Hz  
2 × (7.6V 3.2V) × 22 nF + 4 × 12V × 470 pF  
A selection of different values of C2 and C4 provides a range of oscillator frequencies from 10Hz  
to 2000Hz.  
4
U6084B  
4677C–AUTO–09/05  
U6084B  
3.7  
3.8  
Pins 7, 8, 10 and 15  
Not connected.  
Pin 9 – Status Short Circuit Latch  
The status of the short-circuit latch can be monitored via pin 9 (open collector output).  
Table 3-2.  
Pin 9 Function  
Pin 9  
Function  
L
Short-circuit detected  
No short-circuit detected  
H
3.9  
Pins 11 and 12 – Short-circuit Protection and Current Sensing  
3.9.1  
Short-circuit Detection and Time Delay td  
The lamp current is monitored by means of an external shunt resistor. If the lamp current  
exceeds the threshold for the short-circuit detection circuit (VT2 90 mV), the duty cycle is  
switched over to 100% and capacitor C5 is charged by a current source of 20 µA (Ich – Idis). The  
external FET is switched off after the cut-off threshold (VT11) is reached. Renewed switching on  
of the FET is possible only after a power-on reset. The current source, Idis, ensures that capaci-  
tor C5 is not charged by parasitic currents. Capacitor C5 is discharged by Idis to typically 0.7V.  
Time delay, td, is as follows:  
(V11 0.7V)  
--------------------------------  
td = C5 ×  
(Ich Idis  
)
With C5 = 330 nF and VBatt = 12V, we have  
(9.8V 0.7V)  
----------------------------------  
td = 330 nF ×  
= 150 ms  
20 µA  
3.9.2  
Current Limitation  
The lamp current is limited by a control amplifier that protects the external power transistor. The  
voltage drop across an external shunt resistor acts as the measured variable. Current limitation  
takes place for a voltage drop of VT1 100 mV. Owing to the difference VT – VT2 10 mV, cur-  
rent limitation occurs only when the short-circuit detection circuit has responded.  
After a power-on reset, the output is inactive for half an oscillator cycle. During this time, the sup-  
ply voltage capacitor can be charged so that current limitation is guaranteed in the event of a  
short-circuit when the IC is switched on for the first time.  
3.10 Pins 13 and 14 – Charge Pump and Output  
Pin 14 (output) is suitable for controlling a power MOSFET. During the active integration phase,  
the supply current of the operational amplifier is mainly supplied by capacitor C3 (bootstrapping).  
Additionally, a trickle charge is generated by an integrated oscillator (f13 400 kHz) and a volt-  
age doubler circuit. This permits a gate voltage supply at a duty cycle of 100%.  
5
4677C–AUTO–09/05  
3.11 Pin 16 – Supply Voltage, Vs or VBatt  
3.11.1  
Undervoltage Detection  
In the event of voltages of approximately VBatt < 5.0V, the external FET is switched off and the  
latch for short-circuit detection is reset.  
A hysteresis ensures that the FET is switched on again at approximately VBatt 5.4V.  
3.11.2  
Overvoltage Detection  
• Stage 1  
– If overvoltages of VBatt > 20V (typically) occur, the external transistor is switched off  
and switched on again at VBatt < 18.5V (hysteresis).  
• Stage 2  
– If VBatt > 28.5V (typically), the voltage limitation of the IC is reduced from 26V to 20V.  
The gate of the external transistor remains at the potential of the IC ground, thus  
producing voltage sharing between the FET and lamps in the event of overvoltage  
pulses (for example, load dump). The short-circuit protection is not in operation. At  
V
Batt < 23V, the overvoltage detection stage 2 is switched off.  
6
U6084B  
4677C–AUTO–09/05  
U6084B  
4. Absolute Maximum Ratings  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating  
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this  
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability  
Parameters  
Symbol  
Tj  
Value  
150  
Unit  
°C  
Junction temperature  
Ambient temperature range  
Storage temperature range  
Tamb  
Tstg  
–40 to +110  
–55 to +125  
°C  
°C  
5. Thermal Resistance  
Parameters  
Symbol  
Value  
Unit  
Junction ambient  
RthJA  
120  
K/W  
6. Electrical Characteristics  
Tamb = –40 to +110°C, VBatt = 9V to 16.5V (basic function is guaranteed between 6.0V and 9.0V), reference point ground, unless  
otherwise specified (Figure 1-1 on page 1). All other values refer to pin GND (pin 1).  
Parameters  
Test Conditions  
Pin 16  
Symbol  
IS  
Min.  
Typ.  
Max.  
6.8  
Unit  
mA  
V
Current consumption  
Supply voltage  
Overvoltage detection, stage 1  
IS = 10 mA, pin 16  
VBatt  
VS  
25  
Stabilized voltage  
24.5  
27.0  
V
- On  
- Off  
4.4  
4.8  
5.0  
5.4  
5.6  
6.0  
Battery undervoltage detection  
Battery Overvoltage Detection  
Stage 1:  
VBatt  
V
V
Pin 2  
- On  
- Off  
18.3  
16.7  
20.0  
18.5  
21.7  
20.3  
VBatt  
- On  
- Off  
25.5  
19.5  
28.5  
23.0  
32.5  
26.5  
Stage 2:  
VBatt  
VZ  
V
V
Stabilized voltage  
IS = 30 mA, pin 16  
Pin 12  
18.5  
20.0  
21.5  
Short-circuit Protection  
Short-circuit current limitation  
VT1 = VS – V12  
VT2 = VS – V12  
VT1  
VT2  
85  
75  
3
100  
90  
120  
105  
30  
mV  
mV  
mV  
Short-circuit detection  
VT1 – VT2  
10  
Delay Timer Short-circuit Detection Pin 11  
Switched off threshold  
Charge current  
VT11 = VS – V11  
VT11  
Ich  
9.5  
13  
9.8  
23  
3
10.1  
V
µA  
µA  
mA  
Discharge current  
Capacitance current  
Output Short-circuit Latch  
Saturation voltage  
Voltage Doubler  
Voltage  
Idis  
I5  
I5 = Ich – Idis  
Pin 9  
20  
27  
I9 = 100 µA  
Pin 13  
Vsat  
150  
400  
350  
mV  
Duty cycle 100%  
V13  
f13  
2 VS  
280  
Oscillator frequency  
520  
kHz  
Note:  
1. Reference point is battery ground  
7
4677C–AUTO–09/05  
6. Electrical Characteristics (Continued)  
Tamb = –40 to +110°C, VBatt = 9V to 16.5V (basic function is guaranteed between 6.0V and 9.0V), reference point ground, unless  
otherwise specified (Figure 1-1 on page 1). All other values refer to pin GND (pin 1).  
Parameters  
Test Conditions  
I13 = 5 mA  
Symbol  
V13  
Min.  
26  
Typ.  
27.5  
Max.  
30.0  
Unit  
V
Internal voltage limitation  
Gate Output  
(Whichever is lower)  
Pin 14  
V13  
(VS+14  
)
(VS+15  
)
(VS+16)  
Low level  
V14  
0.35  
0.70  
V13  
0.95  
VBatt = 16.5V, Tamb = 110°C,  
R3 = 150Ω  
Voltage  
1.5(1)  
V
High level, duty cycle 100%  
V14 = Low level  
V14  
I14  
1.0  
Current  
mA  
V14 = High level, I13  
>
I14  
–1.0  
Enable/Disable  
Current  
Pin 2  
V2 = 0V  
Pin 4  
I2  
–20  
6.9  
–40  
7.4  
–60  
8.0  
µA  
V
Duty Cycle Reduction  
Z-voltage  
I4 = 500 µA  
V4  
Oscillator  
Frequency  
Pin 6  
f
10  
2000  
0.72  
Hz  
Threshold cycle  
Upper  
VT100  
V14 = High, α1 = --------------  
α1  
0.68  
0.7  
VS  
VT<100  
V14 = Low, α2 = -----------------  
VS  
Lower  
α2  
α3  
0.65  
0.26  
0.67  
0.28  
0.69  
0.3  
VTL  
α3 = ---------  
VS  
Oscillator current  
V
Batt = 1V  
±Iosc  
f
26  
40  
54  
µA  
Hz  
C4 open, C2 = 470 nF,  
duty cycle = 50%  
Frequency tolerance  
6.0  
9.9  
13.5  
Note:  
1. Reference point is battery ground  
8
U6084B  
4677C–AUTO–09/05  
U6084B  
7. Application  
Figure 7-1. Application  
9
4677C–AUTO–09/05  
8. Ordering Information  
Extended Type Number  
Package  
Remarks  
U6084B-MFPG3Y  
SO16  
Taped and reeled, Pb-free  
9. Package Information SO16  
5.2  
4.8  
Package SO16  
Dimensions in mm  
10.0  
9.85  
3.7  
1.4  
0.2  
0.25  
0.10  
0.4  
3.8  
1.27  
6.15  
5.85  
8.89  
16  
9
technical drawings  
according to DIN  
specifications  
1
8
10. Revision History  
Please note that the following page numbers referred to in this section refer to the specific revision  
mentioned, not to this document.  
Revision No.  
History  
Block Diagram on Page 1 changed  
4677B-AUTO-02/03  
New heading rows at Table “Absolute Maximum Ratings” on page 6  
added  
Put datasheet in a new template  
Updated text to new style guide  
First page: Pb-free logo added  
Page 9: Ordering Information changed  
4677C-AUTO-08/05  
10  
U6084B  
4677C–AUTO–09/05  
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4677C–AUTO–09/05  

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