AS8ER128K32QB-250/XT [AUSTIN]
128K x 32 EEPROM Radiation Tolerant EEPROM Memory Array AVAILABLE AS MILITARY; 128K ×32 EEPROM耐辐射EEPROM存储器阵列可作为军事
| 型号： | AS8ER128K32QB-250/XT |
| 厂家： | 
AUSTIN SEMICONDUCTOR |
| 描述： | 128K x 32 EEPROM Radiation Tolerant EEPROM Memory Array AVAILABLE AS MILITARY |
| 文件： | 总17页 (文件大小：183K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
PLEASE NOTE:
An EOL notice was
issued on this product in 2001.
However, ASI has a large
amount of die inventory
available. For assistance,
please contact your local
sales representative.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
1
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
128K x 32 EEPROM
PIN ASSIGNMENT
Radiation Tolerant
(Top View)
68 Lead CQFP
EEPROM Memory Array
AVAILABLE AS MILITARY
SPECIFICATIONS
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60
I/O0 10
I/O1 11
I/O2 12
I/O3 13
I/O4 14
I/O5 15
I/O6 16
I/O7 17
GND 18
I/O8 19
I/O9 20
I/O10 21
I/O11 22
I/O12 23
I/O13 24
I/O14 25
I/O15 26
I/O16
I/O17
I/O18
I/O19
I/O20
59
58
57
56
•
•
MIL-STD-883
SMD 5962-94585
55 I/O21
I/O22
I/O23
GND
I/O24
I/O25
54
53
52
51
50
FEATURES
•
•
•
Access time of 150ns
Operation with single 5V + 10% supply
Power Dissipation:
49 I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
48
47
46
45
44
Active: 1.43 W (MAX), Max Speed Operation
Standby: 7.7 mW (MAX), Battery Back-up Mode
On-Chip Latches: Address, Data, CE\, OE\, WE\
Automatic Byte Write: 10 ms (MAX)
Automatic Page Write (128 bytes): 10 ms (MAX)
Data protection circuit on power on/off
Low power CMOS
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
•
•
•
•
•
•
•
•
•
•
•
•
•
*Pin #'s 31 and 32, A15 and A14 respectively, are reversed from the AS8E128K32. Correct
use of these address lines is required for operation of the SDP mode to work properly.
PIN NAME
A0 to A16
I/O0 to I/O31 Data Input/Output
FUNCTION
104 Erase/Write cycles (in Page Mode)
Software data protection
Address Input
TTL Compatible Inputs and Outputs
Data Retention: 10 years
Ready/Busy\ and Data Polling Signals
Write protection by RES\ pin
Radiation Tolerant: Proven total dose 40K to 100K RADS*
Operating Temperature Ranges:
Military: -55oC to +125oC
Industrial: -40oC to +85oC
OE\
CE\
WE\
Output Enable
Chip Enable
Write Enable
Power Supply
Ground
VCC
VSS
RDY/BUSY\ Ready Busy
RES\ Reset
OPTIONS
MARKINGS
•
Timing
150 ns
-150
-200
-250
200 ns
250 ns
•
Package
Ceramic Quad Flat pack
Ceramic Quad Flat pack
Q
QB
No. 703
GENERAL DESCRIPTION
The Austin Semiconductor, Inc. AS8ER128K32 is a 4 Megabit
Radiation Tolerant EEPROM Module organized as 128K x 32 bit.
User configurable to 256K x16 or 512Kx 8. The module achieves high
speed access, low power consumption and high reliability by
employing advanced CMOS memory technology.
The military grade product is manufactured in compliance to
MIL-STD 883, making the AS8ER128K32 ideally suited for military
or space applications.
FUNCTIONAL BLOCK DIAGRAM
The module is offered as a 68 lead 0.990 inch square ceramic
quad flat pack. It has a max. height of 0.200 inch. This package design
is targeted for those applications which require low profile SMT
For more products and information
please visit our web site at
www.austinsemiconductor.com
Packaging.
* contact factory for test reports. ASI does not guarantee or warrant
these performance levels, but references these third party reports.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
2
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
TRUTH TABLE
RDY/BUSY\1
MODE
CE\
VIL
VIH
VIL
VIL
X
OE\
WE\
VIH
X
RES\
I/O
2
Read
High-Z
High-Z
High-Z to VOL
High-Z
---
Dout
VIL
X3
VH
Standby
Write
X
VH
VH
X
High-Z
Din
VIH
VIL
VIH
VIH
X
Deselect
High-Z
---
VIH
X
Wirte Inhibit
X
X
---
---
VIL
VIL
X
Data\ Polling
Dout (I/O7)
High-Z
VIL
X
VIH
X
VH
VIL
VOL
Program Reset
High-Z
NOTES: 1. RDY/Busy\ output has only active LOW VOL and high impedance state. It can not go to HIGH (VOH) state.
2. VCC -0.5 < VH < VCC +1.0
3. X : DON'T CARE
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
3
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS*
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This is
Voltage on Vcc Supply Relative to Vss
Vcc ....................................................................-0.6V to +7.0V a stress rating only and functional operation of the device at
Operating Temperature Range(1) ..................-55°C to +125°C
these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods
may affect reliability.
**Junction temperature depends upon package type, cycle time,
loading, ambient temperature and airflow, and humidity
(plastics).
Storage Temperature Range .........................-65°C to +150°C
Voltage on any Pin Relative to Vss..............-0.5V to +7.0V (2)
Max Junction Temperature**.......................................+150°C
Thermal Resistance junction to case (θJC):
Package Type Q...........................................11.3° C/W
Package Type P & PN..................................2.8° C/W
NOTES:
1) Including electrical characteristics and data retention.
2) VIN MIN = -3.0V for pulse width < 20ns.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC<T <125oC or -40oC to +85oC; Vcc = 5V + 10%)
A
PARAMETER
Input High Voltage
Input High Voltage (RES\)
CONDITIONS
SYMBOL
MIN
2.2
MAX
VCC +0.3
UNITS
VIH
V
V
VH
VIL
ILI
VCC -0.5
-0.31
VCC +1.0
Input Low Voltage
0.8
10 2
V
OV < VIN < VCC
µΑ
INPUT LEAKAGE CURRENT
-10
Outputs(s) Disabled,
OV < VOUT < VCC
ILO
µΑ
OUTPUT LEAKAGE CURRENT
Output High Voltage
-10
10
I
OH = -0.4mA
VOH
VOL
VCC
2.4
--
--
V
V
V
IOL = 2.1mA
Output Low Voltage
Supply Voltage
0.4
5.5
4.5
NOTE: 1) VIL (MIN): -1.0V for pulse width < 20ns.
2) ILI on RES\ : 500µA (MAX)
MAX
-15
PARAMETER
CONDITIONS
SYM
UNITS
Iout = 0mA, VCC = 5.5V
80
Cycle = 1µS, Duty = 100%
Power Supply Current:
Operating
mA
I
cc3
Iout = 0mA, VCC = 5.5V
260
Cycle = MIN, Duty = 100%
1.4
12
mA
mA
CE\ = VCC,
V
CC = 5.5V
ICC1
Power Supply Current:
Standby
CE\ = VIH, VCC = 5.5V
ICC2
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
4
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
CAPACITANCE TABLE1 (V = 0V, f = 1 MHz, T = 25oC)
A
IN
SYMBOL
PARAMETER
A0 - A16 Capacitance
MAX
40
UNITS
pF
CADD
COE
OE\, RES\, RDY Capacitance
WE\ and CE\ Capacitance
I/O 0- I/O 31 Capacitance
40
pF
CWE, CCE
CIO
12
pF
20
pF
NOTE: 1. This parameter is guaranteed but not tested.
AC TEST CHARACTERISTICS
TEST SPECIFICATIONS
I
OL
Input pulse levels...........................................VSS to 3V
Input rise and fall times...........................................5ns
Input timing reference levels.................................1.5V
Output reference levels.........................................1.5V
Output load................................................See Figure 1
Current Source
Device
-
+
Vz = 1.5V
(Bipolar
Supply)
Under
Test
+
Ceff = 50pf
NOTES:
I
Vz is programmable from -2V to + 7V.
IOL and IOH programmable from 0 to 16 mA.
Vz is typically the midpoint of VOH and VOL.
IOL and IOH are adjusted to simulate a typical resistive load
circuit.
Current Source
OH
Figure 1
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(-55oC < T < +125oC or -40oC to +85oC; Vcc = 5V +10%)
A
150
DESCRIPTION
TEST CONDITIONS
SYMBOL
MIN
MAX
UNITS
tACC
Address to Output Delay
CE\ to Output Delay
OE\ to Output Delay
150
ns
CE\ = OE\ = VIL, WE\ = VIH
OE\ = VIL, WE\ = VIH
tCE
tOE
tOH
tDF
150
75
ns
ns
ns
ns
ns
ns
OE\ = VIL, WE\ = VIH
10
0
Address to Output Hold
CE\ = OE\ = VIL, WE\ = VIH
OE\ = VIL, WE\ = VIH
CE\ or OE\ high to Output Float (1)
RES\ low to Output Float (1)
RES\ to Output Delay
0
50
tDFR
tRR
CE\ = OE\ = VIL, WE\ = VIH
CE\ = OE\ = VIL, WE\ = VIH
0
350
450
0
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
5
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC WRITE CHARACTERISTICS
(-55oC < T < +125oC; Vcc = 5V +10%)
A
SYMBOL
PARAMETER
MIN(2)
MAX
UNITS
Address Setup Time
Address Hold Time
0
ms
tAS
150
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
ms
ns
ns
µs
µs
tAH
tCS
CE\ to Write Setup Time (WE\ controlled)
CE\ Hold Time (WE\ controlled)
WE\ to Write Setup Time (CE\ controlled)
WE\ to Hold Time (CE\ controlled)
OE\ to Write Setup Time
OE\ to Hold Time
0
tCH
0
tWS
tWH
tOES
tOEH
tDS
0
0
0
Data Setup Time
100
10
250
250
300
0.55
100
Data Hold Time
tDH
WE\ Pulse Width (WE\ controlled)
CE\ Pulse Width (CE\ controlled)
Data Latch Time
tWP
tCW
tDL
Byte Load Cycle
30
tBLC
tBL
tWC
tDB
tDW
tRP
Byte Load Window
10 (3)
Write Cycle Time
Time to Device Busy
120
150 (4)
100
Write Start Time
Reset Protect Time
Reset High Time (5)
1
tRES
READ TIMING WAVEFORM
ADDRESS
CE\
tACC
tOH
tCE
OE\
tDF
tOE
VIH
WE\
HIGH-Z
DATA OUT VALID
Data Out
tRR
tDFR
RES\
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
6
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
BYTE WRITE TIMING WAVEFORM (WE\ CONTROLLED)
tWC
Address
tCH
tCS
tAH
CE\
tBL
tOEH
tAS
WE\
tWP
tOES
OE\
tDS
tDH
Din
tDW
tDB
RDY/Busy\
HIGH-Z
tRES
HIGH-Z
VOL
tRP
RES\
VCC
BYTE WRITE TIMING WAVEFORM (CE\ CONTROLLED)
Address
tWC
tWS
tAH
tBL
tCW
CE\
tAS
tWH
WE\
tOEH
tDH
tOES
OE\
tDS
Din
tDW
tDB
RDY/Busy\
HIGH-Z
tRES
HIGH-Z
VOL
tRP
RES\
VCC
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
7
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
PAGE WRITE TIMING WAVEFORM (WE\ CONTROLLED)
Address(6)
A0 to A16
tBL
tAH
tWP
tAS
WE\
CE\
tDL
tCH
tBLC
tCS
tWC
tOES
tOEH
tDH
OE\
tDS
HIGH-Z
HIGH-Z
tDW
Din
tDB
RDY/Busy\
tRP
RES\
VCC
tRES
PAGE WRITE TIMING WAVEFORM (CE\ CONTROLLED)
Address(6)
A0 to A16
tBL
tAH
tCW
tAS
CE\
tDL
tWH
tBLC
tWS
tWC
WE\
tOES
tOEH
tDH
OE\
tDS
HIGH-Z
HIGH-Z
tDW
Din
tDB
RDY/Busy\
tRP
RES\
VCC
tRES
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
8
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
DATA POLLING TIMING WAVEFORM
Address
CE\
An
An
(7)
tCE
WE\
OE\
tOES
tOEH
(7)
tOE
tDW
Din X
Dout X
Dout X
I\O7
tWC
NOTES:
1. tDF and tDFR are defined as the time at which the outputs achieve the open circuit conditions and are no longer driven.
2. Use this device in longer cycle than this value.
3. tWC must be longer than this value unless polling techniques or RDY/Busy\ are used. This device automatically com-
pletes the internal write operation within this value.
4. Next read or write operation can be initiated after tDW if polling techniques or RDY/Busy\ are used.
5. This parameter is sampled and not 100% tested.
6. A7 to A16 are page addresses and must be same within the page write operation.
7. See AC read characteristics.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
9
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
TOGGLE BIT
This device provides another function to determine the internal programming cycle. If the EEPROM is set to read mode
during the internal programming cycle, I/O6 will charge from "1" to "0" (toggling) for each read. When the internal pro-
gramming cycle is finished, toggling of I/O6 will stop and the device can be accessible for next read or program.
TOGGLE BIT WAVEFORM
4Next Mode
Address
3
tCE
CE\
WE\
3
tOE
OE\
tOES
tOEH
1
2
2
Dout
Dout
Dout
Din
I/O6
Dout
tDW
tWC
NOTES:
1) I/O6 beginning state is "1".
2) I/O6 ending state will vary.
3) See AC read characteristics.
4) Any locations can be used, but the address must be fixed.
SOFTWARE DATA PROTECTION TIMING WAVEFORM (In protection mode)
VCC
CE\
WE\
tBLC
tBLC
tBLC
tWC
Address
5555
AA
AAAA or
2AAA
55
5555
A0
Write Address*
Write Data
Data (each byte)
* During this write cycle, data is physically written to the address provided.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
10
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
SOFTWARE DATA PROTECTION TIMING WAVEFORM (In non-protection mode)
VCC
Normal
tWC
active mode
CE\
WE\
Address
5555
AA
AAAA 5555 5555 AAAA 5555
or
or
2AAA
2AAA
Data (each byte)
55
80
AA
55
20
FUNCTIONAL DESCRIPTION
Automatic Page Write
RDY/Busy\ Signal
Page-mode write feature allows 1 to 128 bytes of data to be RDY/Busy\ signal also allows status of the EEPROM to be
written into the EEPROM in a single write cycle. Following determined. The RDY/Busy\ signal has high impedance ex-
the initial byte cycle, an additional 1 to 128 bytes can be writ-
ten in the same manner. Each additional byte load cycle must
be started within 30µs from the preceding falling edge of WE\
or CE\. When CE\ or WE\ is kept high for 100µs after data
input, the EEPROM enters write mode automatically and the
input data are written into the EEPROM.
cept in write cycle and is lowered to VOL after the first write
signal. At the end of write cycle, the RDY/Busy\ signal changes
state to high impedance.
RES\ Signal
When RES\ is low, the EEPROM cannot be read or pro-
grammed. Therefore, data can be protected by keeping RES\
DATA\ Polling
low when VCC is switched. RES\ should be high during read
and programming because it doesn't provide a latch function.
See timing diagram below.
DATA\ polling allows the status of the EEPROM to be deter-
mined. If EEPROM is set to read mode during the write cycle,
an inversion of the last byte of data to be loaded outputs from
I/O's 7, 15, 23, and 31 to indicate that the EEPROM is per-
forming a write operation.
RES\ Signal Diagram
VCC
Read inhibit
Read inhibit
RES\
Program inhibit
Program inhibit
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
11
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
WE\, CE\ Pin Operation
has a noise cancellation function that cuts noise if its width is
20ns or less in program mode.
Be careful not to allow noise of a width more than
20ns on the control pins. See Diagram 1 below.
During a write cycle, address are latched by the falling edge
of WE\ or CE\, and data is latched by the rising edge of WE\
or CE\.
Write/Erase Endurance and Data Retention Time
The endurance is 104 cycles in case of the page programming
2. Data Protection at VCC On/Off
and 103 cycles in case of the byte programming (1% cumula-
tive failure rate). The data retention time is more than 10
years when a device is page-programmed less than 104 cycles.
When VCC is turned on or off, noise on the control
pins generated by external circuits (CPU, etc.) may act as a
trigger and turn the EEPROM to program mode by mistake.
To prevent this unintentional programming, the EEPROM must
be kept in an unprogrammable state while the CPR is in an
unstable state.
NOTE: The EEPROM should be kept in
unprogrammable state during VCC on/off by using CPU RE-
SET signal. See the timing diagram below.
RDY/Busy\ SIGNAL
RDY/Busy\ signal also allows status of the EEPROM to
be determined. The RDY/Busy\ signal has high impedance
except in write cycle and is lowered to VOL after the first write
signal. At the end of the write cycle, the RDY/Busy\ signal
changes state to high impedance. This allows many 58C1001
devices RDY/Busy\ signal lines to be wired-OR together.
PROGRAMMING/ERASE
DIAGRAM 1
The 58C1001 does NOT employ a BULK-erase function.
The memory cells can be programmed ‘0’ or ‘1’. A write cycle
performs the function of erase & write on every cycle with
the erase being transparent to the user. The internal erase data
state is considered to be ‘1’. To program the memory array
with background of ALL 0’s or All 1’s, the user would
program this data using the page mode write operation to
program all 1024 128-byte pages.
Data Protection
1. Data Protection against Noise on Control Pins (CE\,
OE\, WE\) During Operation
During readout or standby, noise on the control pins
may act as a trigger and turn the EEPROM to programming
mode by mistake. To prevent this phenomenon, this device
DATA PROTECTION AT V ON/OFF
CC
VCC
CPU
RESET
*Unprogrammable
*Unprogrammable
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
12
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
Data Protection Cont.
a. Protection by RES\
The unprogrammable state can be realized by the
To program data in the SDP enable mode, 3 bytes code must
be input before write data. This 4th cycle during write is
required to initiate the SDP and physically writes the address
and data. While in SDP the entire array is protected in which
writes can only occur if the exact SDP sequence is
re-executed or the unprotect sequence is executed.
The SDP is disabled by inputting the 6 bytes code in
Chart 2. Note that, if data is input in the SDP disable cycle,
data can not be written.
CPU's reset signal inputs directly to the EEPROM's RES pin.
RES should be kept VSS level during VCC on/off.
The EEPROM brakes off programming operation
when RES becomes low, programming operation doesn't fin-
ish correctly in case that RES falls low during programming
operation. RES should be kept high for 10ms after the last
data inputs. See the timing diagram below.
The software data protection is not enabled at the
shipment.
3. Software data protection
NOTE: These are some differences between ASI's
and other company's for enable/disable sequence of software
data protection. If these are any questions, please contact ASI.
To prevent unintentional programming, this device
has the software data protection (SDP) mode. The SDP is
enabled by inputting the 3 bytes code and write data in
Chart 1. SDP is not enabled if only the 3 bytes code is input.
PROTECTION BY RES\
VCC
RES\
Program inhibit
Program inhibit
WE\ or CE\
100µ min
1µ min
10 ms min
CHART 1
CHART 2
Address
5555
Data
(each Byte)
AA
Address
Data
(each Byte)
AA
5555
AAAA or 2AAA
5555
AAAA or 2AAA
5555
55
80
AA
55
20
55
A0
5555
Write Address
Write Data}
Normal data input
AAAA or 2AAA
5555
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
13
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case #703 (Package Designator Q)
4 x D2
4 x D1
DETAIL A
4 x D
R
A2
B
Pin 1
0o - 7o
b
L1
SEE DETAIL A
e
A1
A
D3
ASI PACKAGE SPECIFICATIONS
SYMBOL
MIN
MAX
A
A1
A2
b
0.123
0.118
0.000
0.013
0.200
0.186
0.020
0.017
B
D
0.010 REF
0.800 BSC
D1
D2
D3
e
0.870
0.980
0.936
0.890
1.000
0.956
0.050 BSC
R
L1
0.005
0.035
0.045
*All measurements are in inches.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
14
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case (Package Designator QB)
0.900
0.020
0.320
0.200
0.050
0.015
DETAIL A
0.008(+0.002)
0.035(+0.005)
0.015(+0.005)
*All measurements are in inches.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
15
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
ORDERING INFORMATION
EXAMPLE: AS8ER128K32Q-15/IT
Package
Type
Speed
ns
Device Number
Process
AS8ER128K32
AS8ER128K32
AS8ER128K32
Q
Q
Q
-150
-200
-250
/*
/*
/*
EXAMPLE: AS8ER128K32QB-250/XT
Package
Type
QB
Speed
ns
Device Number
Process
AS8ER128K32
AS8ER128K32
AS8ER128K32
-150
-200
-250
/*
/*
/*
QB
QB
*AVAILABLE PROCESSES
IT = Industrial Temperature Range
XT = Extended Temperature Range
883C = Full Military Processing
-40oC to +85oC
-55oC to +125oC
-55oC to +125oC
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
16
EEPROM
AS8ER128K32
Austin Semiconductor, Inc.
ASI TO DSCC PART NUMBER
CROSS REFERENCE*
Package Designator Q
ASI Part #
SMD Part
AS8ER128K32Q-250/883C
AS8ER128K32Q-200/883C
AS8ER128K32Q-150/883C
5962-9458507HMX
5962-9458508HMX
5962-9458509HMX
Package Designator QB
ASI Part #
SMD Part
AS8ER128K32QB-250/883C
AS8ER128K32QB-200/883C
AS8ER128K32QB-150/883C
5962-9458507HZC
5962-9458508HZC
5962-9458509HZC
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS8ER128K32
Rev. 4.5 2/03
17
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