AS8SF384K32 [AUSTIN]

128K x 16 SRAM & 512K x 16 FLASH SRAM / FLASH MEMORY ARRAY; 128K ×16的SRAM和512K ×16的FLASH SRAM /闪存阵列
AS8SF384K32
型号: AS8SF384K32
厂家: AUSTIN SEMICONDUCTOR    AUSTIN SEMICONDUCTOR
描述:

128K x 16 SRAM & 512K x 16 FLASH SRAM / FLASH MEMORY ARRAY
128K ×16的SRAM和512K ×16的FLASH SRAM /闪存阵列

闪存 静态存储器
文件: 总14页 (文件大小:187K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
128K x 16 SRAM &  
512K x 16 FLASH  
PIN ASSIGNMENT  
(Top View)  
SRAM / FLASH MEMORY ARRAY  
68 Lead CQFP (QT)  
FEATURES  
• Operation with single 5V supply  
• High speed: 35ns SRAM, 90ns FLASH  
• Built in decoupling caps and multiple ground pins for low  
noise  
• Organized as 128K x 16 SRAM and 512K x 16 FLASH  
• Low power CMOS  
FI/O  
SI/O  
FI/O0  
FI/O1  
FI/O2  
FI/O3  
FI/O4  
FI/O5  
FI/O67  
GND  
FI/O  
SI/O0  
SI/O1  
SI/O2  
SI/O3  
SI/O4  
SI/O5  
SI/O67  
GND  
SI/O  
• TTL Compatible Inputs and Outputs  
• Both blocks of memory are user configurable as 256K x 8  
FI/O89  
FI/O10  
FI/O11  
FI/O12  
FI/O13  
FI/O14  
FI/O15  
FLASH MEMORY FEATURES  
SI/O89  
SI/O10  
SI/O11  
SI/O12  
SI/O13  
SI/O14  
SI/O15  
Operation with single 5V (±10%)  
Eight equal sectors of 64K bytes  
Any combination of sectors can be concurrently  
erased  
Supports full chip erase  
Embedded erase and program algorithms  
20,000 program/erase cycles  
Hardware write protection  
OPTIONS  
MARKINGS  
PIN DESCRIPTION  
FUNCTION  
Operating Temperature Ranges  
PIN  
Military (-55oC to +125oC)  
Industrial (-40oC to +85oC)  
XT  
IT  
A 0-18  
Address Inputs  
SI/O 0-15  
SRAM Data Input / Outputs  
FI/O 0-15  
OE\  
FLASH Data Input / Outputs  
Output Enable  
Timing  
SRAM  
35ns  
FLASH  
90ns  
SWE\ 1-2  
SRAM Write Enables  
-35  
QT  
FWE\ 1-2  
SCS\ 1-2  
FCS\ 1-2  
VCC  
FLASH Write Enables  
SRAM Chip Selects  
FLASH Chip Selects  
Power Supply  
• Package  
Ceramic Quad Flatpack  
GND  
NC  
Ground  
No Connect  
GENERAL DESCRIPTION  
The Austin Semiconductor, Inc. AS8SF384K32 is a 2 MEG CMOS SRAM and 8 MEG CMOS FLASH Module organized as  
128K x 16 (SRAM) and 512K x 16 (FLASH). These devices achieve high speed access, low power consumption and high reliability by  
employing advanced CMOS memory technology.  
For more detailed information regarding the FLASH internal operations, programming, command definitions and functional  
descriptions, please see the AS8F512K32 data sheet located on our website at www.austinsemiconductor.com  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
1
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
FCS\2  
FEW\2  
M3  
M2  
FCS\1  
FWE\1  
FI/O 8 - FI/O 15  
FI/O 0 -FI/O 7  
SCS\2  
SWE\2  
M1  
/
A0-A16  
SI/O 8 - SI/O 15  
SCS\1  
SWE\1  
OE\  
M0  
A0 - A18  
/
SI/O 0 - SI/O 7  
A0-A16  
BLOCK DIAGRAM  
SRAM TRUTH TABLE  
MODE  
Read  
OE\  
SCS\  
SWE\  
I\0  
DOUT  
POWER  
L
L
H
Active  
DIN  
Write  
X
X
L
L
Active  
Standby  
H
X
High Z  
Standby  
FLASH TRUTH TABLE  
USER BUS OPERATIONS  
I/O  
OPERATION  
FCS\1-4  
OE\  
FWE\1-4  
A0  
X
A1  
X
A6  
X
A9  
Data Out  
High Z  
High Z  
Data In  
X
Read  
L
L
H
L
L
L
L
H
H
H
X
L
X
Output Disable  
X
X
X
X
X
Standby and Write Inhibit  
Write  
X
X
X
X
H
A0  
X
A1  
X
A6  
X
A9  
Sector Protect  
VID  
L
L
VID  
Data Out  
Data Out  
Data Out  
Verify Sector Protect  
Sector Unprotect  
Verify Sector Unprotect  
Erase Operations  
H
L
H
H
L
VID  
see note 2 see note 2  
H
H
H
see note 2  
VID  
L
L
L
H
H
H
H
H
see note 1 see note 1 see note 1 see note 1 see note 1 see note 1  
LEGEND:  
L = VIL, H = VIH, X = Don't Care, VID = 12V, See DC Charateristics for voltage levels  
NOTE:  
1. See Chip/Sector Erase Operation Timings and Alternate CE\ Controlled Write Operation Timings of AS8F512K32 data sheet.  
2. See Chart 1 (pg. 6) of AS8F512K32 data sheet.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
2
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
This is a stress rating only and functional operation on the  
device at these or any other conditions above those indicated  
in the operational sections of this specification is not implied.  
Exposure to absolute maximum rating conditions for extended  
periods may affect reliability.  
**Junction temperature depends upon package type, cycle time,  
loading, ambient temperature and airflow. See theApplication  
Information section at the end of this datasheet for more infor-  
mation.  
ABSOLUTE MAXIMUM RATINGS*  
Voltage of Vcc Supply Relative to Vss......................-.5V to +7V  
Storage Temperature............................................-65°C to +150°C  
Short Circuit Output Current(per I/O).................................20mA  
Voltage onAny Pin Relative to Vss....................-.5V to Vcc+1V  
Maximum JunctionTemperature**...................................+150°C  
*Stresses greater than those listed under “Absolute Maximum  
Ratings” may cause permanent damage to the device.  
PARAMETER  
Flash Data Retention  
10 years  
20,000  
Flash Endurance (write / erase cycles)  
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS  
(-55oC < TA < 125oC and -40oC to +85oC;Vcc = 5V +10%)  
SRAM  
PARAMETER  
CONDITION  
SYMBOL  
VIH  
MIN  
2.2  
-0.5  
-10  
-10  
2.4  
--  
MAX  
UNITS  
NOTES  
1
VCC +0.3  
Input High (Logic 1) Voltage  
Input Low (Logic 1) Voltage  
Input Leakage Current  
Output Leakage Current  
Output High Voltage  
Output Low Voltage  
Supply Voltage  
V
V
VIL  
0.8  
10  
10  
--  
1, 2  
OV < VIN < Vcc  
Output(s) disabled, OV < VOUT < Vcc  
OH = -4.0 mA, Vcc = 4.5  
IOL = 8.0 mA, Vcc = 4.5  
ILI  
P$  
P$  
V
ILO  
I
VOH  
VOL  
1
1
1
0.4  
5.5  
V
Vcc  
4.5  
V
SCS\<VIL; VCC = MAX  
f = MAX = 1/ tRC (MIN)  
Outputs Open, X16  
Power Supply  
Operating  
Current:  
Icc  
325  
20  
mA  
mA  
3
3
SCS\>VIH; VCC = MAX  
f = MAX = 1/ tRC (MIN)  
Outputs Open, X16  
Power Supply  
Current: Standby  
ISBT1  
1. All voltages referenced to VSS (GND).  
2. -2V for pulse width <20ns.  
3. ICC is dependent on output loading and cycle rates.  
The specified value applies with the outputs  
FLASH  
PARAMETER  
CONDITION  
CE\ = VIL, OE\ = VIH, Vcc = Vcc  
Max, f = 5MHz  
CE\ = VIL, OE\ = VIH, Vcc = Vcc  
Max, f = 5MHz  
SYMBOL  
MIN  
MAX UNITS NOTES  
ICC1  
Vcc Active Current  
--  
120  
140  
mA  
mA  
Vcc Active Current1, 2  
ICC2  
--  
--  
IOL = 8mA, Vcc = Vcc Min  
VOL  
VOH1  
VOH1  
VLKO  
Output Low Voltage  
Output High Voltage  
0.45  
--  
V
V
V
V
IOH = -2.5mA, Vcc = Vcc Min  
0.85 x Vcc  
VCC-0.4  
3.2  
IOH = -100m$ꢀꢁVCC = Vcc Min  
--  
Output High Voltage  
Low VCC Lock Out Voltage  
NOTES:  
1. Icc active while Embedded Program or Embedded EraseAlgorithm is in progress.  
2. Not 100% tested.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
3
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
CAPACITANCE (VIN = 0V, f = 1MHz, TA = 25oC)1  
SYMBOL  
PARAMETER  
A0 - A18 Capacitance  
MAX  
UNITS  
CADD  
COE  
50  
pF  
OE\ Capacitance  
50  
20  
20  
pF  
pF  
pF  
CWE, CCS  
CIO  
WE\ and CS\ Capacitance  
I/O 0- I/O 31 Capacitance  
NOTE:  
1. This parameter is sampled.  
AC TEST CONDITIONS  
Test Specifications  
Input pulse levels.........................................VSS to 3V  
Input rise and fall times.........................................5ns  
Input timing reference levels...............................1.5V  
Output reference levels........................................1.5V  
Output load..............................................See Figure 1  
I
OL  
Current Source  
Device  
Under  
Test  
-
+
Vz = 1.5V  
(Bipolar  
Supply)  
+
Ceff = 50pf  
I
Current Source  
OH  
NOTES:  
Figure 1  
Vz is programmable from -2V to + 7V.  
IOL and IOH programmable from 0 to 16 mA.  
Vz is typically the midpoint of VOH and VOL.  
IOL and IOH are adjusted to simulate a typical resistive load  
circuit.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
4
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS  
(NOTE 5) (-55oC<TA < 125oC and -40oC to +85oC;VCC = 5V +10%)  
SRAM AC  
-35  
DESCRIPTION  
SYMBOL  
UNITS  
MIN MAX  
READ CYCLE  
tRC  
tAA  
tACS  
tOH  
tAOE  
tLZCS  
tLZOE  
tHZCS  
tHZOE  
READ cycle time  
35  
35  
35  
2
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address access time  
Chip select access time  
Output hold from address change  
Output enable to output valid  
Chip select to output in low Z1  
Output enable to output in low Z1  
Chip disable to output in high Z1  
Output disable to output in high Z1  
20  
3
0
20  
20  
SRAM AC (SWE\ & SCS\ controlled)  
-35  
DESCRIPTION  
SYMBOL  
UNITS  
MIN MAX  
WRITE CYCLE  
tWC  
tCW  
tAW  
tAS  
tAH  
tDS  
tDH  
tWP1  
tLZWE  
tHZWE  
WRITE cycle time  
35  
25  
25  
0
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Chip select to end of write  
Address valid to end of write  
Address setup time  
Address hold from end of write  
Data valid to end of write  
Data hold time  
0
20  
0
WRITE pulse width  
Output active from end of write1  
Write enable to output in High-Z1  
1. This parameter is guaranteed but not tested.  
25  
2
20  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
5
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
SRAM READ CYCLE NO. 1  
t
RC  
A0-A16  
SI/O0-15  
t
AA  
t
OH  
PREVIOUS DATA VALID  
DATA VALID  
SRAM READ CYCLE NO. 2  
t
RC  
ADDRESS  
t
AA  
SCS\  
t
ACS  
t
t
HZCS  
LZCS  
SOE\  
t
t
HZOE  
AOE  
LZOE  
t
DATA VALID  
SI/O0-15  
HIGHIMPEDANCE  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
6
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
SRAM WRITE CYCLE NO. 1  
(Chip Select Controlled)  
t
WC  
A0-A16  
SCS\  
t
t
AW  
t
AH  
CW  
t
t
AS  
WP11  
SWE\  
t
LZWE  
t
t
t
HZWE  
DS  
DATA VALID  
DH  
SI/O0-15  
WRITE CYCLE NO. 2  
(Write Enable Controlled)  
t
WC  
A0-A16  
SCS\  
t
AW  
t
t
t
AS  
AH  
CW  
t
WP21  
SWE\  
t
t
DH  
DS  
DATA VALID  
SI/O0-15  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
7
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
FLASH ELECTRICAL CHARACTERISTICS AND RECOMMENDED  
AC OPERATING CONDITIONS (READ ONLY)  
(-55°C < TA < 125°C;VCC = 5V -5%/+10%)  
Parameter  
Symbol  
Speed Options  
JEDEC Std.  
-35  
Parameter Description  
Test Setup  
CE\=VIL,  
Units  
tAVAV  
tRC  
Read Cycle Time (Note 3)  
Min  
90  
ns  
OE\=VIL  
CE\=VIL,  
OE\=VIL  
tAVQV  
tELQV  
tGLQV  
tACC  
Address to Output Delay  
Max  
Max  
90  
90  
ns  
ns  
tCE  
tOE  
Chip Enable Low to Output Valid  
Output Enable to Output Delay  
Max  
Min  
35  
0
ns  
ns  
Read  
Output Enable Hold Time  
(Note 3)  
tOEH  
Toggle and  
Data\Polling  
Min  
10  
20  
ns  
ns  
Chip Enable High to Output High Z  
(Note 2, 3)  
tEHQZ  
tGHQZ  
tAXQX  
tHZ  
tDF  
tOH  
Max  
Output Enable to Output High Z  
(Note 2,3)  
20  
0
ns  
ns  
Output Hold Time from Addresses, CE\ or  
OE\, Whichever Occurs First  
Min  
NOTES:  
1. See Test Specification for test conditions.  
2. Output driver disable time.  
3. Guaranteed but not Tested.  
Read OperationTimings  
t
RC  
Addresses  
FCS\  
Addresses Stable  
t
ACC  
t
t
DF  
CE  
OE\  
t
OEH  
t
CE  
t
FWE\  
OH  
High-Z  
High-Z  
Outputs  
Output Valid  
OV  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
8
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS  
(-55°C < TA < 125°C;VCC = 5V +/- 10%) WRITE / ERASE / PROGRAM  
Erase and Program FWE\ Controlled  
Parameter  
Symbol  
Speed Options Units  
-90  
Parameter Description  
Write Cycle Time  
JEDEC  
Std.  
tAVAV  
tAVWL  
tWLAX  
tDVWH  
tWHDX  
tWC  
Min  
Min  
Min  
Min  
Min  
Min  
90  
0
ns  
ns  
ns  
ns  
ns  
ns  
tAS  
tAH  
Address Setup Time  
45  
45  
Address Hold Time  
tDS  
Data Setup Time  
tDH  
tOES  
Write Enable High to Input Transition  
0
0
Output Enable Setup Time  
Read Recover time Before Write  
(OE\ high to FWE\ low)  
tGHWL  
tGHWL  
Min  
ns  
0
0
tELWL  
tWHEH  
tCS  
tCH  
Min  
Min  
Min  
Min  
Min  
Max  
ns  
ns  
FSC\ Setup Time  
FSC\ Hold Time  
0
tWLWH  
tWHWL  
tWHWH1  
tWHWH2  
tWHWH3  
tVCHEL  
tWP  
45  
ns  
Write Pulse Width  
tWPH  
ns  
Write Pulse Width High  
Programming Operation  
Sector Erase Operation  
20  
300  
15  
tWHWH1  
tWHWH2  
tWHWH3  
us  
sec  
Chip Erase Operation  
VCC Setup Time  
Max  
Min  
120  
50  
sec  
us  
Chip Program Time  
Max  
11  
sec  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
9
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
Program OperationTimings  
t
t
AS  
WC  
555h  
Addresses  
PA  
PA  
PA  
t
AH  
FCS\  
OE\  
t
t
GHWL  
CH  
t
WHWH1  
t
WP  
FWE\  
t
t
t
WPH  
DH  
CS  
DS  
t
Status  
DOUT  
PD  
FI/O0 - FI/O15  
AOh  
t
VCS  
Vcc  
NOTE: PA= Program Address, PD= Program data, DOUT is the true data at the program address.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
10  
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
Chip/Sector Erase OperationTimings  
t
t
AS  
WC  
2AAh  
Addresses  
SA  
VA  
VA  
t
555h for Chip Erase  
AH  
FCS\  
OE\  
t
t
GHWL  
CH  
t
WHWH2  
t
WP  
FWE\  
t
t
t
WPH  
DH  
CS  
DS  
t
In  
30th  
Complete  
Progress  
FI/O0 - FI/O7  
55h  
or FI/O8 - FI/O15  
10 for Chip Erase  
t
VCS  
Vcc  
NOTE: SA= Sector Address. VA = Valid Address for reading status data.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
11  
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
Data Polling Timings (During Embedded Algorithms)  
t
RC  
VA  
ACC  
Addresses  
VA  
VA  
t
t
CE  
FCS\  
OE\  
t
CH  
t
OE  
t
t
OEH  
DF  
FWE\  
t
OH  
High-Z  
High-Z  
Complement  
Valid Data  
Valid Data  
True  
True  
Complement  
Status Data  
FI/O7 or FI/O15  
Status Data  
FI/O0 - FI/O6  
or FI/O8 - FI/O14  
NOTE: VA=Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array  
data read cycle.  
Toggle Bit Timings ( During Embedded Algorithms)  
t
RC  
Addresses  
VA  
VA  
VA  
VA  
ACC  
CE  
t
t
FCS\  
OE\  
t
CH  
t
OE  
t
t
OEH  
DF  
FWE\  
t
OH  
FI/O6 / FI/O2  
or FI/O14 / FI/O10  
Valid Status  
Valid Status  
Valid Status  
Valid Status  
(first read)  
NOTE: VA=Valid address; not required for FI/O6 or FI/O14. Illustration shows first two status cycles after command  
sequence, last status read cycle, and array data read cycle.  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
12  
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
MECHANICAL DEFINATIONS*  
Package Designator QT  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
13  
SRAM & FLASH  
Mixed Module  
Austin Semiconductor, Inc.  
AS8SF384K32  
ORDERING INFORMATION  
EXAMPLE's: AS8SF384K32QT-35/XT or AS8SF384K32QT-35/MIL  
Package  
Device Number  
Speed ns  
Process  
Type  
AS8SF384K32  
QT  
-35  
/*  
*AVAILABLE PROCESSES  
/IT= Industrial Temperature Range  
/XT = Extended Temperature Range  
/MIL = MIL-STD-883 para.1.2.2. NC  
-40oC to +85oC  
-55oC to +125oC  
-55oC to +125oC  
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.  
AS8SF384K32  
Rev. 1.2 06/05  
14  

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128K x 32 SRAM SRAM MEMORY ARRAY
AUSTIN

AS8SLC128K32P-20L/IT

128K x 32 SRAM SRAM MEMORY ARRAY
AUSTIN

AS8SLC128K32P-20L/XT

128K x 32 SRAM SRAM MEMORY ARRAY
AUSTIN

AS8SLC128K32P-20L/XT

SRAM Module, 128KX32, 20ns, CMOS, CPGA66, PGA-66
MICROSS