AS8SLC128K32Q-35L/IT [AUSTIN]
128K x 32 SRAM SRAM MEMORY ARRAY; 128K ×32的SRAM SRAM存储器阵列
| 型号： | AS8SLC128K32Q-35L/IT |
| 厂家： | 
AUSTIN SEMICONDUCTOR |
| 描述： | 128K x 32 SRAM SRAM MEMORY ARRAY |
| 文件： | 总10页 (文件大小：134K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SRAM
AS8SLC128K32
Austin Semiconductor, Inc.
128K x 32 SRAM
PIN ASSIGNMENT
SRAM MEMORY ARRAY
(Top View)
AVAILABLE AS MILITARY
SPECIFICATIONS
• MIL-STD-883
68 Lead CQFP (Q)
1 0
1 1
1 2
1 3
1 4
1 5
1 6
1 7
1 8
1 9
2 0
2 1
2 2
2 3
2 4
2 5
2 6
6 0
5 9
5 8
5 7
5 6
5 5
5 4
5 3
5 2
5 1
5 0
4 9
4 8
4 7
4 6
4 5
4 4
I/O 16
I/O 17
I/O 18
I/O 19
I/O 20
I/O 21
I/O 22
I/O 23
GND
I/O 24
I/O 25
I/O 26
I/O 27
I/O 28
I/O 29
I/O 30
I/O 31
I/O 0
I/O 1
I/O 2
I/O 3
FEATURES
•
Fast Access Times of 10 to 25ns
I/O 4
I/O 5
I/O 6
I/O 7
GND
I/O 8
I/O 9
I/O 10
I/O 11
I/O 12
I/O 13
I/O 14
I/O 15
• Overall Configuration: 128K x 32
•
•
4 Low Power CMOS 128K x 8 SRAMs in one MCM
+3.3V power supply
• Internal Decoupling Capacitors
• Low Operating Power, 1/2 Previous Generation
OPTIONS
MARKINGS
• Operating Temperature Ranges
Military (-55oC to +125oC)
Industrial (-40oC to +85oC)
XT
IT
66 Lead PGA (P)
• Timing
10ns (Contact Factory)
-10
-12
-15
-17
-20
-25
12ns
15ns
17ns
20ns
25ns
\
C
CS4\
CS2\
\
\
\
NC
\
• Package
Ceramic Quad Flatpack
Pin Grid Array
Q
P
NC
CS3\
CS1\
•
Low Power Data Retention Mode
L
GENERAL DESCRIPTION
The Austin Semiconductor, Inc. AS8SLC128K32 is a high speed,
4MB CMOS SRAM multichip module (MCM) designed for full
temperature range, 3.3V power supply, military, space, or high
reliability mass memory and fast cache applications.
FUNCTIONAL BLOCK DIAGRAM
The device input and output TTL compatible. Writing is
executed when the write enable (WE\) and chip enable (CS\) inputs are
low. Reading is accomplished when WE\ is high and CS\ and output
enable (OE\) are both low. Access time grades of 10ns, 12ns, 15ns,
17ns, 20ns and 25ns maximum are standard.
The products are designed for operation over the temperature
range of -55°C to +125°C and screened under the full military
environment.
For more products and information
please visit our web site at
www.austinsemiconductor.com
AS8SLC128K32
Rev. 0.6 06/05
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
1
SRAM
AS8SLC128K32
Austin Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS*
This is a stress rating only and functional operation on the
device at these or any other conditions above those indicated
in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
Voltage of Vcc Supply Relative to Vss...........-0.5V to +4.6V
StorageTemperature.....................................-65°C to +150°C
Short Circuit Output Current(per I/O)............................20mA
Voltage onAny Pin Relative to Vss............-.5V to Vcc+4.6V
Maximum JunctionTemperature**.............................+150°C
**Junction temperature depends upon package type, cycle time,
loading, ambient temperature and airflow. See theApplication
*Stresses greater than those listed under “Absolute Maximum Information section at the end of this datasheet for more
Ratings” may cause permanent damage to the device.
information.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC < TA < 125oC and -40oC to +85oC; Vcc = 3.3V ±0.3V)
DESCRIPTION
CONDITIONS
SYMBOL MIN
MAX UNITS NOTES
Input High (logic 1) Voltage
2.2
-0.3
-10
-10
V
V
1
1
VIH
VIL
ILI1
ILI2
V
CC+0.3
Input Low (logic 1) Voltage
Input Leakage CurrentADD,OE
Input Leakage CurrentWE,CE
0.8
10
µA
µA
0V<VIN<VCC
10
Output(s) Disabled
0V<VOUT<VCC
-10
2.4
10
µA
Output Leakage CurrentI/O
ILO
Output High Voltage
Output Low Voltage
V
V
1
1
I
OH=-4.0mA
VOH
VOL
0.5
IOL=8.0mA
MAX
-15
DESCRIPTION
CONDITIONS
CS\<VIL; VCC = MAX
SYMBOL -10
-12
-17
-20 UNITS NOTES
High Speed
Power Supply
Current: Operating
f = MAX = 1/ tRC (MIN)
Outputs Open, OE\ = VIH
280
240
220
180
160
mA 2, 3,13
ICC1
ICC3
ISBT1
Low Power (L)
240
---
210
---
200
---
180
---
160
---
CS\<VIL; VCC = MAX
f = 1 MHz, OE\ = VIH
Low Speed
Power Supply
Current: Operating
mA
mA
2
Low Power (L)
CS\>VIH; VCC = MAX
f = MAX = 1/ tRC (MIN)
Outputs Open, OE\=VIH
80
60
60
60
60
80
100
80
80
80
Power Supply
Current: Standby
3, 13
Low Power (L)
80
70
50
60
60
36
60
60
36
60
60
36
60
60
36
VIN = VCC - 0.2V, or VSS
+0.2V
ISBT2
CMOS Standby
mA
VCC=Max; f = 0Hz
Low Power (L)
AS8SLC128K32
Rev. 0.6 06/05
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
2
SRAM
AS8SLC128K32
Austin Semiconductor, Inc.
CAPACITANCE (VIN = 0V, f = 1MHz, TA = 25oC)*
SYMBOL
PARAMETER
A0 - A16 Capacitance
MAX
UNITS
CADD
COE
40
pF
OE\ Capacitance
40
12
15
pF
pF
pF
CWE, CCS
CIO
WEx\ and CSx\ Capacitance
I/O 0- I/O 31 Capacitance
NOTE:
*This parameter is sampled.
AC TEST CONDITIONS
TEST SPECIFICATIONS
Input pulse levels...........................................VSS to 3V
Input rise and fall times...........................................1ns/V
Input timing reference levels...............................1.5V
Output reference levels........................................1.5V
Output load..........................................See Figure 1, 2
3.3V
RL = 50Ω
319Ω
VL =1.5V
Q
ZO = 50Ω
30 pF
Q
5 pF
333Ω
FIGURE 1
FIGURE 2
AS8SLC128K32
Rev. 0.6 06/05
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
3
SRAM
AS8SLC128K32
Austin Semiconductor, Inc.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(NOTE 5) (-55oC<TA < 125oC and -40oC to +85oC; VCC = 3.3V ±0.3V)
-10
-12
-15
-17
-20
DESCRIPTION
READ CYCLE
SYMBOL
UNITS NOTES
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
tRC
tAA
tACS
tOH
tLZCS
tHZCS
tAOE
tLZOE
tHZOE
READ cycle time
10
12
15
17
20
ns
ns
ns
ns
Address access time
10
10
12
12
15
15
17
17
20
20
Chip select access time
Output hold from address change
Chip select to output in Low-Z
Chip select to output in High-Z
Output enable access time
Output enable to output in Low-Z
Output disable to output in High-Z
WRITE CYCLE
1
1
2
2
2
2
2
2
2
2
ns
ns
ns
ns
ns
4,6,7
4,6,7
5.5
5.5
6
6
7
7
7.5
7.5
8
8
0
0
0
0
0
0
0
0
0
4,6
4,6
5.5
6
7
7.5
8
tWC
tCW
WRITE cycle time
10
9
9
0
0
9
9
5
1
2
5
12
10
10
0
15
10
10
0
17
11
11
0
20
12
12
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip select to end of write
Address valid to end of write
Address setup time
tAW
tAS
tAH
Address hold from end of write
WRITE pulse width, CS\ controlled
WRITE pulse width, WE\ controlled
Data setup time
0
0
0
0
tWP1
tWP2
tDS
10
10
6
12
12
7
14
14
7.5
1
15
15
8
tDH
tLZWE
tHZWE
Data hold time
1
1
1
Write disable to output in Low-z
Write enable to output in High-Z
2
2
2
2
4,6,7
4,6,7
5
6
6.5
7
AS8SLC128K32
Rev. 0.6 06/05
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
4
SRAM
AS8SLC128K32
Austin Semiconductor, Inc.
LOW POWER CHARACTERISTICS (L Version Only)
DESCRIPTION
CONDITIONS
SYMBOL
MIN
MAX
UNITS
NOTES
VCC for Retention Data
VDR
2
V
All Inputs @ Vcc + 0.2V
or Vss + 0.2V,
V
CC = 2V
CC = 3V
ICCDR
ICCDR
24
32
mA
mA
Data Retention Current
V
CS\ = Vcc + 0.2V
Chip Deselect to Data
Retention Time
0
ns
4
t
CDR
Operation Recovery Time
20
ms
4, 11
t
R
LOW VCC DATA RETENTION WAVEFORM
DATA RETENTION MODE
VCC
4.5V
4.5V
VDR >2V
tCDR
t
R
VDR
CS\ 1-4
NOTES
1. All voltages referenced to VSS (GND).
2. Worst case address switching.
tHZCS, is less than tLZCS, and tHZWE is less than tLZWE
8. WE\ is HIGH for READ cycle.
.
3. ICC is dependent on output loading and cycle rates.
9. Device is continuously selected. Chip selects and output
enable are held in their active state.
1
10. Address valid prior to or coincident with latest
curring chip enable.
oc-
HZ.
unloaded, and f=
t
RC(MIN)
11. tRC= READ cycle time.
12. Chip enable (CS\) and write enable (WE\) can initiate and
terminate a WRITE cycle.
The specified value applies with the outputs
4. This parameter guaranteed but not tested.
5. Test conditions as specified with output loading as
shown in Fig. 1 & 2 unless otherwise noted.
13. ICC is for full 32 bit mode.
6. tHZCS, tHZOE and tHZWE are specified with CL= 5pF as in Fig.
2. Transition is measured +/- 200 mV typical from steady
state voltage, allowing for actual tester RC time constant.
7. At any given temperature and voltage condition,
AS8SLC128K32
Rev. 0.6 06/05
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
5
SRAM
AS8SLC128K32
Austin Semiconductor, Inc.
READ CYCLE NO. 1
t
RC
ADDRESS
t
AA
t
OH
PREVIOUS DATA VALID
NEW DATA VALID
DATA I/O
READ CYCLE NO. 2
t
RC
ADDRESS
t
AA
CS\
t
ACS
t
t
HZCS
LZCS
OE\
t
t
HZOE
AOE
LZOE
t
DATA VALID
DATAI/O
HIGHIMPEDANCE
AS8SLC128K32
Rev. 0.6 06/05
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
6
SRAM
AS8SLC128K32
Austin Semiconductor, Inc.
WRITE CYCLE NO. 1
(Chip Select Controlled)
t
WC
ADDRESS
t
AW
t
t
t
AS
AH
CW
CS\
t
WP21
WE\
t
t
DH
DS
DATA VALID
DATAI/O
WRITE CYCLE NO. 2
(Write Enable Controlled)
t
WC
ADDRESS
t
t
AW
t
AH
CW
CS\
t
t
AS
WP11
WE\
t
LZWE
t
DH
t
t
HZWE
DS
DATA VALID
DATAI/O
NOTES
1. All voltages referenced to VSS (GND).
AS8SLC128K32
Rev. 0.6 06/05
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
7
SRAM
AS8SLC128K32
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case (Package Designator Q)
D2
D1
DETAILA
D
R
1o - 7o
B
b
L1
e
SEE DETAIL A
A
A2
E3
SMD SPECIFICATIONS
SYMBOL
MIN
MAX
0.200
0.186
0.015
A
A1
A2
B
b
D
0.123
0.118
0.005
0.010 REF
0.800 BSC
0.013
0.017
D1
D2
E
0.870
0.980
0.936
0.890
1.000
0.956
e
R
0.050 BSC
0.010 TYP
L1
0.035
0.045
*All measurements are in inches.
AS8SLC128K32
Rev. 0.6 06/05
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
8
SRAM
AS8SLC128K32
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case (Package Designator P)
4 x D
A
D1
D2
A1
Pin 56
Pin 1
(identified by
0.060 square pad)
φb1
E1
e
φb
Pin 66
e
φb2
Pin 11
L
SMD SPECIFICATIONS
SYMBOL
MIN
MAX
A
A1
φb
φb1
φb2
D
0.135
0.025
0.016
0.045
0.065
1.064
0.195
0.035
0.020
0.055
0.075
1.086
D1/E1
D2
e
1.000 BSC
0.600 BSC
0.100 BSC
L
0.145
0.155
*All measurements are in inches.
AS8SLC128K32
Rev. 0.6 06/05
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
9
SRAM
AS8SLC128K32
Austin Semiconductor, Inc.
ORDERING INFORMATION
EXAMPLE: AS8SLC128K32Q-20/883C
Package
Type
Q
Speed
ns
-20
-25
-35
Device Number
Options Process
AS8SLC128K32
AS8SLC128K32
AS8SLC128K32
AS8SLC128K32
AS8SLC128K32
L
L
L
L
L
/*
Q
Q
Q
Q
/*
/*
/*
/*
-45
-55
EXAMPLE: AS8SLC128K32P-35L/IT
Package
Type
Speed
Device Number
Options Process
ns
-20
-25
-35
-45
-55
AS8SLC128K32
AS8SLC128K32
AS8SLC128K32
AS8SLC128K32
AS8SLC128K32
P
P
P
P
P
L
L
L
L
L
/*
/*
/*
/*
/*
*AVAILABLE PROCESSES
XT= Military Temperature Rang
IT = IndustrialTemperature Range
883C = Full Military Processing
-55oC to +125oC
-40oC to +85oC
-55oC to +125oC
OPTION DEFINITIONS
L = 2V data retention/low power
AS8SLC128K32
Rev. 0.6 06/05
AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice.
10
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