MT5C6405C-25L/883C [AUSTIN]
16K x 4 SRAM SRAM MEMORY ARRAY; 16K ×4的SRAM SRAM存储器阵列
| 型号： | MT5C6405C-25L/883C |
| 厂家： | 
AUSTIN SEMICONDUCTOR |
| 描述： | 16K x 4 SRAM SRAM MEMORY ARRAY |
| 文件： | 总11页 (文件大小：77K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SRAM
MT5C6405
Austin Semiconductor, Inc.
PIN ASSIGNMENT
16K x 4 SRAM
SRAM MEMORY ARRAY
(Top View)
24-Pin DIP (C)
(300 MIL)
AVAILABLE AS MILITARY
SPECIFICATIONS
•
SMD 5962-86859
A5
A6
1
2
3
4
5
6
7
8
9
24
23
22
21
20
19
18
17
16
15
14
13
Vcc
A4
• MIL-STD-883
A7
A3
A8
A2
A9
A1
A10
A11
A12
A13
CE\ 10
OE\ 11
Vss 12
A0
FEATURES
NC
DQ4
DQ3
DQ2
DQ1
WE\
• High Speed: 12, 15, 20, 25, 35, 45, 55, and 70ns
• Battery Backup: 2V data retention
• High-performance, low-power CMOS double-metal
process
• Single +5V (+10%) Power Supply
• Easy memory expansion with CE\
• All inputs and outputs are TTL compatible
28-Pin LCC (EC)
3
2 1 28 27
OPTIONS
• Timing
MARKING
26
25
24
23
22
21
20
19
18
NC
A4
A3
A2
A1
A0
DQ4
DQ3
DQ2
A6
A7
A8
4
5
6
7
8
A9
12ns access
15ns access
20ns access
25ns access
35ns access
45ns access
55ns access
70ns access
-12
-15
-20
-25
-35
-45*
-55*
-70*
A10
A11
A12
A13
CE\
9
10
11
12
13 14 15 16 17
• Package(s)
Ceramic DIP (300 mil)
Ceramic LCC
GENERAL DESCRIPTION
C
E C
No. 106
No. 204
The Austin Semiconductor SRAM family employs
high-speed, low-power CMOS designs using a four-transistor
memory cell. Austin Semiconductor SRAMs are fabricated
using double-layer metal, double-layer polysilicon
technology.
• OperatingTemperature Ranges
Industrial (-40oC to +85oC)
Military (-55oC to +125oC)
IT
XT
For flexibility in high-speed memory applications, Austin
Semiconductor offers chip enable (CE\) and output enable
(OE\) capability. These enhancements can place the outputs
in High-Z for additional flexibility in system design.
Writing to these devices is accomplished when write
enable (WE\) and CE\ inputs are both LOW. Reading is
accomplished when WE\ remains HIGH and CE\ and OE\ go
LOW. The device offers a reduced power standby mode when
disabled. This allows system designs to achieve low standby
power requirements.
• 2V data retention/low power
L
*Electrical characteristics identical to those provided for the 35ns
access devices.
For more products and information
please visit our web site at
www.austinsemiconductor.com
All devices operate from a single +5V power supply and
all inputs and outputs are fully TTL compatible.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
MT5C6405
Rev. 2.1 06/05
1
SRAM
MT5C6405
Austin Semiconductor, Inc.
FUNCTIONAL BLOCK DIAGRAM
VCC
GND
D
Q
A
A
A
A
A
A
A
A
A
1,048,576-BIT
MEMORY ARRAY
CE\
(LSB)
WE\
OE\
POWER
DOWN
COLUMN DECODER
(LSB)
A A A A A A A A A A
TRUTHTABLE
MODE
STANDBY
READ
READ
WRITE
OE\
X
L
H
X
CE\
H
L
L
L
WE\
X
H
H
L
DQ
HIGH-Z
Q
HIGH-Z
D
POWER
STANDBY
ACTIVE
ACTIVE
ACTIVE
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
MT5C6405
Rev. 2.1 06/05
2
SRAM
MT5C6405
Austin Semiconductor, Inc.
*Stresses greater than those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure
to absolute maximum rating conditions for extended periods
may affect reliability.
ABSOLUTEMAXIMUMRATINGS*
Voltage on any Input or DQ Relative to Vss....-0.5V to +7.0V1
Storage Temperature…...................................-65oC to +150oC
Power Dissipation.................................................................1W
Max Junction Temperature..................................................+175°C
Lead Temperature (soldering 10 seconds)........................+260oC
Short Circuit Output Current...........................................20mA
1 All voltage referenced to Vss.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC < TC < 125oC; VCC = 5V +10%)
DESCRIPTION
CONDITIONS
SYM
MIN
MAX
UNITS NOTES
Input High (Logic 1) Voltage
2.2
Vcc+0.5V
V
V
1
VIH
Input Low (Logic 0) Voltage
Input Leakage Current
-0.5
-10
0.8
10
1, 2
VIL
ILI
µA
0V < VIN < VCC
Outputs Disabled
0V < VOUT < VCC
Output Leakage Current
-10
2.4
10
µA
ILO
Output High Voltage
Output Low Voltage
V
V
1
1
I
OH = -4.0mA
OL = 8.0mA
VOH
VOL
0.4
I
MAX
PARAMETER
CONDITIONS
SYM
-12
-15
-20
-25
-35 UNITS NOTES
CE\ < VIL; VCC = MAX
Output Open
Power Supply
Current: Operating
140
50
125
45
110
100
90
30
25
mA
mA
mA
3
I
cc
CE\ > VIH; VCC = MAX
f = 0 Hz
Power Supply
Current: Standby
ISBT1
40
25
35
25
CE\ > (VCC -0.2); VCC = MAX
All Other Inputs < 0.2V
ISBC2
25
25
or > (VCC - 0.2V), f = 0 Hz
CAPACITANCE
DESCRIPTION
CONDITIONS
SYM
MAX UNITS NOTES
TA = 25oC, f = 1MHz
Vcc = 5V
Input Capacitance
CI
8
pF
pF
4
4
Output Capacitance
CO
10
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
MT5C6405
Rev. 2.1 06/05
3
SRAM
MT5C6405
Austin Semiconductor, Inc.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(Note 5) (-55oC < TC < 125oC;VCC = 5V +10%)
-12
-15
-20
-25
-35
DESCRIPTION
READ CYCLE
MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX
SYMBOL
UNITS NOTES
tRC
tAA
tACE
tOH
READ cycle time
12
15
20
25
35
ns
ns
ns
ns
Address access time
12
12
15
15
20
20
25
25
35
35
Chip Enable access time
Output hold from address change
2
2
2
2
2
2
2
2
2
2
tLZCE
tHZCE
tPU
ns
ns
ns
ns
ns
ns
ns
7
Chip Enable to output in Low-Z
Chip disable to output in High-Z
Chip Enable to power-up time
Chip disable to power-down time
Output Enable access time
Output Enable to output in Low-Z
Output disable to output in High-Z
WRITE CYCLE
7
8
10
12
15
6, 7
0
0
0
0
0
0
0
0
0
8
tPD
12
6
15
7
20
8
25
10
35
15
tAOE
tLZOE
tHZOE
6
7
8
10
15
6
tWC
tCW
tAW
WRITE cycle time
12
10
10
0
15
12
12
0
20
15
15
0
25
20
20
0
35
25
25
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Chip Enable to end of write
Address valid to end of write
Address setup time
tAS
tAH
Address hold from end of write
WRITE pulse width
0
0
0
0
0
tWP
10
7
12
8
15
10
0
20
12
0
25
15
0
tDS
Data setup time
tDH
Data hold time
0
0
tLZWE
tHZWE
Write disable to output in Low-Z
Write Enable to output in High-Z
2
2
2
2
2
7
0
6
0
7
0
8
0
10
0
15
6, 7
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
MT5C6405
Rev. 2.1 06/05
4
SRAM
MT5C6405
Austin Semiconductor, Inc.
+5V
+5V
480
ACTEST CONDITIONS
480
Input pulse levels ...................................... Vss to 3.0V
Input rise and fall times ......................................... 5ns
Input timing reference levels ................................ 1.5V
Output reference levels ....................................... 1.5V
Output load ................................. See Figures 1 and 2
Q
Q
30pF
255
5 pF
255
Fig. 1 Output Load
Equivalent
Fig. 2 Output Load
Equivalent
7. At any given temperature and voltage condition,
tHZCE is less than tLZCE, and tHZWE is less than tLZWE
8. WE\ is HIGH for READ cycle.
NOTES
.
1. All voltages referenced to VSS (GND).
2. -3V for pulse width < 20ns
9. Device is continuously selected. Chip enables and
output enables are held in their active state.
10. Address valid prior to, or coincident with, latest
occurring chip enable.
11. RC = Read Cycle Time.
12. CE2 timing is the same as CE1\ timing. The waveform
is inverted.
3. ICC is dependent on output loading and cycle rates.
The specified value applies with the outputs
unloaded, and f =
1
Hz.
tRC (MIN)
t
4. This parameter is guaranteed but not tested.
5. Test conditions as specified with the output loading
as shown in Fig. 1 unless otherwise noted.
6. tHZCE, tHZOE and tHZWE are specified with CL = 5pF as
in Fig. 2. Transition is measured ±200mV typical from
steady state voltage, allowing for actual tester RC time
constant.
DATA RETENTION ELECTRICAL CHARACTERISTICS (L Version Only)
DESCRIPTION
CONDITIONS
SYM
MIN
MAX UNITS NOTES
2
---
V
VCC for Retention Data
VDR
CE\ > (VCC - 0.2V)
Data Retention Current
1
mA
VCC = 2V ICCDR
VIN > (VCC - 0.2V)
or < 0.2V
Chip Deselect to Data
Retention Time
tCDR
tR
0
---
ns
ns
4
Operation Recovery Time
4, 11
tRC
LOWVcc DATA RETENTIONWAVEFORM
DATA RETENTION MODE
VCC
4.5V
4.5V
VDR > 2V
tCDR
tR
VIH
VIL
VDR
CE\
DON’T CARE
UNDEFINED
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
MT5C6405
Rev. 2.1 06/05
5
SRAM
MT5C6405
Austin Semiconductor, Inc.
READ CYCLE NO. 1 8, 9
t
RC
VALID
ADDRESS
Q
t
AA
tOH
PREVIOUS DATA VALID
DATA VALID
READ CYCLE NO. 2 7, 8, 10
tR
C
CE\
OE\
tA
OE
tHZOE
tLZOE
tLZCE
tHZCE
t
E
ACE
HIGH-Z
DATA VALID
DQ
Icc
t
PU
tP
D
DON’T CARE
UNDEFINED
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
MT5C6405
Rev. 2.1 06/05
6
SRAM
MT5C6405
Austin Semiconductor, Inc.
WRITE CYCLE NO. 1 12
(Chip Enabled Controlled)
tWC
ADDRESS
tA
W
tAH
tAS
tCW
CE\
tW
P
WE\
tDH
t
DS
DQ
DATA VAILD
HIGH-Z
Q
7, 12, 13
WRITE CYCLE NO. 2
(Write Enabled Controlled)
tW
C
ADDRESS
tAW
tAW
tAH
tCW
CE\
tAS
t
WP
WE\
tDS
tDH
tDH
DQ
DATA VALID
HIGH-Z
Q
DON’T CARE
UNDEFINED
NOTE: Output enable (OE\) is inactive (HIGH).
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
MT5C6405
Rev. 2.1 06/05
7
SRAM
MT5C6405
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case #106 (Package Designator C)
SMD 5962-86859, Case Outline L
D
A
Q
L
E
e
b
S1
b2
eA
c
SMD SPECIFICATIONS
MIN
SYMBOL
MAX
0.200
0.026
0.065
0.018
1.280
0.310
A
b
b2
c
D
E
---
0.014
0.045
0.008
---
0.220
eA
e
0.300 BSC
0.100 BSC
L
Q
S1
0.125
0.015
0.005
0.200
0.060
---
NOTE: These dimensions are per the SMD. ASI's package dimensional limits may
differ, but they will be within the SMD limits.
* All measurements are in inches.
MT5C6405
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
Rev. 2.1 06/05
8
SRAM
MT5C6405
Austin Semiconductor, Inc.
MECHANICAL DEFINITIONS*
ASI Case #204 (Package Designator EC)
SMD 5962-86859, Case Outline U
D1
B2
D2
L2
e
E3
E
E1
E2
h x 45o
D
L
hx45o
B1
D3
A
A1
SMD SPECIFICATIONS
SYMBOL
MIN
MAX
0.075
0.065
0.028
A
A1
B1
B2
D
0.060
0.050
0.022
0.072 REF
0.342
0.358
D1
D2
D3
E
0.200 BSC
0.100 BSC
---
0.540
0.358
0.560
E1
E2
E3
e
0.400 BSC
0.200 BSC
---
0.558
0.050 BSC
0.040 REF
h
L
L2
0.045
0.075
0.055
0.095
NOTE: These dimensions are per the SMD. ASI's package dimensional limits may
differ, but they will be within the SMD limits.
* All measurements are in inches.
MT5C6405
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
Rev. 2.1 06/05
9
SRAM
MT5C6405
Austin Semiconductor, Inc.
ORDERING INFORMATION
EXAMPLE: MT5C6405C-25L/XT
EXAMPLE: MT5C6405EC-15L/IT
Package Speed
Package Speed
Device Number
Device Number
Options** Process
Options** Process
Type
ns
-12
-15
-20
-25
-35
-45
-55
-70
Type
EC
EC
EC
EC
EC
EC
EC
EC
ns
-12
-15
-20
-25
-35
-45
-55
-70
MT5C6405
MT5C6405
MT5C6405
MT5C6405
MT5C6405
MT5C6405
MT5C6405
MT5C6405
C
L
L
L
L
L
L
L
L
/*
/*
/*
/*
/*
/*
/*
/*
MT5C6405
MT5C6405
MT5C6405
MT5C6405
MT5C6405
MT5C6405
MT5C6405
MT5C6405
L
L
L
L
L
L
L
L
/*
/*
/*
/*
/*
/*
/*
/*
C
C
C
C
C
C
C
*AVAILABLE PROCESSES
IT= Industrial Temperature Range
XT = Extended Temperature Range
883C = Full Military Processing
-40oC to +85oC
-55oC to +125oC
-55oC to +125oC
** OPTIONS
L = 2V Data Retention/Low Power
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
MT5C6405
Rev. 2.1 06/05
10
SRAM
MT5C6405
Austin Semiconductor, Inc.
ASI TO DSCC PART NUMBER
CROSS REFERENCE*
ASI Package Designator EC
ASI Package Designator C
ASI Part #
SMD Part #
ASI Part #
SMD Part #
MT5C6805C-35/883C
MT5C6805C-35L/883C
MT5C6805C-45/883C
MT5C6805C-45L/883C
MT5C6805C-55/883C
MT5C6805C-55L/883C
MT5C6805C-70/883C
MT5C6805C-70L/883C
5962-8685918LA
5962-8685917LA
5962-8685916LA
5962-8685915LA
5962-8685914LA
5962-8685913LA
5962-8685912LA
5962-8685911LA
MT5C6805EC-35/883C
MT5C6805EC-35L/883C
MT5C6805EC-45/883C
MT5C6805EC-45L/883C
MT5C6805EC-55/883C
MT5C6805EC-55L/883C
MT5C6805EC-70/883C
MT5C6805EC-70L/883C
5962-8685918UA
5962-8685917UA
5962-8685916UA
5962-8685915UA
5962-8685914UA
5962-8685913UA
5962-8685912UA
5962-8685911UA
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
MT5C6405
Rev. 2.1 06/05
11
相关型号：
©2020 ICPDF网 联系我们和版权申明