6N135E [AVAGO]
1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 1Mbps, 0.300 INCH, LEAD FREE, DIP-8;型号: | 6N135E |
厂家: | AVAGO TECHNOLOGIES LIMITED |
描述: | 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 1Mbps, 0.300 INCH, LEAD FREE, DIP-8 输出元件 光电 |
文件: | 总16页 (文件大小:257K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Single Channel, High Speed
Optocouplers
6N135/6
Technical Data
HCNW135/6
HCNW4502/3
HCPL-2502
HCPL-0452/3
HCPL-0500/1
HCPL-4502/3
Features
Applications
• High Voltage Insulation
• Video Signal Isolation
• Power Transistor Isolation
in Motor Drives
• Line Receivers
• Feedback Element in
Switched Mode Power
Supplies
• High Speed Logic Ground
Isolation – TTL/TTL, TTL/
CMOS, TTL/LSTTL
• Replaces Pulse Transformers
• Replaces Slow
Phototransistor Isolators
• Analog Signal Ground
Isolation
Description
These diode-transistor optocoup-
lers use an insulating layer
between a LED and an integrated
photodetector to provide elec-
trical insulation between input
and output. Separate connections
for the photodiode bias and
output-transistor collector
increase the speed up to a
hundred times that of a conven-
tional phototransistor coupler by
reducing the base-collector
capacitance.
• 15 kV/µs Minimum Common
Mode Transient Immunity at
VCM = 1500 V (4503/0453)
• High Speed: 1 Mb/s
• TTL Compatible
• Available in 8-Pin DIP, SO-8,
Widebody Packages
• Open Collector Output
• Guaranteed Performance
from Temperature: 0°C
to 70°C
• Safety Approval
UL Recognized – 2500 V rms
for 1 minute (5000 V rms for
1 minute for HCNW and
Option 020 devices) per
UL1577
CSA Approved
Functional Diagram
VDE 0884 Approved
–VIORM = 630 V peak for
HCPL-4503#060
–VIORM = 1414 V peak for
HCNW devices
• Dual Channel Version
Available (253X/4534/053X/
0534)
8
7
6
5
NC
ANODE
CATHODE
NC
1
2
3
4
V
CC
B
TRUTH TABLE
(POSITIVE LOGIC)
*
V
LED
V
O
ON
OFF
LOW
HIGH
V
O
GND
• MIL-STD-1772 Version
Available (55XX/65XX/4N55)
* NOTE: FOR 4502/3, 0452/3,
PIN 7 IS NOT CONNECTED.
A 0.1 µF bypass capacitor must be connected between pins 5 and 8.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
2
I
These single channel optocoup-
lers are available in 8-Pin DIP,
SO-8 and Widebody package
configurations.
output current for 1 TTL load and Schematic
a 5.6 kΩ pull-up resistor. CTR for
CC
8
V
CC
these devices is 19% minimum at
I
F
2
+
IF = 16 mA.
ANODE
V
The 6N135, HCPL-0500, and
HCNW135 are for use in TTL/
CMOS, TTL/LSTTL or wide
bandwidth analog applications.
Current transfer ratio (CTR) for
these devices is 7% minimum at
IF = 16 mA.
The HCPL-4502, HCPL-0452,
and HCNW4502 provide the
electrical and switching
performance of the 6N136,
HCPL-0501, and HCNW136 with
increased ESD protection.
F
I
O
6
5
–
3
V
O
CATHODE
SHIELD
GND
HCPL-4503/0453
HCNW4503
I
B
7
V
*
B
The HCPL-4503, HCPL-0453,
and HCNW4503 are similar to the
HCPL-4502, HCPL-0452, and
HCNW4502 optocouplers but
have increased common mode
transient immunity of 15 kV/µs
minimum at VCM = 1500 V
guaranteed.
* NOTE: FOR HCPL-4502/-3, HCPL-0452/3,
HCNW4502/3, PIN 7 IS NOT CONNECTED.
The 6N136, HCPL-2502,
HCPL-0501, and HCNW136 are
designed for high speed TTL/TTL
applications. A standard 16 mA
TTL sink current through the
input LED will provide enough
Selection Guide
Widebody
Minimum CMR
8-Pin DIP (300 Mil)
Small-Outline SO-8
(400 Mil)
Hermetic
Current
Transfer
Ratio (%)
Single
Channel
Package
Dual
Channel
Package*
Single
Channel
Package
Dual
Channel
Package*
Single
Channel
Package
Single and
Dual Channel
Packages*
dV/dt
(V/µs)
V
(V)
CM
1,000
10
7
19
6N135
6N136
HCPL-4502†
HCPL-2502
HCPL-2530
HCPL-2531
HCPL-0500
HCPL-0501
HCPL-0452†
HCPL-0530
HCPL-0531
HCNW135
HCNW136
HCNW4502†
15
19
9
15,000 1500
1,000 10
HCPL-4503† HCPL-4534 HCPL-0453† HCPL-0534 HCNW4503†
HCPL-55XX
HCPL-65XX
4N55
*Technical data for these products are on separate Agilent publications.
†Pin 7, transistor base, is not connected.
Ordering Information
Specify Part Number followed by Option Number (if desired).
Example:
HCPL-4503#XXX
020 = UL 5000 V rms/1 Minute Option*
060 = VDE 0884 VIORM = 630 V peak Option**
300 = Gull Wing Surface Mount Option†
500 = Tape and Reel Packaging Option
Option data sheets available. Contact your Agilent sales representative or authorized distributor for
information.
*For 6N135/6 and HCPL-4502/3 only.
**For HCPL-4503 only. Combination of Option 020 and Option 060 is not available.
†Gull wing surface mount option applies to through hole parts only.
3
Package Outline Drawings
8-Pin DIP Package (6N135/6, HCPL-4502/3, HCPL-2502)
7.62 ± 0.25
(0.300 ± 0.010)
9.65 ± 0.25
(0.380 ± 0.010)
8
1
7
6
5
6.35 ± 0.25
(0.250 ± 0.010)
TYPE NUMBER
OPTION CODE*
DATE CODE
A XXXXZ
YYWW
U R
UL
2
3
4
RECOGNITION
1.78 (0.070) MAX.
1.19 (0.047) MAX.
+ 0.076
- 0.051
0.254
5° TYP.
+ 0.003)
- 0.002)
(0.010
4.70 (0.185) MAX.
0.51 (0.020) MIN.
2.92 (0.115) MIN.
DIMENSIONS IN MILLIMETERS AND (INCHES).
* MARKING CODE LETTER FOR OPTION NUMBERS.
"L" = OPTION 020
"V" = OPTION 060
1.080 ± 0.320
(0.043 ± 0.013)
0.65 (0.025) MAX.
2.54 ± 0.25
(0.100 ± 0.010)
OPTION NUMBERS 300 AND 500 NOT MARKED.
8-Pin DIP Package with Gull Wing Surface Mount Option 300 (6N135/6, HCPL-4502/3)
PAD LOCATION (FOR REFERENCE ONLY)
9.65 ± 0.25
(0.380 ± 0.010)
1.016 (0.040)
1.194 (0.047)
6
5
8
1
7
4.826
(0.190)
TYP.
6.350 ± 0.25
(0.250 ± 0.010)
9.398 (0.370)
9.906 (0.390)
2
3
4
0.381 (0.015)
0.635 (0.025)
1.194 (0.047)
1.778 (0.070)
9.65 ± 0.25
(0.380 ± 0.010)
1.780
(0.070)
MAX.
1.19
(0.047)
MAX.
7.62 ± 0.25
(0.300 ± 0.010)
+ 0.076
- 0.051
0.254
4.19
+ 0.003)
- 0.002)
MAX.
(0.165)
(0.010
1.080 ± 0.320
(0.043 ± 0.013)
0.635 ± 0.25
(0.025 ± 0.010)
12° NOM.
0.635 ± 0.130
(0.025 ± 0.005)
2.54
(0.100)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
4
Small Outline SO-8 Package (HCPL-0500/1, HCPL-0452/3)
8
7
6
5
5.994 ± 0.203
(0.236 ± 0.008)
XXX
3.937 ± 0.127
(0.155 ± 0.005)
YWW
TYPE NUMBER
(LAST 3 DIGITS)
DATE CODE
1
2
3
4
PIN ONE
0.406 ± 0.076
(0.016 ± 0.003)
1.270
(0.050)
BSG
0.432
(0.017)
*
7°
5.080 ± 0.127
(0.200 ± 0.005)
45° X
3.175 ± 0.127
(0.125 ± 0.005)
0 ~ 7°
0.228 ± 0.025
(0.009 ± 0.001)
1.524
(0.060)
0.203 ± 0.102
(0.008 ± 0.004)
TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)
5.207 ± 0.254 (0.205 ± 0.010)
*
0.305
(0.012)
MIN.
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.
8-Pin Widebody DIP Package (HCNW135/6, HCNW4502/3)
11.00
(0.433)
11.15 ± 0.15
(0.442 ± 0.006)
MAX.
9.00 ± 0.15
(0.354 ± 0.006)
7
6
5
8
TYPE NUMBER
DATE CODE
A
HCNWXXXX
YYWW
1
3
2
4
10.16 (0.400)
TYP.
1.55
(0.061)
MAX.
7° TYP.
+ 0.076
- 0.0051
0.254
+ 0.003)
- 0.002)
(0.010
5.10
(0.201)
MAX.
3.10 (0.122)
3.90 (0.154)
0.51 (0.021) MIN.
2.54 (0.100)
TYP.
1.78 ± 0.15
(0.070 ± 0.006)
0.40 (0.016)
0.56 (0.022)
DIMENSIONS IN MILLIMETERS (INCHES).
5
8-Pin Widebody DIP Package with Gull Wing Surface Mount Option 300 (HCNW135/6,
HCNW4502/3)
11.15 ± 0.15
(0.442 ± 0.006)
PAD LOCATION (FOR REFERENCE ONLY)
7
6
5
8
6.15
TYP.
(0.242)
9.00 ± 0.15
(0.354 ± 0.006)
12.30 ± 0.30
(0.484 ± 0.012)
1
3
2
4
0.9
(0.035)
1.3
(0.051)
12.30 ± 0.30
(0.484 ± 0.012)
1.55
(0.061)
MAX.
11.00
MAX.
(0.433)
4.00
MAX.
(0.158)
1.78 ± 0.15
(0.070 ± 0.006)
1.00 ± 0.15
(0.039 ± 0.006)
0.75 ± 0.25
(0.030 ± 0.010)
+ 0.076
- 0.0051
2.54
(0.100)
BSC
0.254
+ 0.003)
- 0.002)
(0.010
DIMENSIONS IN MILLIMETERS (INCHES).
7° NOM.
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
Solder Reflow Temperature Profile (HCPL-0500/1, HCPL-0452/3, and Gull Wing
Surface Mount Option Parts)
260
240
∆T = 145°C, 1°C/SEC
220
∆T = 115°C, 0.3°C/SEC
200
180
160
140
120
100
80
∆T = 100°C, 1.5°C/SEC
60
40
20
0
0
1
2
3
4
5
6
7
8
9
10
11
12
TIME – MINUTES
Note: Use of Non-Chlorine Activated Fluxes is Recommended.
6
Regulatory Information
CSA
The devices contained in this data
sheet have been approved by the
following organizations:
Approved under CSA Component
Acceptance Notice #5, File CA
88324.
UL
VDE
Recognized under UL 1577,
Component Recognition
Program, File E55361.
Approved according to VDE
0884/06.92 (HCNW and Option
060 devices only).
Insulation and Safety Related Specifications
8-Pin DIP
(300 Mil) SO-8
Value
Widebody
(400 Mil)
Value
Parameter
Symbol
Value
Units
Conditions
Minimum External
Air Gap (External
Clearance)
Minimum External
Tracking (External
Creepage)
Minimum Internal
Plastic Gap
(Internal Clearance)
L(101)
7.1
4.9
9.6
10.0
1.0
mm
Measured from input terminals
to output terminals, shortest
distance through air.
Measured from input terminals
to output terminals, shortest
distance path along body.
Through insulation distance,
conductor to conductor, usually
the direct distance between the
photoemitter and photodetector
inside the optocoupler cavity.
L(102)
7.4
4.8
mm
mm
0.08
0.08
Minimum Internal
Tracking (Internal
Creepage)
Tracking Resistance
(Comparative
Tracking Index)
Isolation Group
NA
200
IIIa
NA
200
IIIa
4.0
200
IIIa
mm
Measured from input terminals
to output terminals, along
internal cavity.
CTI
Volts DIN IEC 112/VDE 0303 Part 1
Material Group
(DIN VDE 0110, 1/89, Table 1)
Option 300 - surface mount classification is Class A in accordance with CECC 00802.
7
VDE 0884 Insulation Related Characteristics
(HCPL-4503 OPTION 060 ONLY)
Description
Symbol
Characteristic
Units
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 300 V rms
I-IV
I-III
55/100/21
2
for rated mains voltage ≤ 450 V rms
Climatic Classification
Pollution Degree (DIN VDE 0110/1.89)
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b*
V
IORM
630
V peak
V peak
V
IORM x 1.875 = VPR, 100% Production Test with tm = 1 sec,
VPR
VPR
1181
945
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
V
IORM x 1.5 = VPR, Type and sample test,
V peak
V peak
tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage*
(Transient Overvoltage, tini = 10 sec)
V
IOTM
6000
Safety Limiting Values
(Maximum values allowed in the event of a failure,
also see Figure 9, Thermal Derating curve.)
Case Temperature
Input Current
Output Power
TS
IS,INPUT
PS,OUTPUT
175
230
600
≥ 109
°C
mA
mW
Insulation Resistance at TS, V = 500 V
RS
Ω
IO
VDE 0884 Insulation Related Characteristics (HCNW135/6, HCNW4502/3 ONLY)
Description
Installation classification per DIN VDE 0110/1.89, Table 1
for rated mains voltage ≤ 600 V rms
for rated mains voltage ≤ 1000 V rms
Climatic Classification
Pollution Degree (DIN VDE 0110/1.89)
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b*
Symbol Characteristic Units
I-IV
I-III
55/85/21
2
V
1414
V peak
V peak
IORM
VIORM x 1.875 = VPR, 100% Production Test with tm = 1 sec,
VPR
VPR
2652
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
VIORM x 1.5 = VPR, Type and sample test,
2121
8000
V peak
V peak
tm = 60 sec, Partial Discharge < 5 pC
Highest Allowable Overvoltage*
(Transient Overvoltage, tini = 10 sec)
V
IOTM
Safety Limiting Values
(Maximum values allowed in the event of a failure,
also see Figure 9, Thermal Derating curve.)
Case Temperature
Input Current
Output Power
TS
IS,INPUT
PS,OUTPUT
RS
150
400
700
≥ 109
°C
mA
mW
Ω
Insulation Resistance at TS, V = 500 V
IO
*Refer to the front of the optocoupler section of the current catalog, under Product Safety Regulations section (VDE 0884), for a
detailed description.
Note: Isolation characteristics are guaranteed only within the safety maximum ratings which must be ensured by protective circuits in
application.
8
Absolute Maximum Ratings
Parameter
Symbol
Device
Min.
-55
-55
Max. Units Note
Storage Temperature*
Operating Temperature*
T
S
125
100
°C
°C
T
A
8-Pin DIP
SO-8
Widebody
-55
85
25
Average Forward Input Current*
Peak Forward Input Current*
(50% duty cycle, 1 ms pulse width)
(50% duty cycle, 1 ms pulse width)
Peak Transient Input Current*
(≤ 1 µs pulse width, 300 pps)
I
mA
mA
1
2
F(AVG)
I
8-Pin DIP
SO-8
Widebody
8-Pin DIP
SO-8
Widebody
8-Pin DIP
SO-8
Widebody
8-Pin DIP
SO-8
F(PEAK)
50
40
1
I
A
V
F(TRANS)
0.1
5
Reverse LED Input Voltage* (Pin 3-2)
Input Power Dissipation*
V
R
3
45
P
IN
mW
3
Widebody
40
8
Average Output Current* (Pin 6)
Peak Output Current*
Emitter-Base Reverse Voltage*
(Pin 5-7, except 4502/3, 0452/3)
I
mA
mA
V
O(AVG)
I
16
5
O(PEAK)
V
EBR
Supply Voltage (Pin 8-5)
Output Voltage (Pin 6-5)
Supply Voltage* (Pin 8-5)
Output Voltage* (Pin 6-5)
Base Current* (Pin 7, except 4502/3, 0452/3)
Output Power Dissipation*
V
V
O
-0.5
-0.5
-0.5
-0.5
30
20
15
15
5
V
V
V
V
mA
mW
CC
V
CC
V
I
P
O
B
100
4
O
Lead Solder Temperature*
(Through-Hole Parts Only)
1.6 mm below seating plane, 10 seconds
up to seating plane, 10 seconds
T
LS
8-Pin DIP
Widebody
260
260
°C
°C
Reflow Temperature Profile
T
RP
SO-8 and
Option 300
See Package Outline
Drawings section
*Data has been registered with JEDEC for the 6N135/6N136.
9
Electrical Specifications (DC)
Over recommended temperature (TA = 0°C to 70°C) unless otherwise specified. See note 13.
Parameter
Current
Transfer Ratio
Symbol
CTR*
Device
6N135
HCPL-0500
HCNW135
HCPL-2502
6N136
HCPL-4502/3
HCPL-0501
HCPL-0452/3 15
Min. Typ.** Max. Units
Test Conditions
TA = 25°C VO = 0.4 V
Fig. Note
IF = 16 mA, 1, 2, 5, 11
7
5
18
19
50
%
VO = 0.5 V
VCC = 4.5 V
4
15
19
22
50
TA = 25°C VO = 0.4 V
24
25
VO = 0.5 V
HCNW136
HCNW4502/3
6N135
HCPL-0500
HCNW135
Logic Low
Output Voltage
VOL
0.1
0.1
0.4
0.5
V
TA = 25°C IO = 1.1 mA
IF = 16 mA,
VCC = 4.5 V
I
O = 0.8 mA
TA = 25°C IO = 3.0 mA
O = 2.4 mA
6N136
0.1
0.1
0.4
0.5
HCPL-2502
HCPL-4502/3
HCPL-0501
HCPL-0452/3
HCNW136
I
HCNW4502/3
Logic High
Output Current
IOH
*
0.003
0.01
0.5
1
50
200
µA
TA = 25°C VO = VCC = 5.5 V IF = 0 mA
TA = 25°C VO = VCC = 15 V
7
3
Logic Low
Supply Current
Logic High
Supply Current
Input Forward
Voltage
ICCL
50
µA
µA
V
IF = 16 mA, VO = Open, VCC = 15 V
13
13
ICCH
*
0.02
1.5
1
2
1.7
1.8
1.85
1.95
TA = 25°C IF = 0 mA, VO = Open,
VCC = 15 V
VF*
8-Pin DIP
SO-8
Widebody
TA = 25°C IF = 16 mA
TA = 25°C IF = 16 mA
IR = 10 µA
1.45
1.35
5
1.68
Input Reverse
Breakdown
Voltage
Temperature
Coefficient of
Forward Voltage
Input
BVR*
8-Pin DIP
SO-8
Widebody
8-Pin DIP
SO-8
Widebody
8-Pin DIP
SO-8
V
3
IR = 100 µA
∆VF
∆TA
-1.6
mV/°C IF = 16 mA
-1.9
60
CIN
pF
f = 1 MHz, VF = 0 V
Capacitance
Widebody
8-Pin DIP
SO-8
90
Transistor DC
Current
Gain
hFE
150
130
180
160
VO = 5 V, IO = 3 mA
VO = 0.4 V, IB = 20 µA
VO = 5 V, IO = 3 mA
VO = 0.4 V, IB = 20 µA
Widebody
*For JEDEC registered parts.
**All typicals at TA = 25°C.
10
Switching Specifications (AC)
Over recommended temperature (TA = 0°C to 70°C), VCC = 5 V, IF = 16 mA unless otherwise specified.
Parameter
Sym.
tPHL*
Device
6N135
HCPL-0500
HCNW135
6N136
Min. Typ.** Max. Units
Test Conditions
Fig. Note
Propagation
Delay Time
to Logic Low
at Output
0.2
1.5
2.0
µs
TA = 25°C
TA = 25°C
RL = 4.1 kΩ
5, 6,
11
8, 9
0.2
0.8
RL = 1.9 kΩ
HCPL-2502
HCPL-4502/3
HCPL-0501
HCPL-0452/3
HCNW136
1.0
HCNW4502/3
Propagation
Delay Time to
Logic High at
Output
tPLH
*
6N135
HCPL-0500
HCNW135
1.3
0.6
1.5
2.0
µs
TA = 25°C
TA = 25°C
RL = 4.1 kΩ
RL = 1.9 kΩ
5, 6,
11
8, 9
6N136
0.8
HCPL-2502
HCPL-4502/3
HCPL-0501
HCPL-0452/3
HCNW136
1.0
HCNW4502/3
Common Mode |CMH|
Transient
Immunity at
Logic High
Level Output
6N135
HCPL-0500
HCNW135
1
1
kV/µs RL = 4.1 kΩ IF = 0 mA, TA = 25°C,
CM = 10 Vp-p
CL = 15 pF
12
7, 8,
9
V
6N136
RL = 1.9 kΩ
HCPL-2502
HCPL-4502
HCPL-0501
HCPL-0452
HCNW4502
HCPL-4503
HCPL-0453
HCNW4503
6N135
HCPL-0500
HCNW135
15
30
1
RL = 1.9 kΩ IF = 0 mA, TA = 25°C,
CM = 1500 Vp-p
CL = 15 pF
kV/µs RL = 4.1 kΩ IF = 16 mA, TA = 25°C,
CM = 10 Vp-p
CL = 15 pF
V
,
Common Mode |CML|
Transient
12
7, 8,
9
V
Immunity at
Logic Low
Level Output
6N136
1
RL = 1.9 kΩ
HCPL-2502
HCPL-4502
HCPL-0501
HCPL-0452
HCNW4502
HCPL-4503
HCPL-0453
HCNW4503
6N135/6
HCPL-2502
HCPL-0500/1
15
30
9
RL = 1.9 kΩ IF = 16 mA, TA = 25°C,
CM = 1500 V
CL = 15 pF
MHz See Test Circuit
V
,
p-p
Bandwidth
BW
8, 10
10
HCNW135/6
11
*For JEDEC registered parts.
**All typicals at TA = 25°C.
11
Package Characteristics
Over recommended temperature (TA = 0°C to 70°C) unless otherwise specified.
Parameter
Sym.
Device
Min. Typ.* Max. Units Test Conditions Fig. Note
Input-Output
Momentary
Withstand
Voltage**
V
ISO
8-Pin DIP
SO-8
Widebody
2500
5000
5000
V rms RH < 50%,
t = 1 min.,
6, 14
T = 25°C
A
6, 15
8-Pin DIP
(Option 020)
6, 12,
15
II-O
8-Pin DIP
1
µA
45% RH, t = 5 s,
I-O = 3 kVdc,
6, 16
V
T = 25°C
VI-O = 500 Vdc
A
Input-Output
Resistance
RI-O
8-Pin DIP
SO-8
Widebody
1012
Ω
6
1012 1013
1011
T = 25°C
T = 100°C
A
A
Input-Output
Capacitance
CI-O
8-Pin DIP
SO-8
0.6
pF
f = 1 MHz
6
Widebody
0.5
0.6
*All typicals at TA = 25°C.
**The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output
continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Related Characteristics Table (if
applicable), your equipment level safety specification or HP Application Note 1074 entitled “Optocoupler Input-Output Endurance
Voltage,” publication number 5963-2203E.
Notes:
1. Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/°C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 0.5 mA/°C (SO-8).
2. Derate linearly above 70°C free-air temperature at a rate of 1.6 mA/°C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 1.0 mA/°C (SO-8).
3. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 1.1 mW/°C (SO-8).
4. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 2.3 mW/°C (SO-8).
5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF,
times 100.
6. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
7. Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/dt on the leading edge of the
common mode pulse signal, VCM, to assure that the output will remain in a Logic High state (i.e., VO > 2.0 V). Common mode
transient immunity in a Logic Low level is the maximum tolerable (negative) dVCM/dt on the trailing edge of the common mode pulse
signal, VCM, to assure that the output will remain in a Logic Low state (i.e., VO < 0.8 V).
8. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and the 5.6 kΩ pull-up resistor.
9. The 4.1 kΩ load represents 1 LSTTL unit load of 0.36 mA and 6.1 kΩ pull-up resistor.
10. The frequency at which the ac output voltage is 3 dB below its mid-frequency value.
11. The JEDEC registration for the 6N136 specifies a minimum CTR of 15%. Agilent guarantees a minimum CTR of 19%.
12. See Option 020 data sheet for more information.
13. Use of a 0.1 µf bypass capacitor connected between pins 5 and 8 is recommended.
14. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 3000 V rms for 1 second
(leakage detection current limit, II-O ≤ 5 µA). This test is performed before the 100% Production test shown in the VDE 0884
Insulation Related Characteristics Table if applicable.
15. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 second
(leakage detection current limit, II-O ≤ 5 µA). This test is performed before the 100% Production test shown in the VDE 0884
Insulation Related Characteristics Table if applicable.
16. This rating is equally validated by an equivalent ac proof test.
12
WIDEBODY
8 PIN DIP, SO-8
16
12
40 mA
35 mA
30 mA
T
V
= 25°C
T
V
= 25°C
A
A
10
= 5.0 V
= 5.0 V
CC
CC
40 mA
35 mA
30 mA
25 mA
20 mA
25 mA
20 mA
8
4
5
0
15 mA
10 mA
15 mA
10 mA
I
= 5 mA
F
I
= 5 mA
F
0
0
10
– OUTPUT VOLTAGE – V
20
0
10
– OUTPUT VOLTAGE – V
20
V
V
O
O
Figure 1. DC and Pulsed Transfer Characteristics.
8 PIN DIP, SO-8
WIDEBODY
1.5
1.0
1.5
1.0
6N135, HCPL-0500
6N136, HCPL-4502/3,
HCPL-2502
HCNW135/6,
HCNW4502/3
HCPL-0501/0452/0453
0.5
0
0.5
0.1
NORMALIZED
NORMALIZED
= 16 mA
I
V
V
= 16 mA
= 0.4 V
I
F
O
F
V
= 0.4 V
= 5 V
= 25°C
O
= 4.5 V
= 25 °C
V
CC
T
CC
T
A
A
0
1
10
100
0
1
10
100
I
– INPUT CURRENT – mA
I
– INPUT CURRENT – mA
F
F
Figure 2. Current Transfer Ratio vs. Input Current.
8 PIN DIP, SO-8
WIDEBODY
1000
100
1000
100
10
T
A
= 25° C
I
F
T
A
= 25°C
+
V
–
10
1.0
0.1
F
1.0
0.1
I
F
+
V
0.01
0.001
0.01
F
–
0.001
1.2 1.3
1.4
1.5
1.6
1.7
1.8
1.1
1.2
1.3
1.4
1.5
1.6
V
– FORWARD VOLTAGE – VOLTS
V
– FORWARD VOLTAGE – VOLTS
F
F
Figure 3. Input Current vs. Forward Voltage.
13
8 PIN DIP, SO-8
WIDEBODY
1.1
1.0
0.9
1.1
1.0
0.9
HCNW135/6,
HCNW4502/3
NORMALIZED
= 16 mA
I
0.8
0.7
0.6
F
V
= 0.4 V
= 5 V
= 25°C
O
V
CC
A
0.8
0.7
0.6
T
NORMALIZED
I
= 16 mA
F
6N135, HCPL-0500
6N136, HCPL-4502/3,
HCPL-2502
V
= 0.4 V
= 5 V
= 25°C
O
CC
V
T
0.5
0.4
A
HCPL-0501, 0452, 0453
-60 -40 -20
0
20 40 60 80 100
80
100
-60 -40 -20
0
20 40
60
T
– TEMPERATURE – °C
T
– TEMPERATURE – °C
A
A
Figure 4. Current Transfer Ratio vs. Temperature.
8 PIN DIP, SO-8
WIDEBODY
= 16 mA, V
2000
1500
1000
800
I
= 16 mA, V = 5.0 V
CC
6N135, HCPL-0500 (R = 4.1 kΩ)
6N136, HCPL-0501, HCPL-2502
F
I
= 5.0 V
CC
F
L
HCNW135 (R = 4.1 kΩ)
L
HCNW136 (R = 1.9 kΩ)
HCPL-4502/3 (R = 1.9 kΩ)
L
L
HCPL-0452/3
HCNW4502/3
600
t
t
PHL
PLH
1000
500
0
400
200
0
t
t
PHL
PLH
-60
-20
20
60
100
-60 -40 -20
0
20 40 60 80 100
T
– TEMPERATURE – °C
T
A
– TEMPERATURE – °C
A
Figure 5. Propagation Delay vs. Temperature.
WIDEBODY
8 PIN DIP, SO-8
3.0
10.0
I
I
= 10 mA
= 16 mA
I
I
= 10 mA
F
= 16 mA
F
F
6.0
4.0
t
2.0
V
T
A
= 5.0 V
= 25 °C
V
T
A
= 5.0 V
= 25 °C
CC
CC
t
t
PLH
PHL
1.0
0.8
t
PLH
0.6
1.0
0.6
0.4
t
PHL
0.4
0.2
0.2
0.1
0.1
1
2
3
4
5
6 7 8 9 10
1
2
L
4
10
40
100
R
– LOAD RESISTANCE – (kΩ)
R
– LOAD RESISTANCE – (kΩ)
L
Figure 6. Propagation Delay Time vs. Load Resistance.
14
8 PIN DIP, SO-8
WIDEBODY
+3
+4
10
10
I
V
= 0
O
F
= V = 5.0 V
CC
+3
10
I
V
= 0
O
F
= V = 15 V
CC
+2
+2
10
10
+1
10
+1
0
10
10
-1
10
10
-2
0
10
-60 -40 -20
0
20 40 60 80 100
-75 -50 -25
0
+25 +50 +75 +100
T
– TEMPERATURE – °C
T
A
– TEMPERATURE – °C
A
Figure 7. Logic High Output Current vs. Temperature.
8 PIN DIP, SO-8
WIDEBODY
0.30
0.20
0.10
0
0.50
0.40
T
= 25°C, R = 100 Ω, V = 5 V
CC
T
= 25°C, R = 100 Ω, V = 5 V
CC
A
L
A
L
0.30
0.20
0.10
0
0
4
8
12
16
20
25
0
F
4
8
12
16
20
25
I
– QUIESCENT INPUT CURRENT – mA
I
– QUIESCENT INPUT CURRENT – mA
F
Figure 8. Small-Signal Current Transfer Ratio vs. Quiescent Input Current.
HCPL-4503 OPTION 060
HCNW135/6, HCNW4502/3
1000
800
700
600
500
400
300
200
100
0
P
I
(mW)
P
I
(mW)
S
S
900
800
700
600
500
400
300
200
(mA)
(mA)
S
S
100
0
0
25
50 75 100 125 150 175
0
25 50 75 100 125 150 175 200
– CASE TEMPERATURE – °C
T
– CASE TEMPERATURE – °C
T
S
S
Figure 9. Thermal Derating Curve, Dependence of Safety Limiting Value with Case Temperature per VDE 0884.
15
6N135/6, HCPL-0500/1, HCPL-2502
6N135/6, HCPL-0500/1, HCPL-2502
= 25 °C
+12 V
+5
0
T
A
1
8
7
6
5
+12 V
0.1 µF
1.2 KΩ
2.1 KΩ
0.1 µF
15 KΩ
9.1 KΩ
2
3
4
Q
3
-5
V
O
47 µF
Q
2
100 Ω
1 KΩ
Q
V
1
FF
0.1 µF
470 Ω
(1 MΩ 12 pF
TEST INPUT)
-10
100 Ω
R
T
51 Ω
-15
-20
TRIM FOR
UNITY GAIN
22 Ω
Q
, Q , Q : 2N3904
2
3
1N4150
1
TYPICAL LINEARITY = ± 3% AT V = 1 V
IN
TYPICAL SNR = 50dB
p-p
0.1
1.0
10
100
TYPICAL R = 375 Ω
T
TYPICAL V dc = 3.8 V
O
f - FREQUENCY - MHz
TYPICAL I = 9 mA
F
HCNW135/6
HCNW135/6
Figure 10. Frequency Response.
I
F
I
PULSE
GEN.
F
8
7
6
5
1
2
3
4
+5 V
0
Z
t
= 50 Ω
= 5 ns
O
r
R
*
L
5 V
V
V
O
10% DUTY CYCLE
1/f < 100 µS
V
O
1.5 V
1.5 V
0.1µF
I
MONITOR
F
OL
C
= 1.5 µF
L
R
M
t
t
PHL
PLH
* PIN 7 UNCONNECTED IN HCPL-4502/3,
HCPL-0452/3, HCNW4502/3
Figure 11. Switching Test Circuit.
I
F
1
8
7
6
5
+5 V
B
R
2
L
*
V
CM
A
90% 90%
10%
r
10%
0 V
3
V
O
t
t
f
0.1 µF
V
O
4
5 V
V
FF
SWITCH AT A:
SWITCH AT B:
I
I
= 0 mA
F
F
V
O
V
OL
V
CM
= 16 mA
–
+
PULSE GEN.
*PIN 7 UNCONNECTED IN HCPL-4502/3, HCPL-0542/3, HCNW4502/3
Figure 12. Test Circuit for Transient Immunity and Typical Waveforms.
www.semiconductor.agilent.com
Data subject to change.
Copyright © 2001 Agilent Technologies, Inc.
September 6, 2001
Obsoletes 5968-7900E (11/99)
5988-4111EN
相关型号:
6N135M
Logic IC Output Optocoupler, 1-Element, 5000V Isolation, 1MBps, 0.400 INCH, ROHS COMPLIANT, DIP-8
EVERLIGHT
6N135M_10
Dual-Channel: HCPL2530M, HCPL2531M (Preliminary) High Speed Transistor Optocouplers
FAIRCHILD
6N135S(TB)
Logic IC Output Optocoupler, 1-Element, 5000V Isolation, 1MBps, ROHS COMPLIANT, SURFACE MOUNT, DIP-8
EVERLIGHT
©2020 ICPDF网 联系我们和版权申明