AFCT-57J7ATPZ [AVAGO]

Compatible, Digital Diagnostic Optical Transceiver; 兼容,数字诊断光端机
AFCT-57J7ATPZ
型号: AFCT-57J7ATPZ
厂家: AVAGO TECHNOLOGIES LIMITED    AVAGO TECHNOLOGIES LIMITED
描述:

Compatible, Digital Diagnostic Optical Transceiver
兼容,数字诊断光端机

光纤 放大器
文件: 总17页 (文件大小:248K)
中文:  中文翻译
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AFCT-57J7ATPZ  
1310nm, 20km, 7.373/6.144 Gb/s, Low Voltage (3.3 V)  
SFP (Small Form Pluggable), RoHS OBSAI/CPRI  
Compatible, Digital Diagnostic Optical Transceiver  
Data Sheet  
Description  
Features  
The AFCT-57J7ATPZ optical transceiver supports high-  Diagnostic features per SFF-8472 “Diagnostic  
speed serial links over singlemode optical fiber at signaling  
rates up to 7.373 Gb/s. Compliant with Small Form  
Pluggable (SFP) Multi Source Agreement (MSA) mechani-  
cal and electrical specifications, ANSI Fibre Channel FC-PI-3  
and compatible with IEEE 802.3 for gigabit applications.  
Monitoring Interface for Optical Transceivers”  
 Compliant to Restriction on Hazardous Substances  
(RoHS) directive  
 Real time monitors of:  
– Transmitted average optical power  
– Received average optical power  
– Laser bias current  
As an enhancement to the conventional SFP interface  
defined in SFF-8074i, the AFCT-57J7ATPZ is compliant  
to SFF-8472 (digital diagnostic interface for SFP). Using  
the 2-wire serial interface defined in the SFP MSA, the  
AFCT-57J7ATPZ provides real time temperature, supply  
voltage, laser bias current, laser average output power  
and received average input power. This information is in  
addition to the conventional SFP data. The digital diagnos-  
tic interface also adds the ability to disable the transmitter  
– Temperature  
– Supply voltage  
 High performance 1310 nm DFB laser  
 Wide Temperature and Supply Voltage Operation  
(-40°C to 85°C) (3.3 V 10ꢀ)  
(TX_DISABLE), monitor for Transmitter Faults (TX_FAULT), Management interface specifications per SFF  
and monitor for Receiver Loss of Signal (RX_LOS).  
Committee SFF 8431  
Mechanical specifications per SFF Committee SFF  
Related Products  
8432 Improved Pluggable Formfactor "IPF"  
 AFBR-57J7APZ: 850nm +3.3V LC SFP  
 Up to 20km with single mode fiber for 7.373 Gb/s  
 Up to 20km with single mode fiber for 6.144 Gb/s  
for 7.373/6.144 GBd CPRI/OBSAI  
 AFBR-57J5APZ: 850nm +3.3V LC SFP  
 LC Duplex optical connector interface conforming to  
for 3.072/2.456 GBd CPRI/OBSAI  
ANSI TIA/EIA604-10 (FOCIS 10)  
 AFCT-57J5APZ: 1310nm +3.3V LC SFP  
 IEC 60825-1 Class 1/CDRH Class 1 laser eye safe  
for 3.072/2.456 GBd CPRI/OBSAI  
 Compatible with Fibre Channel and Gigabit Ethernet  
 AFCT-57J5ATPZ: 1310nm +3.3V LC SFP  
applications  
for 3.072/2.456 GBd CPRI/OBSAI  
Applications  
 Wireless and cellular base station system interconnect:  
– OBSAI rates 6.144 Gb/s, 3.072 Gb/s, 1.536 Gb/s  
– CPRI rates 7.373 Gb/s, 2.458 Gb/s, 1.229 Gb/s  
Installation  
Compliance Prediction  
The AFCT-57J7ATPZ can be installed in any SFF-8074i Compliance prediction is the ability to determine if an  
compliant Small Form Pluggable (SFP) port regardless of optical transceiver is operating within its operating and en-  
host equipment operating status. The AFCT-57J7ATPZ is vironmentalrequirements.AFCT-57J7ATPZdevicesprovide  
hot-pluggable, allowing the module to be installed while real-time access to transceiver internal supply voltage  
the host system is operating and on-line. Upon insertion, and temperature, allowing a host to identify potential  
the transceiver housing makes initial contact with the component compliance issues. Received optical power is  
host board SFP cage, mitigating potential damage due to also available to assess compliance of a cable plant and  
Electro-Static Discharge (ESD).  
remote transmitter. When operating out of requirements,  
the link cannot guarantee error free transmission.  
Digital Diagnostic Interface and Serial Identification  
Fault Isolation  
The 2-wire serial interface is based on ATMEL AT24C01A  
series EEPROM protocol and signaling detail. Convention- The fault isolation feature allows a host to quickly pinpoint  
al SFP EEPROM memory, bytes 0-255 at memory address  
0xA0, is organized in compliance with SFF-8074i. New  
the location of a link failure, minimizing downtime. For  
optical links, the ability to identify a fault at a local device,  
digital diagnostic information, bytes 0-255 at memory remote device or cable plant is crucial to speeding service  
address 0xA2, is compliant to SFF-8472. The new diag- of an installation. AFCT-57J7ATPZ real-time monitors of  
nostic information provides the opportunity for Predic-  
Tx_Bias, Tx_Power, Vcc, Temperature and Rx_Power can be  
tive Failure Identification, Compliance Prediction, Fault used to assess local transceiver current operating condi-  
Isolation and Component Monitoring.  
tions. In addition, status flags Tx_Disable and Rx Loss of  
Signal (LOS) are mirrored in memory and available via the  
two-wire serial interface.  
Predictive Failure Identification  
The AFCT-57J7ATPZ predictive failure feature allows a  
host to identify potential link problems before system per-  
Component Monitoring  
formance is impacted. Prior identification of link problems Component evaluation is a more casual use of the AFCT-  
enables a host to service an application via “fail over” to a 57J7ATPZ real-time monitors of Tx_Bias, Tx_Power,  
redundant link or replace a suspect device, maintaining Vcc, Temperature and Rx_Power. Potential uses are as  
system uptime in the process. For applications where ultra- debugging aids for system installation and design, and  
high system uptime is required, a digital SFP provides a  
means to monitor two real-time laser metrics associated  
transceiver parametric evaluation for factory or field qual-  
ification. For example, temperature per module can be  
with observing laser degradation and predicting failure: observed in high density applications to facilitate thermal  
average laser bias current (Tx_Bias) and average laser evaluation of blades, PCI cards and systems.  
optical power (Tx_Power).  
2
OPTICAL INTERFACE  
LIGHT FROM FIBER  
ELECTRICAL INTERFACE  
RECEIVER  
PHOTO-DETECTOR  
RD+ (RECEIVE DATA)  
RD– (RECEIVE DATA)  
Rx LOSS OF SIGNAL  
AMPLIFICATION  
& QUANTIZATION  
MOD-DEF2 (SDA)  
CONTROLLER & MEMORY  
MOD-DEF1 (SCL)  
MOD-DEF0  
TRANSMITTER  
DFB Laser  
TX_DISABLE  
LASER  
TD+ (TRANSMIT DATA)  
TD– (TRANSMIT DATA)  
TX_FAULT  
DRIVER &  
SAFETY  
LIGHT TO FIBER  
CIRCUITRY  
Figure 1. Transceiver functional diagram.  
Transmitter Section  
The contents of A2h, byte 110, bit 6 are logic OR’d with  
hardware Tx_Disable (pin 3) to control transmitter  
operation  
The transmitter section includes a 1310-nm distributed  
feedback (DFB) laser and a transmitter driver circuit. The  
driver circuit maintains a constant average optical power  
output with Fibre Channel and Ethernet 8B/10B coded  
data. Optical connection to the transmitter is provided via  
an LC connector. The TOSA is driven by a custom IC which  
uses the incoming differential high speed logic signal  
to modulate the laser diode driver current. This Tx laser  
driver circuit regulates the optical power at a constant  
level provided the incoming data pattern is dc balanced  
(8B/10B code, for example).  
Transmit Fault (TX_FAULT)  
A catastrophic laser fault will activate the transmitter  
signal, TX_FAULT, and disable the laser. This signal is an  
open collector output (pull-up required on the host board).  
A low signal indicates normal laser operation and a high  
signal indicates a fault. The TX_FAULT will be latched high  
when a laser fault occurs and is cleared by toggling the  
TX_DISABLE input or power cycling the transceiver. The  
transmitter fault condition can also be monitored via the  
two-wire serial interface (address A2, byte 110, bit 2).  
Transmit Disable (TX_DISABLE)  
The AFCT-57J7ATPZ accepts a TTL and CMOS compatible  
transmit disable control signal input (pin 3) which shuts  
down the transmitter optical output. A high signal imple-  
ments this function while a low signal allows normal trans-  
ceiveroperation.Intheeventofafault(e.g.eyesafetycircuit  
activated), cycling this control signal resets the module as  
depicted in Figure 4. An internal pull up resistor disables  
the transceiver transmitter until the host pulls the input  
low. Host systems should allow a 10 ms interval between  
successive assertions of this control signal. Tx_Disable can  
also be asserted via the two-wire serial interface (address  
A2h, byte 110, bit 6) and monitored (address A2h, byte  
110, bit 7).  
Eye Safety Circuit  
The AFCT-57J7ATPZ provides Class 1 (single fault tolerant)  
eye safety by design and has been tested for compliance  
with the requirements listed in Table 1. The eye safety  
circuit continuously monitors the optical output power  
level and will disable the transmitter upon detecting an  
unsafe condition beyond the scope of Class 1 certification.  
Such unsafe conditions can be due to inputs from the host  
board (Vcc fluctuation, unbalanced code) or a fault within  
the transceiver.  
3
Receiver Section  
Caution  
The receiver section includes the Receiver Optical Sub-  
Therearenouserserviceablepartsnormaintenancerequire-  
Assembly (ROSA) and the amplification/quantization ments for the AFCT-57J7ATPZ. All mechanical adjustments  
circuitry. The ROSA, containing a PIN photodiode and are made at the factory prior to shipment. Tampering with,  
custom transimpedance amplifier, is located at the optical modifying, misusing or improperly handling the AFCT-  
interface and mates with the LC optical connector. The 57J7ATPZ will void the product warranty. It may also result  
ROSA output is fed to a custom IC that provides post-am- in improper operation and possibly overstress the laser  
plification and quantization.  
source. Performance degradation or device failure may  
result. Connection of the AFCT-57J7ATPZ to a light source  
not compliant with ANSI FC-PI or IEEE 802.3 specifications,  
operating above maximum operating conditions or in a  
manner inconsistent with it’s design and function may  
result in exposure to hazardous light radiation and may  
constitute an act of modifying or manufacturing a laser  
product. Persons performing such an act are required by  
law to re-certify and re-identify the laser product under  
the provisions of U.S. 21 CFR (Subchapter J) and TUV.  
Receiver Loss of Signal (Rx_LOS)  
Thepost-amplificationICalsoincludestransitiondetection  
circuitry which monitors the ac level of incoming optical  
signals and provides a TTL/CMOS compatible status signal  
to the host (pin 8). An adequate optical input results in a  
low Rx_LOS output while a high Rx_LOS output indicates  
an unusable optical input. The Rx_LOS thresholds are  
factory set so that a high output indicates a definite optical  
fault has occurred. Rx_LOS can also be monitored via the  
two-wire serial interface (address A2h, byte 110, bit 1).  
Ordering Information  
Please contact your local field sales engineer or one of  
Avago Technologies franchised distributors for ordering  
information. For technical information, please visit Avago  
Technologies’ WEB page at www.avagotech.com or contact  
Avago Technologies Semiconductor Products Customer  
Response Center at 1-800-235-0312. For information  
related to SFF Committee documentation visit www.sffcom-  
mittee.org.  
Functional Data I/O  
The AFCT-57J7ATPZ interfaces with the host circuit board  
through twenty I/O pins (SFP electrical connector) iden-  
tified by function in Table 2. The board layout for this  
interface is depicted in Figure 6.  
The AFCT-57J7ATPZ high speed transmit and receive in-  
terfaces require SFP MSA compliant signal lines on the  
host board. To simplify board requirements, biasing Regulatory Compliance  
resistors and ac coupling capacitors are incorporated into  
The AFCT-57J7ATPZ complies with all applicable laws  
the SFP transceiver module (per SFF-8074i) and hence are  
not required on the host board. The Tx_Disable, Tx_Fault,  
Rx_LOS require TTL lines on the host board (per SFF-8074i)  
if used. If an application chooses not to take advantage  
of the functionality of these pins, care must be taken to  
ground Tx_Disable (for normal operation).  
and regulations as detailed in Table 1. Certification level  
is dependent on the overall configuration of the host  
equipment. The transceiver performance is offered as a  
figure of merit to assist the designer.  
Electrostatic Discharge (ESD)  
Figure 2 depicts the recommended interface circuit to  
link the AFCT-57J7ATPZ to supporting physical layer ICs.  
Timing for MSA compliant control signals implemented in  
the transceiver are listed in Figure 4.  
The AFCT-57J7ATPZ is compatible with ESD levels found  
in typical manufacturing and operating environments  
as described in Table 1. In the normal handling and  
operation of optical transceivers, ESD is of concern in two  
circumstances.  
Application Support  
The first case is during handling of the transceiver prior  
to insertion into an SFP compliant cage. To protect the  
device, it’s important to use normal ESD handling precau-  
tions. These include using of grounded wrist straps, work-  
benches and floor wherever a transceiver is handled.  
An Evaluation Kit and Reference Designs are available to  
assist in evaluation of the AFCT-57J7ATPZ. Please contact  
your local Field Sales representative for availability and  
ordering details.  
The second case to consider is static discharges to the  
exterior of the host equipment chassis after installation.  
If the optical interface is exposed to the exterior of host  
equipment cabinet, the transceiver may be subject to  
system level ESD requirements.  
4
Electromagnetic Interference (EMI)  
EMI Immunity (Susceptibility)  
Equipment incorporating gigabit transceivers is typically Due to its shielded design, the EMI immunity of the AFCT-  
subject to regulation by the FCC in the United States, 57J7ATPZ exceeds typical industry standards.  
CENELEC EN55022 (CISPR 22) in Europe and VCCI in Japan.  
Flammability  
The AFCT-57J7ATPZ’s compliance to these standards is  
detailed inTable 1. The metal housing and shielded design  
of the AFCT-57J7ATPZ minimizes the EMI challenge facing  
the equipment designer.  
The AFCT-57J7ATPZ optical transceiver is made of metal  
and high strength, heat resistant, chemical resistant and  
UL 94V-0 flame retardant plastic.  
Table 1. Regulatory Compliance  
Feature  
Test Method  
Performance  
Electrostatic Discharge (ESD)  
to the Electrical Pins  
MIL-STD-883C  
Method 3015.4  
Class 2 (> 1000 Volts)  
Electrostatic Discharge (ESD)  
to the Duplex LC Receptacle  
Variation of IEC 61000-4-2  
Typically, no damage occurs with 25 kV when  
the duplex LC connector receptacle is  
contacted by a Human Body Model probe.  
GR1089  
10 contacts of 8 kV on the electrical faceplate  
with device inserted into a panel.  
Electrostatic Discharge (ESD)  
to the Optical Connector  
Variation of IEC 801-2  
Air discharge of 15kV (min.) contact to  
connector without damage.  
Electromagnetic Interference  
(EMI)  
FCC Class B  
CENELEC EN55022 Class B  
(CISPR 22A)  
System margins are dependent on customer  
board and chassis design.  
VCCI Class 1  
Immunity  
Variation of IEC 61000-4-3  
Typically shows no measurable effect  
from a 10 V/m swept from 10 MHZ to 1 GHz.  
Laser Eye Safety and  
Equipment Type Testing  
US FDA CDRH AEL Class 1  
US21 CFR, Subchapter J per  
CDRH #9521220-158  
TUV #30783705.001  
Paragraphs 1002.10 and 1002.12  
BAUART  
GEPRUFT  
¨
(IEC) EN60825-1: 1994 + A11 + A2  
(IEC) EN60825-2: 1994 + A1  
(IEC) EN60950: 1992 + A1 + A2 +  
A3 + A4 + A11  
¨
TUV  
TYPE  
APPROVED  
Rheinland  
Product Safety  
Component Recognition  
Underwriters Laboratories and  
Canadian Standards Association  
Joint Component Recognition  
for Information Technology  
Equipment including Electrical  
Business Equipment  
UL #E173874  
Restriction on Hazardous  
Substances (RoHS) Compliance  
Less than 1000 ppm of cadmium, lead, mercury,  
hexavalent chromium, polybrominated biphe  
nyls, and polybrominated biphenyl ethers.  
5
VCC,T  
6.8 k  
GND,T  
Tx DIS  
Tx_DISABLE  
Tx_FAULT  
Tx FAULT  
TD+  
TD–  
100   
LASER DRIVER  
4.7 k to 10 k  
0.1 F  
1 H  
VCC,T  
VCC,R  
3.3 V  
10 F  
SERDES IC  
0.1 F  
VCC,R  
VCC,R  
50   
1 H  
PROTOCOL IC  
10 F  
0.1 F  
4.7 k to  
10 k  
50   
RD+  
100   
RD–  
Rx LOS  
LOSS OF SIGNAL  
POST AMPLIFIER  
3.3 V  
GND,R  
4.7 k to 10 k  
4.7 k to 10 k  
MOD_DEF0 MOD_DEF1 MOD_DEF2  
4.7 k to 10 k  
MODULE DETECT  
SCL  
SDA  
Figure 2. Typical application configuration.  
1 H  
1 H  
VCCT  
0.1 F  
3.3 V  
VCCR  
0.1 F  
10 F  
0.1 F  
10 F  
SFP MODULE  
HOST BOARD  
NOTE: INDUCTORS MUST HAVE LESS THAN 1 W SERIES RESISTANCE TO LIMIT VOLTAGE DROP TO THE SFP MODULE.  
Figure 3. Recommended power supply filter.  
6
Table 2. Pin Description  
Pin  
1
Name  
Function/Description  
Notes  
VeeT  
Transmitter Ground  
2
TX_FAULT  
TX_DISABLE  
MOD-DEF2  
MOD-DEF1  
MOD-DEF0  
No Connect  
RX_LOS  
No Connect  
VeeR  
Transmitter Fault Indication – High indicates a fault condition  
Transmitter Disable – Module optical output disables on high or open  
Module Definition 2 – Two wire serial ID interface data line (SDA)  
Module Definition 1 – Two wire serial ID interface clock line (SCL)  
Module Definition 0 – Grounded in module (module present indicator)  
Internal pull down 100kOhm to ground  
Loss of Signal – High indicates loss of received optical signal  
Internal pull down 100kOhm to ground  
Receiver Ground  
Note 1  
Note 2  
Note 3  
Note 3  
Note 3  
3
4
5
6
7
8
Note 4  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
VeeR  
Receiver Ground  
RD-  
Inverse Received Data Out  
Note 5  
Note 5  
RD+  
Received Data Out  
VeeR  
Receiver Ground  
VccR  
Receiver Power + 3.3 V  
Note 6  
Note 6  
VccT  
Transmitter Power + 3.3 V  
VeeT  
Transmitter Ground  
TD+  
Transmitter Data In  
Note 7  
Note 7  
TD-  
Inverse Transmitter Data In  
20  
VeeT  
Transmitter Ground  
Notes:  
1. TX_FAULT is an open collector/drain output, which must be pulled up with a 4.7k – 10kresistor on the host board. When high, this output  
indicates a laser fault of some kind. Low indicates normal operation. In the low state, the output will be pulled to < 0.8V.  
2. TX_DISABLE is an input that is used to shut down the transmitter optical output. It is internally pulled up (within the transceiver) with a 6.8k  
resistor.  
Low (0 – 0.8V):  
Between (0.8V and 2.0V):  
High (2.0 – Vcc max) or OPEN:  
Transmitter on  
Undefined  
Transmitter Disabled  
3. The signals Mod-Def 0, 1, 2 designate the two wire serial interface pins. They must be pulled up with a 4.7k – 10kresistor on the host board.  
Mod-Def 0 is grounded by the module to indicate the module is present  
Mod-Def 1 is serial clock line (SCL) of two wire serial interface  
Mod-Def 2 is serial data line (SDA) of two wire serial interface  
4. RX_LOS (Rx Loss of Signal) is an open collector/drain output that must be pulled up with a 4.7k – 10kresistor on the host board. When high, this  
output indicates the received optical power is below the worst case receiver sensitivity (as defined by the standard in use). Low indicates normal  
operation. In the low state, the output will be pulled to < 0.8V.  
5. RD-/+ designate the differential receiver outputs. They are AC coupled 100differential lines which should be terminated with 100differential  
at the host SERDES input. AC coupling is done inside the transceiver and is not required on the host board. The voltage swing on these lines will be  
between 370 and 850 mV differential (185 – 425 mV single ended) when properly terminated.  
6. VccR and VccT are the receiver and transmitter power supplies. They are defined at the SFP connector pin. The maximum supply current is 300 mA  
and the associated in-rush current will typically be no more than 30 mA above steady state after 2 microseconds.  
7. TD-/+ designate the differential transmitter inputs. They are AC coupled differential lines with 100 differential termination inside the module.  
The AC coupling is done inside the module and is not required on the host board. The inputs will accept differential swings of 180 – 1200 mV  
(90 – 600mV single ended).  
7
Table 3. Absolute Maximum Ratings  
Parameter  
Symbol  
TS  
Minimum  
-40  
Maximum  
100  
Unit  
C
Notes  
Storage Temperature  
Case Operating Temperature  
Relative Humidity  
Note 1, 2  
Note 1, 2  
Note 1  
TC  
-40  
85  
C
RH  
5
85  
V
Supply Voltage  
VccT, R  
VIN  
-0.5  
-0.5  
3.8  
Note 1, 2, 3  
Note 1  
Low Speed Input Voltage  
Notes:  
Vcc + 0.5  
V
1. Absolute Maximum Ratings are those values beyond which damage to the device may occur if these limits are exceeded for other than a short  
period of time. See Reliability Data Sheet for specific reliability performance.  
2. Between Absolute Maximum Ratings and the Recommended Operating Conditions functional performance is not intended, device reliability is  
not implied, and damage to the device may occur over an extended period of time.  
3. The module supply voltages, V T and V R must not differ by more than 0.5 V or damage to the device may occur.  
CC  
CC  
Table 4. Recommended Operating Conditions  
Parameter  
Supply Voltage  
Data Rate  
Tcase  
Symbol  
Minimum  
2.97  
Maximum  
3.63  
Unit  
V
Notes  
VccT, R  
Note 2  
Note 2  
Note 1, 2  
1.288  
-40  
7.373  
85  
Gb/s  
°C  
Notes:  
1. The Ambient Operating Temperature limitations are based on the Case Operating Temperature limitations and are subject to the host system  
thermal design.  
2. Recommended Operating Conditions are those values for which functional performance and device reliability is implied.  
Table 5. Transceiver Electrical Characteristics  
(T = -40°C to 85°C, VccT, VccR = 3.3 V 10ꢀ)  
C
Parameter  
Symbol  
PSNR  
ICC  
Minimum  
Typical  
Maximum  
Unit Notes  
AC Electrical Characteristics  
Power Supply Noise Rejection (peak-peak)  
DC Electrical Characteristics  
Module Supply Current  
100  
mV  
Note 1  
300 mA @ 70°C  
350 mA @ 85°C  
Power Dissipation  
PDISS  
VOH  
VOL  
1000  
mW  
V
Low Speed Outputs:  
Transmit Fault (TX_FAULT), Loss of Signal  
(RX_LOS), MOD-DEF 2  
2.0  
VccT,R+0.3  
0.6  
Note 2  
Note 3  
V
Low Speed Inputs:  
Transmit Disable (TX_DIS),  
MOD-DEF 1, MOD-DEF 2  
VIH  
VIL  
2.0  
0
Vcc  
0.8  
V
V
Notes:  
1. Filter per SFP specification is required on host board to remove 10 Hz to 2 MHz content.  
2. Pulled up externally with a 4.7k – 10kresistor on the host board to 3.3 V.  
3. Pulled up externally with a 4.7k – 10kresistor on the host board to 3.3 V.  
8
Table 6. Transmitter and Receiver Electrical Characteristics  
(T = -40°C to 85°C, VccT, VccR = 3.3 V 10ꢀ)  
C
Parameter  
Symbol  
Minimum  
Typical  
Maximum  
Unit  
Notes  
High Speed Data Input:  
VI  
180  
1200  
mV  
Note 1  
Transmitter Differential Input Voltage (TD +/-)  
High Speed Data Output:  
Receiver Differential Output Voltage (RD +/-)  
Vo  
DJ  
370  
850  
15  
mV  
ps  
Note 2  
Note 3, 5  
Note 5  
Note 4  
Receiver Contributed Deterministic Jitter  
(2.457 to 7.373 Gb/s)  
Receiver Contributed Total Jitter  
(2.457 to 7.373 Gb/s)  
TJ  
40  
ps  
Receiver Electrical Output Rise & Fall Times  
tr, tf  
30  
85  
ps  
(20-80ꢀ)  
Notes:  
1. Internally AC coupled and terminated (100 Ohm differential).  
2. Internally AC coupled but requires an external load termination (100 Ohm differential).  
3. Contributed DJ is measured on an oscilloscope in average mode with 50ꢀ threshold and K28.5 pattern.  
4. 20ꢀ-80ꢀ electrical rise & fall times measured with a 500 MHz signal utilizing a 1010 data pattern.  
5. Measured at an input optical power of 154W.  
Table 7. Transmitter Optical Characteristics  
(T = -40°C to 85°C, VccT, VccR = 3.3 V 10ꢀ)  
C
Parameter  
Symbol  
Minimum Typical  
Maximum  
Unit  
Notes  
Modulated Optical Output Power (OMA)  
(Peak-to-Peak) (1.288 to 7.373 Gb/s)  
Tx,OMA  
290  
μW  
Note 2  
Average Optical Output Power  
Center Wavelength  
Pout  
-8.4  
dBm  
nm  
nm  
dB  
Note 1, 2  
C  
1260  
1360  
1.0  
-20 dB Spectral Width  
Side Mode Supression  
Optical Rise/Fall Time  
RIN 12 (OMA)  
30  
tr, tf  
RIN  
DJ  
60  
ps  
20ꢀ - 80ꢀ  
-128  
25  
dB/Hz  
ps  
Transmitter Contributed Total Jitter  
(2.457 to 7.373 Gb/s)  
Transmitter Contributed Total Jitter  
(2.457 to 7.373 Gb/s)  
TJ  
50  
ps  
Pout TX_DISABLE Asserted  
Notes:  
POFF  
-35  
dBm  
1. Max Pout is the lesser of Class 1 safety limits (CDRH and EN 60825) or receiver power, max.  
2. Into 9/125 m single-mode optical fiber.  
3. Contributed DJ is measured on an oscilloscope in average mode with 50ꢀ threshold and K28.5 pattern. Contributed TJ is the sum of contributed  
-12  
RJ and contributed DJ. Contributed RJ is calculated for 1x10 BER by multiplying the RMS jitter (measured on a single rise or fall edge) from  
the oscilloscope by 14. Per FC-PI (Table 9 – SM jitter output, note 1), the actual contributed RJ is allowed to increase above its limit if the actual  
contributed DJ decreases below its limits, as long as the component output DJ and TJ remain within their specified FC-PI maximum limits with the  
worst case specified component jitter input.  
9
Table 8. Receiver Optical Characteristics  
(T = -40°C to 85°C, VccT, VccR = 3.3 V 10ꢀ)  
C
Parameter  
Input Optical Power [Overdrive]  
Symbol  
PIN  
Min.  
Typ.  
Max.  
+ 0.5  
Unit  
dBm, avg  
Notes  
Input Optical Modulation Amplitude (Peak-to-Peak)  
(2.457 to 7.373 Gb/s) [Sensitivity]  
OMA  
40  
57  
W, oma  
W, oma  
1X10-12 BER, Note 1  
1X10-15 BER, Note 1  
Return Loss  
12  
dB  
Loss of Signal – Assert  
PA  
13.8  
W, oma  
dBm, oma  
dBm, oma  
dB  
-30  
0.5  
Loss of Signal – De-Assert  
PD  
-16.0  
Loss of Signal Hysteresis  
Notes:  
PD - PA  
1. Input Optical Modulation Amplitude (commonly known as sensitivity) requires a valid 8B/10B encoded input.  
Table 9. Transceiver Timing Characteristics  
(T = -40°C to 85°C, VccT, VccR = 3.3 V 10ꢀ)  
C
Parameter  
Symbol  
Minimum  
Maximum  
Unit  
Notes  
Hardware TX_DISABLE Assert Time  
Hardware TX_DISABLE Negate Time  
Time to initialize, including reset of TX_FAULT  
Hardware TX_FAULT Assert Time  
Hardware TX_DISABLE to Reset  
Hardware RX_LOS DeAssert Time  
Hardware RX_LOS Assert Time  
Software TX_DISABLE Assert Time  
Software TX_DISABLE Negate Time  
Software Tx_FAULT Assert Time  
Software Rx_LOS Assert Time  
Software Rx_LOS De-Assert Time  
Analog parameter data ready  
Serial bus hardware ready  
t_off  
10  
μs  
Note 1  
Note 2  
Note 3  
Note 4  
Note 5  
Note 6  
Note 7  
Note 8  
Note 9  
Note 10  
Note 11  
Note 12  
Note 13  
Note 14  
Note 15  
t_on  
1
ms  
ms  
μs  
t_init  
300  
100  
t_fault  
t_reset  
10  
μs  
t_loss_on  
t_loss_off  
t_off_soft  
t_on_soft  
t_fault_soft  
t_loss_on_soft  
t_loss_off_soft  
t_data  
100  
100  
100  
100  
100  
100  
100  
1000  
300  
10  
μs  
μs  
ms  
ms  
ms  
ms  
ms  
ms  
ms  
ms  
kHz  
t_serial  
Write Cycle Time  
t_write  
Serial ID Clock Rate  
Notes:  
f_serial_clock  
400  
1. Time from rising edge of TX_DISABLE to when the optical output falls below 10ꢀ of nominal.  
2. Time from falling edge of TX_DISABLE to when the modulated optical output rises above 90ꢀ of nominal.  
3. Time from power on or falling edge of Tx_Disable to when the modulated optical output rises above 90ꢀ of nominal.  
4. From power on or negation of TX_FAULT using TX_DISABLE.  
5. Time TX_DISABLE must be held high to reset the laser fault shutdown circuitry.  
6. Time from loss of optical signal to Rx_LOS Assertion.  
7. Time from valid optical signal to Rx_LOS De-Assertion.  
8. Time from two-wire interface assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the optical output falls below 10ꢀ of nominal. Measured from  
falling clock edge after stop bit of write transaction.  
9. Time from two-wire interface de-assertion of TX_DISABLE (A2h, byte 110, bit 6) to when the modulated optical output rises above 90ꢀ of  
nominal.  
10. Time from fault to two-wire interface TX_FAULT (A2h, byte 110, bit 2) asserted.  
11. Time for two-wire interface assertion of Rx_LOS (A2h, byte 110, bit 1) from loss of optical signal.  
12. Time for two-wire interface de-assertion of Rx_LOS (A2h, byte 110, bit 1) from presence of valid optical signal.  
13. From power on to data ready bit asserted (A2h, byte 110, bit 0). Data ready indicates analog monitoring circuitry is functional.  
14. Time from power on until module is ready for data transmission over the serial bus (reads or writes over A0h and A2h).  
15. Time from stop bit to completion of a 1-8 byte write command.  
10  
Table 10. Transceiver Digital Diagnostic Monitor (Real Time Sense) Characteristics  
(T = -40°C to 85°C, VccT, VccR = 3.3 V 10ꢀ)  
C
Parameter  
Symbol  
Min.  
Units Notes  
Transceiver Internal Temperature  
Accuracy  
TINT  
3.0  
°C  
Temperature is measured internal to the transceiver.  
Valid from = -10°C to 85°C case temperature.  
Transceiver Internal Supply  
Voltage Accuracy  
VINT  
0.1  
V
Supply voltage is measured internal to the transceiver  
and can, with less accuracy, be correlated to  
voltage at the SFP Vcc pin. Valid over 3.3 V 10ꢀ.  
Transmitter Laser DC Bias Current  
Accuracy  
IINT  
PT  
10  
IINT is better than 10ꢀ of the nominal value.  
Transmitted Average Optical  
Output Power Accuracy  
3.0  
3.0  
dB  
dB  
Coupled into 9/125 μm single-mode fiber. Valid from  
100 W to 500 W, average.  
Received Optical Input Power  
Accuracy  
PR  
Coupled from 9/125 μm single-mode fiber. Valid from  
30 W to 500 W, average.  
VCCT,R > 2.97 V  
VCCT,R > 2.97 V  
TX_FAULT  
TX_FAULT  
TX_DISABLE  
TX_DISABLE  
TRANSMITTED SIGNAL  
TRANSMITTED SIGNAL  
t_init  
t_init  
t-init: TX DISABLE NEGATED  
VCCT,R > 2.97 V  
t-init: TX DISABLE ASSERTED  
TX_FAULT  
TX_DISABLE  
TX_FAULT  
TX_DISABLE  
TRANSMITTED SIGNAL  
TRANSMITTED SIGNAL  
t_off  
t-off & t-on: TX DISABLE ASSERTED THEN NEGATED  
OCCURANCE OF FAULT  
t_on  
t_init  
INSERTION  
t-init: TX DISABLE NEGATED, MODULE HOT PLUGGED  
OCCURANCE OF FAULT  
TX_FAULT  
TX_DISABLE  
TX_FAULT  
TX_DISABLE  
TRANSMITTED SIGNAL  
TRANSMITTED SIGNAL  
t_fault  
t_reset  
* SFP SHALL CLEAR TX_FAULT IN  
< t_init IF THE FAILURE IS TRANSIENT  
t_init*  
t-fault: TX FAULT ASSERTED, TX SIGNAL NOT RECOVERED  
t-reset: TX DISABLE ASSERTED THEN NEGATED, TX SIGNAL RECOVERED  
OCCURANCE OF FAULT  
TX_FAULT  
OCCURANCE  
OF LOSS  
OPTICAL SIGNAL  
LOS  
TX_DISABLE  
TRANSMITTED SIGNAL  
t_fault  
* SFP SHALL CLEAR TX_FAULT IN  
< t_init IF THE FAILURE IS TRANSIENT  
t_loss_on  
t_loss_off  
t_reset  
t_init*  
t-fault: TX DISABLE ASSERTED THEN NEGATED, TX SIGNAL NOT RECOVERED  
t-loss-on & t-loss-off  
Figure 4. Transceiver timing diagrams (module installed except where noted).  
11  
Table 12. EEPROM Serial ID Memory Contents – Conventional SFP Memory (Address A0h)  
Byte # Data  
Decimal Hex  
Byte #  
Decimal  
Data  
Hex  
Notes  
Notes  
[2]  
[2]  
[2]  
0
1
2
3
03  
04  
07  
00  
SFP physical device  
SFP function defined by serial ID only  
LC optical connector  
37  
38  
39  
40  
00  
17  
6A  
41  
Hex Byte of Vendor OUI  
Hex Byte of Vendor OUI  
Hex Byte of Vendor OUI  
“A- Vendor Part Number ASCII character  
4
5
00  
00  
41  
42  
46  
43  
“F- Vendor Part Number ASCII character  
“C- Vendor Part Number ASCII character  
6
00  
12  
00  
01  
00  
01  
4A  
00  
14  
00  
00  
00  
00  
00  
41  
56  
41  
47  
4F  
20  
20  
20  
20  
43  
44  
45  
46  
47  
48  
41  
54  
50  
5A  
53  
54  
55  
56  
57  
58  
59  
60  
61  
62  
63  
64  
65  
54  
2D  
35  
37  
4A  
37  
41  
54  
50  
5A  
20  
20  
20  
20  
20  
20  
20  
05  
1E  
00  
“T”- Vendor Part Number ASCII character  
“-- Vendor Part Number ASCII character  
“5- Vendor Part Number ASCII character  
“7- Vendor Part Number ASCII character  
“J- Vendor Part Number ASCII character  
“7- Vendor Part Number ASCII character  
“A- Vendor Part Number ASCII character  
“T”- Vendor Part Number ASCII character  
“P- Vendor Part Number ASCII character  
“Z- Vendor Part Number ASCII character  
- Vendor Part Number ASCII character  
- Vendor Part Number ASCII character  
- Vendor Part Number ASCII character  
- Vendor Part Number ASCII character  
- Vendor Part Number ASCII character  
- Vendor Part Number ASCII character  
- Vendor Part Number ASCII character  
7
Long distance  
8
9
Single Mode (SM)  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
Compatible with 8B/10B encoded data  
7400 MBit/sec nominal bit rate (7.373 Gbit/s)  
20 km of single mode fiber @ 7.373 GBit/sec  
“A- Vendor Name ASCII character  
“V- Vendor Name ASCII character  
“A- Vendor Name ASCII character  
“G- Vendor Name ASCII character  
“O- Vendor Name ASCII character  
- Vendor Name ASCII character  
- Vendor Name ASCII character  
- Vendor Name ASCII character  
- Vendor Name ASCII character  
[3]  
Hex Byte of Laser Wavelength  
[3]  
Hex Byte of Laser Wavelength  
[4]  
Checksum for Bytes 0-62  
00  
1A  
Hardware SFP TX_DISABLE, TX_FAULT,  
& RX_LOS  
29  
30  
31  
32  
33  
20  
20  
20  
20  
20  
- Vendor Name ASCII character  
- Vendor Name ASCII character  
- Vendor Name ASCII character  
- Vendor Name ASCII character  
- Vendor Name ASCII character  
66  
00  
00  
67  
[5]  
68-83  
84-91  
92  
Vendor Serial Number ASCII characters  
[6]  
Vendor Date Code ASCII characters  
68  
F0  
01  
Digital Diagnostics, Internal Cal, Rx Pwr  
Avg  
34  
20  
- Vendor Name ASCII character  
- Vendor Name ASCII character  
93  
A/W, Soft SFP TX_DISABLE, TX_FAULT,  
& RX_LOS  
35  
36  
20  
00  
94  
95  
SFF-8472 Compliance to revision 9.3  
[4]  
Checksum for Bytes 64-94  
96 - 255 00  
Notes:  
1. TBD.  
2. The IEEE Organizationally Unique Identifier (OUI) assigned to Avago Technologies is 00-17-6A (3 bytes of hex).  
3. Laser wavelength is represented in 16 unsigned bits. The hex representation of 1310 (nm) is 051E.  
4. Addresses 63 and 95 are checksums calculated (per SFF-8472 and SFF-8074) and stored prior to product shipment.  
5. Addresses 68-83 specify the AFCT-57J7ATPZ ASCII serial number and will vary on a per unit basis.  
6. Addresses 84-91 specify the AFCT-57J7ATPZ ASCII date code and will vary on a per date code basis.  
12  
Table 13: EEPROM Serial ID Memory Contents – Enhanced Feature Set Memory (Address A2h)  
Byte #  
Decimal Notes  
Byte #  
Decimal Notes  
Byte #  
Decimal Notes  
0
1
Temp H Alarm MSB[1]  
26  
27  
Tx Pwr L Alarm MSB[4]  
104  
105  
Real Time Rx average  
MSB[5]  
Temp H Alarm LSB[1]  
Tx Pwr L Alarm LSB[4]  
Real Time Rx average  
LSB[5]  
2
3
4
5
6
Temp L Alarm MSB[1]  
Temp L Alarm LSB[1]  
Temp H Warning MSB[1]  
Temp H Warning LSB[1]  
Temp L Warning MSB[1]  
28  
29  
30  
31  
32  
Tx Pwr H Warning MSB[4]  
Tx Pwr H Warning LSB[4]  
Tx Pwr L Warning MSB[4]  
Tx Pwr L Warning LSB[4]  
Rx Pwr H Alarm MSB[5]  
106  
107  
108  
109  
110  
Reserved  
Reserved  
Reserved  
Reserved  
Status/Control - See  
Table 14  
7
Temp L Warning LSB[1]  
Vcc H Alarm MSB[2]  
Vcc H Alarm LSB[2]  
Vcc L Alarm MSB[2]  
Vcc L Alarm LSB[2]  
33  
Rx Pwr H Alarm LSB[5]  
Rx Pwr L Alarm MSB[5]  
Rx Pwr L Alarm LSB[5]  
Rx Pwr H Warning MSB[5]  
Rx Pwr H Warning LSB[5]  
Rx Pwr L Warning MSB[5]  
Rx Pwr L Warning LSB[5]  
Reserved  
External Calibration Constants[6]  
Checksum for Bytes 0-94[7]  
Real Time Temperature MSB[1]  
Real Time Temperature LSB[1]  
Real Time Vcc MSB[2]  
111  
112  
113  
114  
115  
116  
117  
Reserved  
8
34  
Flag Bits - See Table 15  
Flag Bits - See Table 15  
Reserved  
9
35  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
36  
37  
Reserved  
Vcc H Warning MSB[2]  
Vcc H Warning LSB[2]  
Vcc L Warning MSB[2]  
Vcc L Warning LSB[2]  
Tx Bias H Alarm MSB[3]  
Tx Bias H Alarm LSB[3]  
Tx Bias L Alarm MSB[3]  
Tx Bias L Alarm LSB[3]  
Tx Bias H Warning MSB[3]  
Tx Bias H Warning LSB[3]  
Tx Bias L Warning MSB[3]  
Tx Bias L Warning LSB[3]  
Tx Pwr H Alarm MSB[4]  
Tx Pwr H Alarm LSB[4]  
38  
Flag Bits - See Table 15  
Flag Bits - See Table 15  
39  
40-55  
56-94  
95  
118-127 Reserved  
128-247 Customer Writeable  
248-255 Vendor Specific  
96  
97  
98  
99  
Real Time Vcc LSB[2]  
100  
101  
102  
103  
Real Time Tx Bias MSB[3]  
Real Time Tx Bias LSB[3]  
Real Time Tx Power MSB[4]  
Real Time Tx Power LSB[4]  
25  
Notes:  
1. Temperature (Temp) is decoded as a 16 bit signed twos compliment integer in increments of 1/256°C.  
2. Supply Voltage (Vcc) is decoded as a 16 bit unsigned integer in increments of 100 V.  
3. Laser bias current (Tx Bias) is decoded as a 16 bit unsigned integer in increments of 2 A.  
4. Transmitted average optical power (Tx Pwr) is decoded as a 16 bit unsigned integer in increments of 0.1 W.  
5. Received average optical power (Rx Pwr) is decoded as a 16 bit unsigned integer in increments of 0.1 W.  
6. Bytes 55-94 are not intended for use with AFCT-57J7ATPZ, but have been set to default values per SFF-8472.  
7. Byte 95 is a checksum calculated (per SFF-8472) and stored prior to product shipment.  
13  
Table 14. EEPROM Serial ID Memory Contents – Soft Commands (Address A2h, Byte 110)  
Status/  
Bit #  
Control Name  
TX_ DISABLE State  
Soft TX_ DISABLE  
Reserved  
Description  
Notes  
7
Digital state of SFP TX_ DISABLE Input Pin (1 = TX_DISABLE asserted)  
Read/write bit for changing digital state of TX_DISABLE function  
Note 1  
Note 1, 2  
6
5
4
Reserved  
3
Reserved  
2
TX_FAULT State  
RX_LOS State  
Data Ready (Bar)  
Digital state of the SFP TX_FAULT output pin (1 = TX_FAULT asserted)  
Digital state of the SFP RX_LOS output pin (1 = RX_LOS asserted)  
Indicates transceiver is powered and real time sense data is ready. (0 = Ready)  
Note 1  
Note 1  
Note 1  
1
0
Notes:  
1. The response time for soft commands of the AFCT-57J7ATPZ is 100 msec as specified by the MSA SFF-8472.  
2. Bit 6 is logic OR’d with the SFP TX_DISABLE input pin 3 ... either asserted will disable the SFP transmitter.  
Table 15. EEPROM Serial ID Memory Contents – Alarms and Warnings (Address A2h, Bytes 112, 113, 116, 117)  
Byte  
Bit  
7
Flag Bit Name Description  
Temp High Alarm  
Temp Low Alarm  
112  
Set when transceiver internal temperature exceeds high alarm threshold  
Set when transceiver internal temperature exceeds low alarm threshold  
6
5
Vcc High Alarm  
Set when transceiver internal supply voltage exceeds high alarm threshold  
Set when transceiver internal supply voltage exceeds low alarm threshold  
Set when transceiver laser bias current exceeds high alarm threshold  
Set when transceiver laser bias current exceeds low alarm threshold  
Set when transmitted average optical power exceeds high alarm threshold  
Set when transmitted average optical power exceeds low alarm threshold  
Set when received optical power exceeds high alarm threshold  
4
Vcc Low Alarm  
3
Tx Bias High Alarm  
Tx Bias Low Alarm  
Tx Power High Alarm  
Tx Power Low Alarm  
Rx Power High Alarm  
Rx Power Low Alarm  
Reserved  
2
1
0
113  
116  
7
6
Set when received optical power exceeds low alarm threshold  
0-5  
7
Temp High Warning  
Temp Low Warning  
Vcc High Warning  
Vcc Low Warning  
Set when transceiver internal temperature exceeds high warning threshold  
Set when transceiver internal temperature exceeds low warning threshold  
Set when transceiver internal supply voltage exceeds high warning threshold  
Set when transceiver internal supply voltage exceeds low warning threshold  
Set when transceiver laser bias current exceeds high warning threshold  
Set when transceiver laser bias current exceeds low warning threshold  
Set when transmitted average optical power exceeds high warning threshold  
Set when transmitted average optical power exceeds low warning threshold  
Set when received optical power exceeds high warning threshold  
6
5
4
3
Tx Bias High Warning  
Tx Bias Low Warning  
Tx Power High Warning  
Tx Power Low Warning  
Rx Power High Warning  
Rx Power Low Warning  
Reserved  
2
1
0
117  
7
6
Set when received optical power exceeds low warning threshold  
0-5  
14  
AFCT-57J7ATPZ  
Z
TP  
-57J7A  
T
AFC  
Figure 5. Module drawing.  
15  
X
Y
34.5  
10  
3x  
7.2  
7.1  
10x 1.05 0.01  
0.1 L X A  
S
2.5  
0.85 0.05  
16.25  
MIN. PITCH  
  
1
0.1 S X Y  
2.5  
B
A
1
PCB  
EDGE  
3.68  
5.68  
20  
PIN 1  
10  
8.58  
8.48  
2x 1.7  
11.08  
14.25  
11.93  
16.25  
REF.  
9.6  
4.8  
11  
5
SEE DETAIL 1  
9x 0.95 0.05  
2.0  
11x  
0.1 L X A  
S
11x 2.0  
26.8  
2
10  
3x  
3
41.3  
42.3  
5
3.2  
20x 0.5 0.03  
0.06 L A S B S  
0.9  
LEGEND  
20  
11  
PIN 1  
10.53  
10.93  
1. PADS AND VIAS ARE CHASSIS GROUND  
2. THROUGH HOLES, PLATING OPTIONAL  
11.93  
9.6  
0.8  
TYP.  
10  
3. HATCHED AREA DENOTES COMPONENT  
AND TRACE KEEPOUT (EXCEPT  
CHASSIS GROUND)  
4
4. AREA DENOTES COMPONENT  
KEEPOUT (TRACES ALLOWED)  
2 0.005 TYP.  
0.06 L A S B S  
2x 1.55 0.05  
0.1 L A S B S  
DIMENSIONS ARE IN MILLIMETERS  
DETAIL 1  
Figure 6. SFP host board mechanical layout.  
16  
1.7 0.9  
3.5 0.3  
41.78 0.5  
Tcase REFERENCE POINT  
CAGE ASSEMBLY  
15 MAX.  
11.73 REF  
15.25 0.1  
9.8 MAX.  
10 REF  
(to PCB)  
10.4 0.1  
PCB  
16.25 0.1 MIN. PITCH  
0.4 0.1  
(below PCB)  
DIMENSIONS ARE IN MILLIMETERS  
Figure 7. SFP assembly drawing.  
Customer Manufacturing Processes  
This module is pluggable and is not designed for aqueous  
wash, IR reflow, or wave soldering processes.  
For product information and a complete list of distributors, please go to our web site: www.avagotech.com  
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.  
Data subject to change. Copyright © 2005-2011 Avago Technologies. All rights reserved.  
AV02-1833EN - September 29, 2011  

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