HCNW4504#300E [AVAGO]
1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 0.300 INCH, ROHS COMPLIANT, SURFACE MOUNT, DIP-8;
| 型号： | HCNW4504#300E |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | 1 CHANNEL LOGIC OUTPUT OPTOCOUPLER, 0.300 INCH, ROHS COMPLIANT, SURFACE MOUNT, DIP-8 输出元件 光电 |
| 文件： | 总20页 (文件大小：459K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HCPL-4504/J454/0454,HCNW4504
High CMR,High Speed Optocouplers
DataSheet
Description
Features
The HCPL-4504 and HCPL-0454 contain a GaAsP
LED while the HCPL-J454 and HCNW4504 contain an
AlGaAs LED. The LED is optically coupled to an
integrated high gain photo detector.
• Short propagation delays for TTL and IPM applications
• 15 kV/ µs minimum Common Mode Transient immunity at
V = 1500 V for TTL/ load drive
CM
• High CTR at T = 25°C
A
>25% for HCPL-4504/ 0454
>23% for HCNW4504
>19% for HCPL-J454
The HCPL-4504 series has short propagation delays
and high CTR. The HCPL-4504 series also has a
guaranteed propagation delay difference (tPLH-tPHL).
ThesefeaturesmaketheHCPL-4504seriesanexcellent
solution to IPM inverter dead time and other switching
problems. The CTR, propagation delay, and CMR are
specified both for TTL and IPM conditions which are
provided for ease of application. These single channel,
diode-transistor optocouplers are available in 8-Pin
DIP, SO-8, and Widebody package configurations. An
insulating layer between a LED and an integrated
photodetector provide electrical insulation between
input and output. Separate connections for the
photodiodebiasandoutput-transistorcollectorincrease
the speed up to a hundred times that of a conventional
phototransistor coupler by reducing the base collector
capacitance.
• Electrical specifications for common IPM applications
• TTL compatible
• Guaranteed performance from 0°C to 70°C
• Open collector output
• Safety approval:
UL recognized
– 3750 V rms / 1min. for HCPL-4504/ 0454/ J454
– 5000 V rms / 1min. for HCPL-4504 Option 020 and
HCNW4504
CSA approved
IEC/ EN/ DIN EN 60747-5-2 approved
– VIORM = 560 Vpeak for HCPL-0454 Option 060
– VIORM = 630 Vpeak for HCPL-4504 Option 060
– VIORM = 891 Vpeak for HCPL-J454
– VIORM = 1414 Vpeak for HCNW4504
Functional Diagram
Applications
• Inverter circuits and Intelligent Power Module (IPM)
interfacing:
High Common Mode Transient immunity (> 10 kV/ µs for an
IPM load/ drive) and (tPLH - tPHL) Specified (see Power
Inverter Dead Time section)
8
7
6
5
NC
ANODE
CATHODE
NC
1
2
3
4
V
CC
TRUTH TABLE
NC
LED
V
O
ON
OFF
LOW
HIGH
V
O
• Line receivers:
Short propagation delays and low input-output capacitance
GND
• High speed logic ground isolation:
A 0.1 µF bypass capacitor between
pins 5 and 8 is recommended.
TTL/ TTL, TTL/ CMOS, TTL/ LSTTL
• Replaces pulse transformers:
Save board space and weight
• Analog signal ground isolation:
Integrated photodetector provides improved linearity over
phototransistors
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
Selection Guide
Standard 8-Pin
DIP (300 Mil)
White Mold 8-Pin
DIP (300 Mil)
Widebody
(400 Mil)
Package Type
Small Outline SO8
Part Number
HCPL-4504
HCPL-J454
HCPL-0454
HCNW4504
IEC/ EN/ DIN EN
60747-5-2
V
IORM = 630 Vpeak
(Option 060)
VIORM = 891 Vpeak
V
IORM = 560 Vpeak
(Option 060)
VIORM = 1414 Vpeak
Approval
Schematic
I
CC
8
V
CC
I
F
+
ANODE
2
V
F
I
O
6
5
–
V
O
CATHODE
3
SHIELD
GND
2
Ordering Information
HCPL-0454, HCPL-4504 and HCPL-J454 are UL Recognized with 3750 Vrms for 1 minute per UL1577.
HCNW4504 is UL Recognized with 5000 Vrms for 1 minute per UL1577. HCPL-0454, HCPL-4504,
HCPL-J454 and HCNW4504 are approved under CSA Component Acceptance Notice #5, File CA 88324.
Option
Part
Number
RoHS
non RoHS
Surface Gull
Tape
UL 5000 Vrms/ IEC/ EN/ DIN
Compliant Compliant Package
Mount Wing & Reel 1 Minute rating EN 60747-5-2 Quantity
-000E
-300E
-500E
-020E
no option 300 mil DIP-8
50 per tube
#300
X
X
X
X
50 per tube
1000 per reel
50 per tube
50 per tube
1000 per reel
50 per tube
50 per tube
1000 per reel
50 per tube
50 per tube
1000 per reel
100 per tube
1500 per reel
100 per tube
1500 per reel
42 per tube
42 per tube
750 per reel
#500
X
X
X
#020
X
X
X
HCPL-4504 -320E
-520E
#320
X
X
X
X
#520
-060E
#060
X
X
X
X
X
X
-360E
#360
X
X
X
X
-560E
#560
-000E
no option 300 mil DIP-8
HCPL-J454 -300E
-500E
#300
X
X
X
X
X
X
X
X
#500
X
X
X
-000E
no option SO-8
#500
HCPL-0454 -500E
-060E
#060
X
X
X
X
X
-560E
#560
-000E
no option 400 mil
X
X
X
HCNW4504 -300E
-500E
#300
#500
Widebody
DIP-8
X
X
X
X
X
To order, choose a part number from the part number column and combine with the desired option from the
option column to form an order entry.
Example 1:
HCPL-4504-560E to order product of 300 mil DIP Gull Wing Surface Mount package in Tape and Reel
packaging with IEC/EN/DIN EN 60747-5-2 Safety Approval and RoHS compliant.
Example 2:
HCPL-4504 to order product of 300 mil DIP package in Tube packaging and non RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for
information.
Remarks: The notation ‘#XXX’ is used for existing products, while (new) products launched since July 15,
2001 and RoHS compliant will use ‘–XXXE.’
3
Package Outline Drawings
HCPL-4504 Outline Drawing
7.62 ± 0.25
(0.300 ± 0.010)
9.65 ± 0.25
(0.380 ± 0.010)
8
1
7
6
5
6.35 ± 0.25
(0.250 ± 0.010)
TYPE NUMBER
OPTION CODE*
DATE CODE
A XXXXZ
YYWW
U R
UL
2
3
4
RECOGNITION
1.78 (0.070) MAX.
1.19 (0.047) MAX.
+ 0.076
- 0.051
0.254
5° TYP.
+ 0.003)
- 0.002)
3.56 ± 0.13
(0.140 ± 0.005)
(0.010
4.70 (0.185) MAX.
0.51 (0.020) MIN.
2.92 (0.115) MIN.
DIMENSIONS IN MILLIMETERS AND (INCHES).
1.080 ± 0.320
0.65 (0.025) MAX.
(0.043 ± 0.013)
* MARKING CODE LETTER FOR OPTION NUMBERS
"L" = OPTION 020
"V" = OPTION 060
2.54 ± 0.25
(0.100 ± 0.010)
OPTION NUMBERS 300 AND 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
HCPL-4504 Gull Wing Surface Mount Option 300 Outline Drawing
LAND PATTERN RECOMMENDATION
1.016 (0.040)
9.65 ± 0.25
(0.380 ± 0.010)
6
5
8
1
7
6.350 ± 0.25
(0.250 ± 0.010)
10.9 (0.430)
2.0 (0.080)
2
3
4
1.27 (0.050)
9.65 ± 0.25
(0.380 ± 0.010)
1.780
(0.070)
MAX.
1.19
(0.047)
MAX.
7.62 ± 0.25
(0.300 ± 0.010)
+ 0.076
- 0.051
0.254
3.56 ± 0.13
(0.140 ± 0.005)
+ 0.003)
- 0.002)
(0.010
1.080 ± 0.320
(0.043 ± 0.013)
0.635 ± 0.25
(0.025 ± 0.010)
12° NOM.
0.635 ± 0.130
(0.025 ± 0.005)
2.54
(0.100)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
4
Package Outline Drawings
HCPL-J454 Outline Drawing
7.62 ± 0.25
(0.300 ± 0.010)
9.80 ± 0.25
(0.386 ± 0.010)
8
1
7
6
5
6.35 ± 0.25
(0.250 ± 0.010)
TYPE NUMBER
OPTION CODE*
DATE CODE
A XXXXZ
YYWW
U R
UL
2
3
4
RECOGNITION
1.78 (0.070) MAX.
1.19 (0.047) MAX.
+ 0.076
- 0.051
0.254
5° TYP.
+ 0.003)
- 0.002)
3.56 ± 0.13
(0.140 ± 0.005)
(0.010
4.70 (0.185) MAX.
0.51 (0.020) MIN.
2.92 (0.115) MIN.
DIMENSIONS IN MILLIMETERS AND (INCHES).
1.080 ± 0.320
0.65 (0.025) MAX.
(0.043 ± 0.013)
* MARKING CODE LETTER FOR OPTION NUMBERS
"L" = OPTION 020
"V" = OPTION 060
2.54 ± 0.25
(0.100 ± 0.010)
OPTION NUMBERS 300 AND 500 NOT MARKED.
NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20 mils) MAX.
HCPL-J454 Gull Wing Surface Mount Option 300 Outline Drawing
LAND PATTERN RECOMMENDATION
1.016 (0.040)
9.80 ± 0.25
(0.386 ± 0.010)
6
5
8
1
7
6.350 ± 0.25
(0.250 ± 0.010)
10.9 (0.430)
2.0 (0.080)
2
3
4
1.27 (0.050)
9.65 ± 0.25
(0.380 ± 0.010)
1.780
(0.070)
MAX.
1.19
(0.047)
MAX.
7.62 ± 0.25
(0.300 ± 0.010)
+ 0.076
- 0.051
0.254
3.56 ± 0.13
(0.140 ± 0.005)
+ 0.003)
- 0.002)
(0.010
1.080 ± 0.320
(0.043 ± 0.013)
0.635 ± 0.25
(0.025 ± 0.010)
12° NOM.
0.635 ± 0.130
(0.025 ± 0.005)
2.54
(0.100)
BSC
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.5 mm (20 mils) MAX.
5
HCPL-0454 Outline Drawing (8-Pin Small Outline Package)
LAND PATTERN RECOMMENDATION
8
1
7
2
6
5
4
5.994 ± 0.203
(0.236 ± 0.008)
XXX
YWW
3.937 ± 0.127
(0.155 ± 0.005)
7.49 (0.295)
TYPE NUMBER
(LAST 3 DIGITS)
DATE CODE
3
1.9 (0.075)
PIN ONE
0.406 ± 0.076
(0.016 ± 0.003)
1.270
(0.050)
BSC
0.64 (0.025)
0.432
(0.017)
*
7°
5.080 ± 0.127
(0.200 ± 0.005)
45° X
3.175 ± 0.127
(0.125 ± 0.005)
0 ~ 7°
0.228 ± 0.025
(0.009 ± 0.001)
1.524
(0.060)
0.203 ± 0.102
(0.008 ± 0.004)
TOTAL PACKAGE LENGTH (INCLUSIVE OF MOLD FLASH)
5.207 ± 0.254 (0.205 ± 0.010)
*
0.305
(0.012)
MIN.
DIMENSIONS IN MILLIMETERS (INCHES).
LEAD COPLANARITY = 0.10 mm (0.004 INCHES) MAX.
NOTE: FLOATING LEAD PROTRUSION IS 0.15 mm (6 mils) MAX.
HCNW4504 Outline Drawing (8-Pin Widebody Package)
11.00
MAX.
11.15 ± 0.15
(0.442 ± 0.006)
(0.433)
9.00 ± 0.15
(0.354 ± 0.006)
7
6
5
8
TYPE NUMBER
DATE CODE
A
HCNWXXXX
YYWW
1
3
2
4
10.16 (0.400)
TYP.
1.55
(0.061)
MAX.
7° TYP.
+ 0.076
- 0.0051
0.254
+ 0.003)
- 0.002)
(0.010
5.10
(0.201)
MAX.
3.10 (0.122)
3.90 (0.154)
0.51 (0.021) MIN.
2.54 (0.100)
TYP.
1.78 ± 0.15
(0.070 ± 0.006)
0.40 (0.016)
0.56 (0.022)
DIMENSIONS IN MILLIMETERS (INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
6
HCNW4504 Gull Wing Surface Mount Option 300 Outline Drawing
11.15 ± 0.15
(0.442 ± 0.006)
LAND PATTERN RECOMMENDATION
7
6
5
8
9.00 ± 0.15
(0.354 ± 0.006)
13.56
(0.534)
1
3
2
4
2.29
(0.09)
1.3
(0.051)
12.30 ± 0.30
(0.484 ± 0.012)
1.55
(0.061)
MAX.
11.00
MAX.
(0.433)
4.00
MAX.
(0.158)
1.78 ± 0.15
(0.070 ± 0.006)
1.00 ± 0.15
(0.039 ± 0.006)
0.75 ± 0.25
(0.030 ± 0.010)
+ 0.076
- 0.0051
2.54
(0.100)
BSC
0.254
+ 0.003)
- 0.002)
(0.010
DIMENSIONS IN MILLIMETERS (INCHES).
7° NOM.
LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
NOTE: FLOATING LEAD PROTRUSION IS 0.25 mm (10 mils) MAX.
Solder Reflow Temperature Profile
300
PREHEATING RATE 3°C + 1°C/–0.5°C/SEC.
REFLOW HEATING RATE 2.5°C ± 0.5°C/SEC.
PEAK
TEMP.
245°C
PEAK
TEMP.
240°C
PEAK
TEMP.
230°C
200
100
0
2.5°C ± 0.5°C/SEC.
SOLDERING
TIME
200°C
30
160°C
150°C
140°C
SEC.
30
SEC.
3°C + 1°C/–0.5°C
PREHEATING TIME
150°C, 90 + 30 SEC.
50 SEC.
TIGHT
TYPICAL
LOOSE
ROOM
TEMPERATURE
0
50
100
150
200
250
TIME (SECONDS)
Note: Non-halide flux should be used.
7
Recommended Pb-Free IR Profile
TIME WITHIN 5 °C of ACTUAL
PEAKTEMPERATURE
t
p
20-40 SEC.
260 +0/-5 °C
T
T
p
217 °C
L
RAMP-UP
3 °C/SEC. MAX.
RAMP-DOWN
6 °C/SEC. MAX.
150 - 200 °C
T
smax
T
smin
t
s
t
L
60 to 150 SEC.
PREHEAT
60 to 180 SEC.
25
t 25 °C to PEAK
TIME
NOTES:
THE TIME FROM 25 °C to PEAK TEMPERATURE = 8 MINUTES MAX.
= 200 °C, T = 150 °C
T
smax
smin
Note: Non-halide flux should be used.
Regulatory Information
The devices contained in this data sheet have been approved by the following agencies:
Agency/ Standard
Underwriters
HCPL-4504
HCPL-J454
HCPL-0456
HCNW4504
UL1577
Laboratories (UL)
Recognized under UL1577, Component
Recognition Program, Category FPQU2,
✔
✔
✔
✔
File E55361
Canadian
Standards
Component
Acceptance
Association
(CSA)
File CA88324
Notice # 5
✔
✔
✔
✔
✔
✔
✔
IEC/ EN/ DIN EN 60747-5-2
Approved under:
IEC 60747-5-2:1997 + A1:2002
EN 60747-5-2:2001 + A1:2002
DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01
8
Insulation and Safety Related Specifications
Value
Parameter
Symbol
Units
Conditions
HCPL-4504
HCPL-J454
HCPL-0454
HCNW4504
Minimum External
Air Gap (External
Clearance)
L(101)
7.1
7.4
4.9
9.6
mm Measured from input
terminals to output
terminals, shortest
distance through air.
Minimum External
Tracking (External
Creepage)
L(102)
7.4
8.0
4.8
10.0
1.0
mm Measured from input
terminals to output
terminals, shortest
distance path along
body.
Minimum Internal
Plastic Gap
(Internal Clearance)
0.08
0.5
0.08
mm Through insulation
distance, conductor
to conductor,
usually the direct
distance between the
photoemitter and
photodetector inside
the optocoupler
cavity.
Minimum Internal
Tracking (Internal
Creepage)
NA
NA
NA
4.0
mm Measured from input
terminals to output
terminals, along
internal cavity.
Tracking Resistance
(Comparative
CTI
≥175
≥175
≥175
≥200
Volts DIN IEC 112/ VDE
0303 Part 1
Tracking Index)
Isolation Group
IIIa
IIIa
IIIa
IIIa
Material Group
(DIN VDE 0110,
1/ 89, Table 1)
All Avago data sheets report the
creepage and clearance inherent
to the optocoupler component
itself. These dimensions are
needed as a starting point for the
equipment designer when
However, once mounted on a
printed circuit board, minimum
creepage and clearance
requirements must be met as
specified for individual
equipment standards. For
creepage, the shortest distance
path along the surface of a
printed circuit board between the
solder fillets of the input and
output leads must be considered.
There are recommended
techniques such as grooves and
ribs which may be used on a
printed circuit board to achieve
desired creepage and clearances.
Creepage and clearance distances
will also change depending on
factors such as pollution degree
and insulation level.
determining the circuit insulation
requirements.
9
IEC/ EN/ DIN EN 60747-5-2 Insulation Related Characteristics
HCPL-0454
HCPL-4504
Description
Symbol
OPTION 060 OPTION 060
HCPL-J454
HCNW4504
Unit
Installation classification per
DIN VDE 0110/ 1.89, Table 1
for rated mains voltage ≤150 V rms
for rated mains voltage ≤300 V rms
for rated mains voltage ≤450 V rms
for rated mains voltage ≤600 V rms
for rated mains voltage ≤1000 V rms
I-IV
I-III
I-IV
I-IV
I-III
I-IV
I-IV
I-III
I-III
I-IV
I-IV
I-IV
I-IV
I-III
Climatic Classification
55/ 100/ 21
55/ 100/ 21
55/ 100/ 21
55/ 85/ 21
Pollution Degree (DIN VDE 0110/ 1.89)
Maximum Working Insulation Voltage
Input to Output Test Voltage, Method b*
2
2
2
2
V
560
630
891
1414
V peak
V peak
IORM
V
IORM x 1.875 = V , 100% Production
V
1050
840
1181
945
1670
1336
6000
2652
2121
8000
PR
PR
Test with tm = 1 sec,
Partial Discharge < 5 pC
Input to Output Test Voltage, Method a*
V
IORM x 1.5 = V , Type and Sample
V
V peak
V peak
PR
PR
Test, tm = 60 sec,
Partial Discharge < 5 pC
Highest Allowable Overvoltage*
(Transient Overvoltage, tini = 10 sec)
V
4000
6000
IOTM
Safety Limiting Values - Maximum
Values Allowed in the Event of a Failure,
also see Thermal Derating curve
Case Temperature
Input Current
Output Power
TS
IS,INPUT
PS,OUTPUT
150
150
600
175
230
600
175
400
600
150
400
700
°C
mA
mW
Insulation Resistance at TS,
RS
≥109
≥109
≥109
≥109
Ω
V = 500 V
IO
*Refer to the optocoupler section of the Designer's Catalog, under regulatory information (IEC/ EN/ DIN EN 60747-5-2) for a detailed description of
Method a and Method b partial discharge test profiles.
NOTE: These optocouplers are suitable for "safe electrical isolation" only within the safety limit data.
Maintenance of the safety data shall be ensured by means of protective circuits.
NOTE: Insulation Characteristics are per IEC/EN/DIN EN 60747-5-2.
NOTE: Surface mount classification is Class A in accordance with CECC 00802.
10
Absolute Maximum Ratings
Parameter
Symbol
Device
Min.
-55
Max.
125
Units
°C
Note
Storage Temperature
Operating Temperature
T
S
T
A
HCPL-4504
HCPL-0454
HCPL-J454
-55
100
°C
HCNW4504
-55
85
25
50
Average Forward Input Current
I
mA
mA
1
2
F(AVG)
Peak Forward Input Current
I
HCPL-4504
HCPL-0454
F(PEAK)
(50% duty cycle, 1 ms pulse width)
HCPL-J454
HCNW4504
40
1
Peak Transient Input Current
I
HCPL-4504
HCPL-0454
A
V
F(TRANS)
(≤1 µs pulse width, 300 pps)
HCPL-J454
HCNW4504
0.1
5
Reverse LED Input Voltage (Pin 3-2)
Input Power Dissipation
V
R
HCPL-4504
HCPL-0454
HCPL-J454
HCNW4504
3
P
IN
HCPL-4504
HCPL-0454
45
40
mW
3
HCPL-J454
HCNW4504
Average Output Current (Pin 6)
Peak Output Current
I
8
mA
mA
V
O(AVG)
I
16
O(PEAK)
Supply Voltage (Pin 8-5)
Output Voltage (Pin 6-5)
Output Power Dissipation
V
CC
-0.5
-0.5
30
V
O
20
V
P
O
100
260
mW
°C
4
Lead Solder Temperature
(Through-Hole Parts Only)
T
LS
HCPL-4504
HCPL-J454
1.6 mm below seating plane, 10 seconds
Up to seating plane, 10 seconds
HCNW4504
260
Reflow Temperature Profile
T
RP
HCPL-0454
and
Option 300
See Package Outline
Drawings section
11
Electrical Specifications (DC)
Over recommended temperature (T = 0°C to 70°C) unless otherwise specified. See note 12.
A
Parameter
Current
Transfer Ratio
Symbol
CTR
Device
Min.
25
21
19
13
23
19
26
22
21
16
25
21
Typ.*
32
34
37
39
29
31
35
37
43
45
33
35
Max. Units
Test Conditions
T = 25°C V = 0.4 V
Fig.
1, 2,
4
Note
5
HCPL-4504
HCPL-0454
HCPL-J454
60
%
%
V
IF = 16 mA,
VCC = 4.5 V
A
O
V = 0.5 V
O
60
T = 25°C V = 0.4 V
A
O
V = 0.5 V
O
HCNW4504
60
63
65
T = 25°C V = 0.4 V
A
O
V = 0.5 V
O
CTR
HCPL-4504
HCPL-0454
HCPL-J454
T = 25°C V = 0.4 V
IF = 12 mA,
VCC = 4.5 V
1, 2,
4
5
A
O
V = 0.5 V
O
65
T = 25°C V = 0.4 V
A
O
V = 0.5 V
O
HCNW4504
65
68
T = 25°C V = 0.4 V
A
O
V = 0.5 V
O
Logic Low
Output Voltage
V
OL
HCPL-4504
HCPL-0454
HCPL-J454
0.2
0.4
0.5
0.4
0.5
0.4
0.5
0.5
1
T = 25°C IO = 4.0 mA
IF = 16 mA,
VCC = 4.5 V
A
IO = 3.3 mA
0.2
0.2
T = 25°C IO = 3.6 mA
A
IO = 3.0 mA
HCNW4504
T = 25°C IO = 3.6 mA
A
IO = 3.0 mA
Logic High
Output Current
IOH
0.003
0.01
µA
µA
T = 25°C V = VCC = 5.5 V
IF = 0 mA
5
A
O
T = 25°C V = V = 15 V
A O CC
50
200
Logic Low
Supply Current
ICCL
HCPL-4504
HCPL-0454
HCNW4504
HCPL-J454
50
IF = 16 mA, V = Open, VCC = 15 V
12
12
O
70
0.02
Logic High
ICCH
1
µA
T = 25°C IF = 0 mA, V = Open,
A
O
Supply Current
Input Forward
Voltage
2
VCC = 15 V
T = 25°C IF = 16 mA
V
HCPL-4504
HCPL-0454
HCPL-J454
HCNW4504
HCPL-4504
HCPL-0454
HCPL-J454
HCNW4504
HCPL-4504
HCPL-0454
HCPL-J454
HCNW4504
HCPL-4504
HCPL-0454
HCPL-J454
HCNW4504
1.5
1.7
1.8
1.85
1.95
V
3
F
A
1.45
1.35
5
1.59
T = 25°C IF = 16 mA
A
Input Reverse
Breakdown
Voltage
BV
V
IR = 10 µA
R
3
IR = 100 µA
Temperature
Coefficient of
Forward Voltage
∆V
∆T
A
-1.6
-1.4
60
mV/ °C IF = 16 mA
F
Input
Capacitance
C
IN
pF
f = 1 MHz, V = 0 V
F
70
*All typicals at T = 25°C.
A
12
AC Switching Specifications
Over recommended temperature (TA = 0°C to 70°C) unless otherwise specified.
Parameter
Symbol Device Min.
Typ. Max. Units
Test Conditions
Fig.
Note
Propagation
Delay Time
to Logic Low
at Output
tPHL
0.2
0.3
0.5
T = 25°C
Pulse: f = 20 kHz,
Duty Cycle = 10%,
IF = 16 mA, VCC = 5.0 V,
RL = 1.9 kΩ, CL = 15 pF,
6,
8, 9
A
µs
µs
9
VTHHL = 1.5 V
tPHL
0.2
0.05
0.1
0.5
0.7
1.0
T = 25°C
A
Pulse: f = 10 kHz,
Duty Cycle = 50%,
IF = 12 mA, VCC = 15.0 V,
RL = 20 kΩ, CL = 100 pF,
VTHHL = 1.5 V
6,
10-14
10
HCPL-
J454
Others
Propagation
Delay Time
to Logic
High at
Output
tPLH
0.3
0.5
0.7
T = 25°C
Pulse: f = 20 kHz,
Duty Cycle = 10%,
IF = 16 mA, VCC = 5.0 V,
RL = 1.9 kΩ, CL = 15 pF,
VTHLH = 1.5 V
6,
8, 9
A
µs
µs
9
tPLH
0.3
0.2
0.8
1.1
1.4
T = 25°C
A
Pulse: f = 10 kHz,
Duty Cycle = 50%,
IF = 12 mA, VCC = 15.0 V,
RL = 20 kΩ, CL = 100 pF,
6,
10-14
10
17
VTHLH = 2.0 V
Propagation
Delay
Difference
Between
Any 2 Parts
tPLH-tPHL
-0.4
-0.7
0.3
0.9
1.3
µs
T = 25°C
A
Pulse: f = 10 kHz,
Duty Cycle = 50%,
IF = 12 mA, VCC = 15.0 V,
RL = 20 kΩ, CL = 100 pF,
6,
10-14
VTHHL =1.5V, VTHLH =2.0V
Common
Mode
Transient
Immunity at
Logic High
Level Output
| CMH|
| CMH|
15
15
30
30
kV/ µs T = 25°C
V = 5.0 V, RL = 1.9 kΩ,
CL = 15 pF, IF = 0 mA
A
CC
V
CM
=
7
7
7, 9
1500 V
P-P
kV/ µs
V = 15.0 V, RL = 20 kΩ,
CC
CL = 100 pF, IF = 0 mA
8, 10
Common
Mode
Transient
Immunity at
Logic Low
Level Output
| CML|
| CML|
15
30
30
kV/ µs T = 25°C
V = 5.0 V, RL = 1.9 kΩ,
CL = 15 pF, IF = 16 mA
A
CC
V
CM
=
7
7
7
7, 9
8, 10
8, 10
1500 V
P-P
HCPL-
J454
15
10
15
kV/ µs
kV/ µs
V = 15.0 V, RL = 20 kΩ,
CC
CL = 100 pF, IF = 12 mA
Others
| CML|
30
V = 15.0 V, RL = 20 kΩ,
CC
CL = 100 pF, IF = 16 mA
*All typicals at T = 25°C.
A
13
Package Characteristics
Over recommended temperature (T = 0°C to 25°C) unless otherwise specified.
A
Parameter
Sym.
Device
Min.
Typ.*
Max. Units
Test Conditions
Fig.
Note
Input-Output
Momentary
Withstand
Voltage†
V
ISO
HCPL-4504
HCPL-0454
3750
V rms
RH ≤50%,
t = 1 min.,
T = 25°C
A
6, 13,
16
6, 14,
16
HCPL-J454
3750
5000
5000
HCPL-4504
Option 020
6, 11,
15
HCNW4504
6, 15,
16
Input-Output
Resistance
R
HCPL-4504
HCPL-0454
HCPL-J454
1012
Ω
V
I-O = 500 Vdc
6
6
I-O
HCNW4504
1012
1011
1013
0.6
T = 25°C
A
T = 100°C
A
Capacitance
(Input-Output)
C
I-O
HCPL-4504
HCPL-0454
pF
f = 1 MHz
HCPL-J454
HCNW4504
0.8
0.5
0.6
*All typicals at T = 25°C..
A
†The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage
rating. For the continuous voltage rating refer to the IEC/ EN/ DIN EN 60747-5-2 Insulation Related Characteristics Table (if applicable), your equipment
level safety specification or Avago Application Note 1074 entitled “Optocoupler Input-Output Endurance Voltage.”
Notes:
1. Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/ °C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 0.5 mA/ °C (SO-8).
2. Derate linearly above 70°C free-air temperature at a rate of 1.6 mA/ °C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 1.0 mA/ °C (SO-8).
3. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/ °C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 1.1 mW/ °C (SO-8).
4. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/ °C (8-Pin DIP).
Derate linearly above 85°C free-air temperature at a rate of 2.3 mW/ °C (SO-8).
5. CURRENT TRANSFER RATIO in percent is defined as the ratio of output collector current, IO, to the forward LED input current, IF, times 100.
6. Device considered a two-terminal device: Pins 1, 2, 3, and 4 shorted together and Pins 5, 6, 7, and 8 shorted together.
7. Under TTL load and drive conditions: Common mode transient immunity in a Logic High level is the maximum tolerable (positive) dVCM/ dt on the
leading edge of the common mode pulse, VCM, to assure that the output will remain in a Logic High state (i.e., V > 2.0 V). Common mode transient
O
immunity in a Logic Low level is the maximum tolerable (negative) dVCM/ dt on the trailing edge of the common mode pulse signal, VCM, to assure
that the output will remain in a Logic Low state (i.e., VO < 0.8 V).
8. Under IPM (Intelligent Power Module) load and LED drive conditions: Common mode transient immunity in a Logic High level is the maximum
tolerable dVCM/ dt on the leading edge of the common mode pulse, V , to assure that the output will remain in a Logic High state (i.e., VO > 3.0 V).
CM
Common mode transient immunity in a Logic Low level is the maximum tolerable dVCM/ dt on the trailing edge of the common mode pulse signal,
V
CM, to assure that the output will remain in a Logic Low state (i.e., V < 1.0 V).
O
9. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and the 5.6 kΩ pull-up resistor.
10. The RL = 20 kΩ, CL = 100 pF load represents an IPM (Intelligent Power Module) load.
11. See Option 020 data sheet for more information.
12. Use of a 0.1 µF bypass capacitor connected between Pins 5 and 8 is recommended.
13. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥4500 V rms for 1 second (leakage detection
current limit, Ii-o ≤5 µA).
14. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥4500 V rms for 1 second (leakage detection
current limit, Ii-o ≤ 5 µA).
15. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage ≥6000 V rms for 1 second (leakage detection
current limit, Ii-o ≤5 µA).
16. This test is performed before the 100% Production test shown in the VDE 0884 Insulation Related Characteristics Table, if applicable.
17. The difference between tPLH and tPHL between any two devices (same part number) under the same test condition. (See Power Inverter Dead Time
and Propagation Delay Specifications section.)
14
HCNW4504
HCPL-4504/0454
HCPL-J454
= 25° C
25
20
15
10
40 mA
35 mA
T
= 25°C
T = 25°C
A
CC
A
T
V
A
10
20
18
16
14
12
10
8
V
= 5.0 V
V
= 5.0 V
CC
= 5.0 V
CC
40 mA
35 mA
40 mA
35 mA
30 mA
25 mA
20 mA
30 mA
25 mA
20 mA
30 mA
25 mA
20 mA
5
15 mA
10 mA
15 mA
10 mA
15 mA
10 mA
6
5
0
4
I
= 5 mA
F
I
= 5 mA
F
2
0
I
= 5 mA
F
0
0
20
0
20
10
– OUTPUT VOLTAGE – V
10
V – OUTPUT VOLTAGE – V
O
0
5
10
15
20
V
– OUTPUT VOLTAGE – V
O
V
O
Figure 1. DC and pulsed transfer characteristics.
HCPL-J454
HCPL-4504/0454
1.5
HCNW4504
NORMALIZED
2.0
1.5
1.0
0.5
0
NORMALIZED
2.0
1.6
1.2
0.8
0.4
0
I
= 16 mA
F
I
= 16 mA
F
V
= 0.4 V
= 5.0 V
O
V
V
= 0.4 V
O
V
CC
= 5.0 V
CC
T
= 25°C
1.0
A
T
= 25° C
A
0.5
0.0
NORMALIZED
= 16 mA
I
F
V
= 0.4 V
O
V
= 5.0 V
= 25°C
CC
T
A
0
2
4
I
6
8 10 12 14 16 18 20 22 24 26
0
5
10
15
20
I – INPUT CURRENT – mA
F
25
0
5
10
15
20
25
I
– INPUT CURRENT – mA
– INPUT CURRENT – mA
F
F
Figure 2. Current transfer ratio vs. input current.
HCPL-4504/0454
1000
HCPL-J454/HCNW4504
= 25°C
1000
100
10
T
A
100
I
I
F
F
T
A
= 25°C
+
+
10
1.0
V
–
V
F
F
–
1.0
0.1
0.1
0.01
0.001
0.01
0.001
1.1
1.2
1.3
1.4
1.5
1.6
1.2
1.3
1.4
1.5
1.6
1.7
V
– FORWARD VOLTAGE – VOLTS
V
– FORWARD VOLTAGE – VOLTS
F
F
Figure 3. Input current vs. forward voltage.
15
HCPL-4504/0454
HCPL-J454
HCNW4504
NORMALIZED
1.05
1.0
1.1
1.0
1.05
1.0
NORMALIZED
= 16 mA
I
= 16 mA
F
I
F
O
CC
A
V
= 0.4 V
= 5.0 V
O
V
V
T
= 0.4 V
= 5.0 V
= 25° C
V
CC
T
= 25°C
A
0.9
0.8
0.7
0.6
NORMALIZED
= 16 mA
0.95
0.9
0.95
0.9
I
F
V
= 0.4 V
O
V
= 5.0 V
CC
= 25°C
T
A
0.85
0.85
-60 -40 -20
0
20 40 60 80 100 120
-60 -40 -20
0
20 40 60 80 100 120
T – TEMPERATURE – °C
A
-60 -40 -20
0
20 40 60 80 100
T
– TEMPERATURE – °C
T
– TEMPERATURE – °C
A
A
Figure 4. Current transfer ratio vs. temperature.
4
10
3
10
I
= 0 mA
F
V
O
= V = 5.0 V
CC
2
10
1
0
10
10
-1
10
10
-2
-60 -40 -20
0
20 40 60 80 100 120
T
– TEMPERATURE – °C
A
Figure 5. Logic high output current vs. temperature.
I
F
I
F
PULSE
GEN.
8
7
6
5
1
2
3
4
V
CC
0
Z
t
= 50 Ω
= 5 ns
O
r
R
V
L
CC
V
O
V
O
V
V
THLH
THHL
0.1µF
V
I
MONITOR
F
OL
C
L
R
M
t
t
PHL
PLH
Figure 6. Switching test circuit.
8
7
6
5
V
CC
1
2
3
4
V
CM
90% 90%
I
F
0 V
10%
10%
R
L
t
r
A
t
f
B
V
O
0.1µF
V
V
O
CC
SWITCH AT A: I = 0 mA
F
C
L
V
FF
V
V
O
V
CM
OL
+
–
SWITCH AT B: I = 12 mA, 16 mA
F
PULSE GEN.
Figure 7. Test circuit for transient immunity and typical waveforms.
16
HCPL-4504/0454
= 5.0 V
HCPL-J454/HCNW4504
= 5.0 V
0.50
0.45
0.50
0.45
1.4
1.2
1.0
0.8
V
V
= 5.0 V
= 25° C
= 15 pF
= V
V
CC
CC
CC
R
= 1.9 kΩ
= 15 pF
= V
T
R
= 1.9 kΩ
= 15 pF
= V
L
A
L
C
V
C
V
C
V
L
L
L
0.40
0.40
= 1.5 V
= 1.5 V
THLH
= 1.5 V
THLH
THHL
THLH
THHL
THHL
t
t
PLH
PLH
10% DUTY CYCLE
10% DUTY CYCLE
10% DUTY CYCLE
t
0.35
0.30
0.25
0.35
0.30
0.25
PLH
t
PHL
t
0.6
0.4
0.2
0.0
PHL
I
= 10 mA
= 16 mA
F
t
PHL
I
F
0.20
0.20
I
= 10 mA
= 16 mA
I
= 10 mA
= 16 mA
F
F
0.15
0.10
0.15
0.10
I
I
F
F
-60 -40 -20
0
20 40 60 80 100 120
-60 -40 -20
0
20 40 60 80 100
120
0
2
4
6
8
– LOAD RESISTANCE – kΩ
L
10 12 14 16 18 20
R
T
– TEMPERATURE – °C
T
– TEMPERATURE – °C
A
A
Figure 8. Propagation delay time vs. temperature.
Figure 9. Propagation delay time vs. load
resistance.
HCPL-4504/0454
HCPL-J454/HCNW4504
1.1
2.6
2.4
1.1
1.0
V
= 15.0 V
I
= 10 mA
= 16 mA
V
= 5.0 V
= 25° C
= 100 pF
V
R
= 15.0 V
= 20 kΩ
I
= 10 mA
I = 16 mA
F
CC
F
CC
CC
L
F
R
= 20 kΩ
I
T
1.0
0.9
L
F
A
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
C = 100 pF
C
C = 100 pF
L
L
L
0.9
V
= 1.5 V
= 2.0 V
V
= 1.5 V
= 2.0 V
V
V
= 1.5 V
= 2.0 V
50% DUTY CYCLE
THHL
THLH
THHL
THHL
THLH
t
t
PLH
PLH
V
V
THLH
0.8
0.7
0.6
0.8
0.7
0.6
50% DUTY CYCLE
50% DUTY CYCLE
t
PLH
I
= 10 mA
I = 16 mA
F
F
t
PHL
8
0.5
0.5
t
t
PHL
PHL
0.4
0.3
0.4
0.3
0.2
0.0
-60 -40 -20
0
20 40
-60 -40 -20
0
20 40
60 80 100 120
60 80 100 120
T – TEMPERATURE – °C
A
0
2
4
6
10 12 14 16 18 20
T
– TEMPERATURE – °C
R – LOAD RESISTANCE – kΩ
A
L
Figure 10. Propagation delay time vs. load
resistance.
Figure 11. Propagation delay time vs. temperature.
17
1.8
1.6
3.5
3.0
2.5
2.0
1.5
1.0
0.5
1.2
1.1
1.0
V
= 15.0 V
V
= 15.0 V
= 25° C
T
R
= 25° C
= 20 kΩ
C = 100 pF
L
CC
= 25° C
CC
A
L
t
PLH
PHL
T
T
A
A
C = 100 pF
R = 20 kΩ
L
L
1.4
V
V
= 1.5 V
= 2.0 V
V
= 1.5 V
= 2.0 V
V
V
= 1.5 V
THHL
THLH
THHL
THLH
THHL
0.9
0.8
0.7
V
= 2.0 V
1.2
1.0
0.8
0.6
0.4
THLH
t
PLH
50% DUTY CYCLE
50% DUTY CYCLE
50% DUTY CYCLE
t
PLH
t
t
0.6
0.5
0.4
0.3
0.2
PHL
t
PHL
I
= 10 mA
= 16 mA
F
I
I
= 10 mA
= 16 mA
F
I
I
= 10 mA
= 16 mA
F
F
I
0.2
0.0
F
F
0.0
0
100 200 300 400 500 600 700 800 9001000
– LOAD CAPACITANCE – pF
10 11 12 13 14 15 16 17 18 19 20
– SUPPLY VOLTAGE – V
0
5
10 15 20 25 30 35 40 45 50
C
R
– LOAD RESISTANCE – kΩ
V
CC
L
L
Figure 12. Propagation delay time vs. load
resistance.
Figure 13. Propagation delay time vs. load
capacitance.
Figure 14. Propagation delay time vs. supply
voltage.
HCPL-4504 OPTION 060/HCPL-J454
800
HCPL-0454 OPTION 060/HCNW4504
1000
P
(mW) for HCNW4504
S
P
(mW)
S
900
800
700
600
500
400
300
I
P
(mA) for HCNW4504
S
700
600
500
400
300
I
I
(mA) for HCPL-4504
OPTION 060
(mA) for HCPL-J454
S
(mW) for HCPL-0454
S
OPTION 060
(mA) for HCPL-0454
S
I
S
OPTION 060
(230)
200
200
(150)
100
100
0
0
0
25 50 75 100 125 150 175 200
– CASE TEMPERATURE – °C
0
25
50 75 100 125 150 175
T
T – CASE TEMPERATURE – °C
S
S
Figure 15. Thermal derating curve, dependence of safety limiting valve with case temperature
per IEC/ EN/ DIN EN 60747-5-2.
18
+HV
Power Inverter Dead Time and
Propagation Delay Specifications
+
HCPL-4504/0454/J454
HCNW4504
8
7
6
The HCPL-4504/0454/J454 and
HCNW4504 include a specifica-
tion intended to help designers
minimize “dead time” in their
power inverter designs. The new
“propagation delay difference”
specification (tPLH - tPHL) is useful
for determining not only how
much optocoupler switching delay
is needed to prevent “shoot-
through” current, but also for
determining the best achievable
worst-case dead time for a given
design.
2
3
LED 1
BASE/GATE
DRIVE CIRCUIT
Q1
OUT 1
5
+
HCPL-4504/0454/J454
HCNW4504
8
7
6
2
3
LED 2
BASE/GATE
DRIVE CIRCUIT
Q2
OUT 2
5
When inverter power transistors
switch (Q1 and Q2 in Figure 17),
it is essential that they never
conduct at the same time.
–HV
Figure 16. Typical power inverter.
Extremely large currents will flow
if there is any overlap in their
conduction during switching
transitions, potentially damaging
the transistors and even the sur-
rounding circuitry. This “shoot-
through” current is eliminated by
delaying the turn-on of one
LED 1
OUT 1
transistor (Q2) long enough to
ensure that the opposing
transistor (Q1) has completely
turned off. This delay introduces a
small amount of “dead time” at
the output of the inverter during
which both transistors are off
during switching transitions.
Minimizing this dead time is an
important design goal for an
inverter designer.
t
PLH min
(t
–t )
PLH max PLH min
t
PLH max
TURN-ON DELAY
–t
(t
)
PLH max PLH min
LED 2
OUT 2
The amount of turn-on delay
needed depends on the propaga-
tion delay characteristics of the
optocoupler, as well as the
characteristics of the transistor
base/gate drive circuit. Consider-
ing only the delay characteristics
of the optocoupler (the charac-
teristics of the base/gate drive
circuit can be analyzed in the
same way), it is important to
t
PHL min
(t
–t
)
PHL max PHL min
t
PHL max
MAXIMUM DEAD TIME
Figure 17. LED delay and dead time diagram.
19
which is the maximum minus the
minimum data sheet values of
(tPLH-tPHL). The difference
know the minimum and
maximum data sheet value for the
propagation delay difference
specification, (tPLH - tPHL). The
HCPL-4504/0454/J454 and
HCNW4504 specify a maximum
(tPLH - tPHL) of 1.3 µs over an
operating temperature range
of 0-70°C.
maximum turn-on (tPHL) and
turnoff (tPLH) propagation delay
specifications, preferably over the
desired operating temperature
range. The importance of these
specifications is illustrated in
Figure 17. The waveforms labeled
“LED1”, “LED2”, “OUT1”, and
“OUT2” are the input and output
voltages of the optocoupler
between the maximum and
minimum values depends directly
on the total spread in propagation
delays and sets the limit on how
good the worst-case dead time can
be for a given design. Therefore,
optocouplers with tight
propagation delay specifications
(and not just shorter delays or
lower pulse-width distortion) can
achieve short dead times in power
inverters. The
Although (tPLH-tPHL max tells the
)
designer how much delay is
circuits driving Q1 and Q2
needed to prevent shoot-through
current, it is insufficient to tell the
designer how much dead time a
design will have. Assuming that
the optocoupler turn-on delay is
respectively. Most inverters are
designed such that the power
transistor turns on when the
optocoupler LED turns on; this
ensures that both power
transistors will be off in the event
of a power loss in the control
circuit. Inverters can also be
designed such that the power
transistor turns off when the
optocoupler LED turns on; this
type of design, however, requires
additional fail-safe circuitry to
turn off the power transistor if an
over-current condition is
HCPL-4504/0454/J454 and
HCNW4504 specify a minimum
(tPLH - tPHL) of -0.7 µs over an
operating temperature range of
0-70°C, resulting in a maximum
dead time of 2.0 µs when the LED
turn-on delay is equal to
exactly equal to (tPLH - tPHL max,
)
the minimum dead time is zero
(i.e., there is zero time between
the turnoff of the very slowest
optocoupler and the turn-on of
the very fastest optocoupler).
(tPLH-tPHL max, or 1.3 µs.
)
Calculating the maximum dead
time is slightly more complicated.
Assuming that the LED turn-on
delay is still exactly equal to
It is important to maintain
accurate LED turn-on delays
because delays shorter than (tPLH
-
tPHL max may allow shoot-
)
detected. The timing illustrated in
Figure 17 assumes that the power
transistor turns on when the
optocoupler LED turns on.
(tPLH - tPHL)max, it can be seen in
through currents, while longer
delays will increase the worst-
case dead time.
Figure 17 that the maximum dead
time is the sum of the maximum
difference in turn-on delay plus
the maximum difference in
turnoff delay,
The LED signal to turn on Q2
should be delayed enough so that
an optocoupler with the very
fastest turn-on propagation delay
(tPHLmin) will never turn on before
an optocoupler with the very
slowest turn-off propagation delay
(tPLHmax) turns off. To ensure this,
the turn-on of the optocoupler
should be delayed by an amount
no less than (tPLHmax - tPHLmin),
which also happens to be the
[(tPLHmax-tPLHmin)+(tPHLmax-tPHLmin)].
This expression can be
rearranged to obtain
[(tPLHmax-tPHLmin)-(tPHLmin-tPHLmax)],
and further rearranged to obtain
[(tPLH-tPHL max-(tPLH-tPHL)min],
)
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Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies Limited in the United States and other countries.
Data subject to change. Copyright © 2007 Avago Technologies Limited. All rights reserved. Obsoletes 5989-2114EN
AV01-0552EN July 10, 2007
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