HSMS-282P-TR1 [AVAGO]
SILICON, MIXER DIODE;
| 型号： | HSMS-282P-TR1 |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | SILICON, MIXER DIODE 测试 光电二极管 |
| 文件： | 总14页 (文件大小：196K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HSMS-282x
Surface Mount RF Schottky Barrier Diodes
Data Sheet
Description/Applications
Features
•
Low Turn-On Voltage
These Schottky diodes are specifically designed for
both analog and digital applications. This series offers
a wide range of specifications and package configura-
tionstogivethedesignerwideflexibility. Typicalappli-
cations of these Schottky diodes are mixing, detecting,
switching, sampling, clamping, and wave shaping. The
HSMS-282xseriesofdiodesisthebestall-aroundchoice
for most applications, featuring low series resistance,
low forward voltage at all current levels and good RF
characteristics.
(As Low as 0.34 V at 1 mA)
Low FIT (Failure in Time) Rate*
Six-sigma Quality Level
•
•
•
•
Single, Dual and Quad Versions
Unique Configurations in Surface Mount SOT-363 Package
– increase flexibility
– save board space
– reduce cost
•
HSMS-282K Grounded Center Leads Provide up to 10 dB
Higher Isolation
Note that Avago’s manufacturing techniques assure
that dice found in pairs and quads are taken from
adjacentsitesonthewafer, assuringthehighestdegree
of match.
•
•
Matched Diodes for Consistent Performance
Better Thermal Conductivity for Higher Power Dissipation
• Lead-free Option Available
*
For more information see the Surface Mount Schottky Reliability
Data Sheet.
Package Lead Code Identification,
SOT-23/SOT-143 (Top View)
Package Lead Code Identification, SOT-363
(Top View)
COMMON
ANODE
3
COMMON
CATHODE
3
HIGH ISOLATION
UNCONNECTED
TRIO
SINGLE
3
SERIES
3
UNCONNECTED PAIR
6
5
4
6
5
4
1
2
1
2
1
2
1
2
1
2
3
1
2
3
#4
#0
#2
#3
K
L
COMMON
CATHODE QUAD
UNCONNECTED
PAIR
RING
BRIDGE
QUAD
CROSS-OVER
QUAD
COMMON
QUAD
ANODE QUAD
6
1
6
1
5
4
6
1
6
1
5
4
3
4
3
4
3
4
3
4
1
2
1
2
1
2
1
2
2
3
2
3
#5
#7
#8
#9
M
N
BRIDGE
QUAD
RING
QUAD
5
4
5
4
Package Lead Code Identification, SOT-323
(Top View)
2
3
2
3
P
R
SERIES
SINGLE
B
C
COMMON
ANODE
COMMON
CATHODE
E
F
2
Absolute Maximum Ratings[1] TC = 25°C
Pin Connections and Package
Marking
Symbol Parameter
Unit
SOT-23/SOT-143
SOT-323/SOT-363
If
Forward Current (1 µs Pulse)
Amp
V
1
15
1
15
1
2
6
5
4
PIV
Tj
Peak Inverse Voltage
Junction Temperature
Storage Temperature
Thermal Resistance[2]
°C
°C
°C/W
150
150
Tstg
θjc
-65 to 150
500
-65 to 150
150
3
Notes:
Notes:
1. Operation in excess of any one of these conditions may result in permanent damage to the
device.
1. Package marking provides
orientation and identification.
2. See “Electrical Specifications” for
appropriate package marking.
2.
TC = +25°C, where TC is defined to be the temperature at the package pins where contact is made
to the circuit board.
Electrical Specifications TC = 25°C, Single Diode[3]
Maximum Maximum
Minimum
Breakdown
Voltage
Maximum
Forward
Voltage
Forward
Voltage
VF (V) @
IF (mA)
Reverse
Leakage
Typical
Dynamic
Part
Package
Maximum
Number Marking Lead
IR (nA) @ Capacitance Resistance
VR (V)
HSMS[4]
Code
Code Configuration
VBR (V)
VF (mV)
CT (pF)
RD (Ω)[5]
2820
2822
2823
2824
2825
2827
2828
2829
282B
282C
282E
282F
282K
C0
C2
C3
C4
C5
C7
C8
C9
C0
C2
C3
C4
CK
0
2
3
4
5
7
8
9
B
C
E
F
Single
Series
15
340
0.5 10
100
1
1.0
12
Common Anode
Common Cathode
Unconnected Pair
Ring Quad[4]
Bridge Quad[4]
Cross-over Quad
Single
Series
Common Anode
Common Cathode
High Isolation
Unconnected Pair
Unconnected Trio
Common Cathode Quad
Common Anode Quad
Bridge Quad
K
282L
282M
282N
282P
282R
CL
HH
NN
CP
L
M
N
P
OO
R
Ring Quad
Test Conditions
IR = 100 mA
IF = 1 mA[1]
VF = 0 V
IF = 5 mA
f = 1 MHz[2]
Notes:
1. ∆VF for diodes in pairs and quads in 15 mV maximum at 1 mA.
2. ∆CTO for diodes in pairs and quads is 0.2 pF maximum.
3. Effective Carrier Lifetime (τ) for all these diodes is 100 ps maximum measured with Krakauer method at 5 mA.
4. See section titled “Quad Capacitance.”
5. RD = RS + 5.2Ω at 25°C and If = 5 mA.
3
In a quad, the diagonal capaci-
tance is the capacitance between
points A and B as shown in the
figure below. The diagonal
capacitance is calculated using
the following formula
The equivalent adjacent
capacitance is the capacitance
between points A and C in the
figure below. This capacitance is
calculated using the following
formula
Quad Capacitance
Capacitance of Schottky diode
quads is measured using an
HP4271 LCR meter. This
instrument effectively isolates
individual diode branches from
the others, allowing accurate
capacitance measurement of each
branch or each diode. The
conditions are: 20 mV R.M.S.
voltage at 1 MHz. Avago defines
this measurement as “CM”, and it
is equivalent to the capacitance of
the diode by itself. The equivalent
diagonal and adjacent capaci-
tances can then be calculated by
the formulas given below.
C1 x C2
C3 x C4
1
CDIAGONAL = _______ + _______
CADJACENT = C1 + ____________
1
1
1
C1 + C2 C3 + C4
–– + –– + ––
C2 C3 C4
A
B
C1
C2
C3
This information does not apply
to cross-over quad diodes.
C
C4
Linear Equivalent Circuit Model
Diode Chip
SPICE Parameters
R
Parameter
Units
HSMS-282x
j
BV
CJ0
EG
IBV
IS
V
pF
eV
A
15
0.7
R
S
0.69
1E-4
2.2E-8
1.08
6.0
A
C
j
N
RS = series resistance (see Table of SPICE parameters)
RS
PB
PT
M
Ω
V
0.65
2
Cj = junction capacitance (see Table of SPICE parameters)
8.33 X 10-5 nT
Rj =
Ib + Is
0.5
where
Ib = externally applied bias current in amps
Is = saturation current (see table of SPICE parameters)
T = temperature, °K
n = ideality factor (see table of SPICE parameters)
Note:
To effectively model the packaged HSMS-282x product,
please refer to Application Note AN1124.
ESD WARNING:
Handling Precautions Should Be Taken To Avoid Static Discharge.
4
Typical Performance, TC = 25°C (unless otherwise noted), Single Diode
1
100,000
100
TA = +125°C
A = +75°C
TA = +25°C
T
0.8
10,000
10
TA = –25°C
0.6
0.4
1000
100
1
0.1
TA = +125°C
TA = +75°C
TA = +25°C
0.2
0
10
1
0.01
0
2
4
6
8
0
5
10
15
0
0.10
0.20
0.30
0.40
0.50
V
– REVERSE VOLTAGE (V)
V
– REVERSE VOLTAGE (V)
V
– FORWARD VOLTAGE (V)
R
R
F
Figure 3. Total Capacitance vs.
Reverse Voltage.
Figure 2. Reverse Current vs.
Reverse Voltage at Temperatures.
Figure 1. Forward Current vs.
Forward Voltage at Temperatures.
1000
100
30
30
10
100
1.0
I
(Left Scale)
10
F
I
(Left Scale)
F
10
10
1
∆V (Right Scale)
F
1
1
∆V (Right Scale)
F
0.3
0.2
0.3
1
0.10
0.1
0.25
0.1
1
10
100
0.4
0.6
0.8
1.0
1.2
1.4
0.15
V - FORWARD VOLTAGE (V)
F
0.20
I
– FORWARD CURRENT (mA)
V
- FORWARD VOLTAGE (V)
F
F
Figure 4. Dynamic Resistance vs.
Forward Current.
Figure 5. Typical V Match, Series Pairs
f
and Quads at Mixer Bias Levels.
Figure 6. Typical V Match, Series Pairs
f
at Detector Bias Levels.
1
10
1
10
9
DC bias = 3 µA
-25°C
+25°C
+75°C
0.1
0.1
0.01
8
18 nH HSMS-282B
HSMS-282B
100 pF
+25°C
RF in
Vo
RF in
Vo
0.001
0.01
3.3 nH
7
68 Ω
100 pF
0.0001
1E-005
100 KΩ
4.7 KΩ
0.001
6
-40
-30
-20
-10
0
-20
-10
0
10
20
30
0
2
4
6
8
10
12
P
– INPUT POWER (dBm)
P
in
– INPUT POWER (dBm)
LOCAL OSCILLATOR POWER (dBm)
in
Figure 7. Typical Output Voltage vs.
Input Power, Small Signal Detector
Operating at 850 MHz.
Figure 8. Typical Output Voltage vs.
Input Power, Large Signal Detector
Operating at 915 MHz.
Figure 9. Typical Conversion Loss vs.
L.O. Drive, 2.0 GHz (Ref AN997).
5
need very low flicker noise. The
HSMS-285x is a family of zero bias
detector diodes for small signal
applications. For high frequency
detector or mixer applications,
use the HSMS-286x family. The
HSMS-270x is a series of specialty
diodes for ultra high speed
clipping and clamping in digital
circuits.
Applications Information
Product Selection
Avago’s family of surface mount
Schottky diodes provide unique
solutions to many design prob-
lems. Each is optimized for
certain applications.
0.026
≈ ––––– at 25°C
IS + Ib
where
n = ideality factor (see table of
SPICE parameters)
T = temperature in °K
IS = saturation current (see
table of SPICE parameters)
Ib = externally applied bias
current in amps
Rv = sum of junction and series
resistance, the slope of the
V-I curve
The first step in choosing the right
product is to select the diode type.
All of the products in the
Schottky Barrier Diode Characteristics
Stripped of its package, a
Schottky barrier diode chip
consists of a metal-semiconductor
barrier formed by deposition of a
metal layer on a semiconductor.
The most common of several
different types, the passivated
diode, is shown in Figure 10,
along with its equivalent circuit.
HSMS-282x family use the same
diode chip–they differ only in
package configuration. The same
is true of the HSMS-280x, -281x,
285x, -286x and -270x families.
Each family has a different set of
characteristics, which can be
compared most easily by consult-
ing the SPICE parameters given
on each data sheet.
I is a function of diode barrier
S
height, and can range from
picoamps for high barrier diodes
to as much as 5 µA for very low
barrier diodes.
The Height of the Schottky Barrier
The current-voltage characteristic
of a Schottky barrier diode at
room temperature is described by
the following equation:
R is the parasitic series resis-
S
The HSMS-282x family has been
optimized for use in RF applica-
tions, such as
tance of the diode, the sum of the
bondwire and leadframe resis-
tance, the resistance of the bulk
layer of silicon, etc. RF energy
ꢀ
DC biased small signal
detectors to 1.5 GHz.
V - IRS
–––––
0.026
coupled into R is lost as heat—it
S
I = IS (e
– 1)
does not contribute to the recti-
ꢀ
Biased or unbiased large
signal detectors (AGC or
power monitors) to 4 GHz.
fied output of the diode. C is
J
parasitic junction capacitance of
the diode, controlled by the thick-
ness of the epitaxial layer and the
diameter of the Schottky contact.
On a semi-log plot (as shown in
the Avago catalog) the current
graph will be a straight line with
inverse slope 2.3 X 0.026 = 0.060
volts per cycle (until the effect of
ꢀ
Mixers and frequency
multipliers to 6 GHz.
R is the junction resistance of the
j
The other feature of the
HSMS-282x family is its
diode, a function of the total
current flowing through it.
unit-to-unit and lot-to-lot consis-
tency. The silicon chip used in this
series has been designed to use
the fewest possible processing
steps to minimize variations in
diode characteristics. Statistical
data on the consistency of this
product, in terms of SPICE
parameters, is available from
Avago.
8.33 X 10-5 n T
Rj = –––––––––––– = RV – Rs
IS + Ib
R
S
METAL
PASSIVATION
PASSIVATION
N-TYPE OR P-TYPE EPI LAYER
R
j
SCHOTTKY JUNCTION
C
j
N-TYPE OR P-TYPE SILICON SUBSTRATE
For those applications requiring
very high breakdown voltage, use
the HSMS-280x family of diodes.
Turn to the HSMS-281x when you
CROSS-SECTION OF SCHOTTKY
BARRIER DIODE CHIP
EQUIVALENT
CIRCUIT
Figure 10. Schottky Diode Chip.
6
R is seen in a curve that droops
Small signal detectors are used as
very low cost receivers, and
require a reactive input imped-
ance matching network to
ꢀ
The two diodes are in parallel
in the RF circuit, lowering the
input impedance and making
the design of the RF matching
network easier.
S
at high current). All Schottky
diode curves have the same slope,
but not necessarily the same
value of current for a given
achieve adequate sensitivity and
output voltage. Those operating
with zero bias utilize the HSMS-
285x family of detector diodes.
However, superior performance
over temperature can be achieved
with the use of 3 to 30 µA of DC
bias. Such circuits will use the
HSMS-282x family of diodes if the
operating frequency is 1.5 GHz or
lower.
voltage. This is determined by the
ꢀ
ꢀ
The two diodes are in series
in the output (video) circuit,
doubling the output voltage.
saturation current, I , and is
S
related to the barrier height of the
diode.
Some cancellation of
even-order harmonics takes
place at the input.
Through the choice of p-type or
n-type silicon, and the selection
of metal, one can tailor the
characteristics of a Schottky
diode. Barrier height will be
DC Bias
altered, and at the same time C
J
and R will be changed. In
general, very low barrier height
Typical performance of single
diode detectors (using
S
Zero Biased Diodes
DC Biased Diodes
diodes (with high values of I ,
HSMS-2820 or HSMS-282B) can
be seen in the transfer curves
given in Figures 7 and 8. Such
detectors can be realized either
as series or shunt circuits, as
shown in Figure 11.
S
suitable for zero bias applica-
tions) are realized on p-type
silicon. Such diodes suffer from
Figure 12. Voltage Doubler.
The most compact and lowest
cost form of the doubler is
achieved when the HSMS-2822 or
HSMS-282C series pair is used.
higher values of R than do the
S
n-type. Thus, p-type diodes are
generally reserved for detector
applications (where very high
DC Bias
Both the detection sensitivity and
the DC forward voltage of a
biased Schottky detector are
temperature sensitive. Where
both must be compensated over a
wide range of temperatures, the
differential detector is often
used. Such a circuit requires that
the detector diode and the
values of R swamp out high R )
V
S
and n-type diodes such as the
HSMS-282x are used for mixer
applications (where high L.O.
Shunt inductor provides
video signal return
drive levels keep R low). DC
V
biased detectors and self-biased
detectors used in gain or power
control circuits.
Shunt diode provides
video signal return
DC Bias
[2]
reference diode exhibit identical
characteristics at all DC bias
levels and at all temperatures.
This is accomplished through the
use of two diodes in one package,
for example the HSMS-2825 in
Figure 13. In the Avago assembly
facility, the two dice in a surface
mount package are taken from
adjacent sites on the wafer (as
illustrated in Figure 14). This
Detector Applications
Zero Biased Diodes DC Biased Diodes
Detector circuits can be divided
into two types, large signal
(Pin > -20 dBm) and small signal
(Pin < -20 dBm). In general, the
former use resistive impedance
matching at the input to improve
flatness over frequency—this is
possible since the input signal
levels are high enough to produce
adequate output voltages without
the need for a high Q reactive
input matching network. These
circuits are self-biased (no
external DC bias) and are used
for gain and power control of
amplifiers.
Figure 11. Single Diode Detectors.
The series and shunt circuits can
be combined into a voltage
[1]
doubler , as shown in Figure 12.
The doubler offers three advan-
tages over the single diode
circuit.
[1] Avago Application Note 956-4, “Schottky Diode Voltage Doubler.”
[2] Raymond W. Waugh, “Designing Large-Signal Detectors for Handsets and Base
Stations,” Wireless Systems Design, Vol. 2, No. 7, July 1997, pp 42 – 48.
7
assures that the characteristics of
the two diodes are more highly
matched than would be possible
through individual testing and
hand matching.
bias
detector diode
PA
V
bias
differential
amplifier
bias
HSMS-282K
reference diode
matching
network
HSMS-282P
to differential amplifier
differential
amplifier
Figure 15. High Power Differen-
tial Detector.
Figure 17. Voltage Doubler
Differential Detector.
The concept of the voltage
matching
network
While the differential detector
works well over temperature,
another design approach works
HSMS-2825
doubler can be applied to the
differential detector, permitting
twice the output voltage for a
given input power (as well as
improving input impedance and
suppressing second harmonics).
[3]
well for large signal detectors.
See Figure 18 for the schematic
and a physical layout of the
circuit. In this design, the two
4.7 KΩ resistors and diode D2 act
as a variable power divider,
assuring constant output voltage
over temperature and improving
output linearity.
Figure 13. Differential Detector.
However, care must be taken to
assure that the two reference
diodes closely match the two
detector diodes. One possible
configuration is given in Fig-
ure 16, using two HSMS-2825.
Board space can be saved
through the use of the HSMS-282P
open bridge quad, as shown in
Figure 17.
RF
in
V
o
D1
4.7 KΩ
4.7 KΩ
68 Ω
33 pF
D2
Figure 14. Fabrication of Avago
Diode Pairs.
68 Ω
33 pF
bias
RF
in
HSMS-2825
or
HSMS-282K
In high power applications,
coupling of RF energy from the
detector diode to the reference
diode can introduce error in the
differential detector. The
HSMS-282K
V
o
4.7 KΩ
differential
amplifier
Figure 18. Temperature Compen-
sated Detector.
HSMS-282K diode pair, in the six
lead SOT-363 package, has a
copper bar between the diodes
that adds 10 dB of additional
isolation between them. As this
part is manufactured in the
SOT-363 package it also provides
the benefit of being 40% smaller
than larger SOT-143 devices. The
HSMS-282K is illustrated in
Figure 15—note that the ground
connections must be made as
close to the package as possible
to minimize stray inductance to
ground.
HSMS-2825
In certain applications, such as a
dual-band cellphone handset
operating at both 900 and
1800 MHz, the second harmonics
generated in the power control
output detector when the handset
is working at 900 MHz can cause
problems. A filter at the output
can reduce unwanted emissions
at 1800 MHz in this case, but a
matching
network
HSMS-2825
Figure 16. Voltage Doubler
Differential Detector.
[3] Hans Eriksson and Raymond W. Waugh, “A Temperature Compensated Linear Diode
Detector,” to be published.
8
[4]
lower cost solution is available
Illustrated schematically in
.
Mixer applications
A review of Figure 21 may lead to
the question as to why the
The HSMS-282x family, with its
wide variety of packaging, can be
used to make excellent mixers at
frequencies up to 6 GHz.
Figure 19, this circuit uses diode
D2 and its associated passive
components to cancel all even
HSMS-282R ring quad is open on
the ends. Distortion in double
balanced mixers can be reduced
if LO drive is increased, up to the
point where the Schottky diodes
are driven into saturation. Above
this point, increased LO drive will
not result in improvements in
distortion. The use of expensive
high barrier diodes (such as those
fabricated on GaAs) can take
advantage of higher LO drive
power, but a lower cost solution
is to use a eight (or twelve) diode
ring quad. The open design of the
HSMS-282R permits this to easily
be done, as shown in Figure 23.
order harmonics at the detector’s
RF input. Diodes D3 and D4
provide temperature compensa-
tion as described above. All four
diodes are contained in a single
HSMS- 282R package, as illus-
trated in the layout shown in
Figure 20.
The HSMS-2827 ring quad of
matched diodes (in the SOT-143
package) has been designed for
double balanced mixers. The
smaller (SOT-363) HSMS-282R ring
quad can similarly be used, if the
quad is closed with external
connections as shown in Figure 21.
D1
RF in
R1
V+
R2
D2
HSMS-282R
68 Ω
R3
RF in
LO in
V–
C1
R4
D3
C2
D4
LO in
RF in
IF out
C1 = C2 ≈ 100 pF
R1 = R2 = R3 = R4 = 4.7 KΩ
D1 & D2 & D3 & D4 = HSMS-282R
Figure 21. Double Balanced
Mixer.
Figure 19. Schematic of Sup-
pressed Harmonic Detector.
HSMS-282R
IF out
Both of these networks require a
crossover or a three dimensional
circuit. A planar mixer can be
made using the SOT-143 cross-
over quad, HSMS-2829, as shown
in Figure 22. In this product, a
special lead frame permits the
crossover to be placed inside the
plastic package itself, eliminating
the need for via holes (or other
measures) in the RF portion of
the circuit itself.
Figure 23. Low Distortion Double
Balanced Mixer.
HSMS-282R
4.7 KΩ
V–
4.7 KΩ
This same technique can be used
in the single-balanced mixer.
Figure 24 shows such a mixer,
with two diodes in each spot
normally occupied by one. This
mixer, with a sufficiently high LO
drive level, will display low
distortion.
V+
100 pF
100 pF
RF in
68 Ω
HSMS-282R
RF in
HSMS-2829
Figure 20. Layout of Suppressed
Harmonic Detector.
180°
hybrid
Low pass
filter
IF out
RF in
LO in
Note that the forgoing discussion
refers to the output voltage being
extracted at point V+ with
respect to ground. If a differential
output is taken at V+ with respect
to V-, the circuit acts as a voltage
doubler.
LO in
Figure 24. Low Distortion Bal-
anced Mixer.
IF out
Figure 22. Planar Double
Balanced Mixer.
[4] Alan Rixon and Raymond W. Waugh, “A Suppressed Harmonic Power Detector for Dual
Band ‘Phones,” to be published.
9
Sampling Applications
Note that θ , the thermal resis-
Diode Burnout
jc
The six lead HSMS-282P can be
used in a sampling circuit, as
shown in Figure 25. As was the
case with the six lead HSMS-282R
in the mixer, the open bridge
quad is closed with traces on the
circuit board. The quad was not
closed internally so that it could
be used in other applications,
such as illustrated in Figure 17.
tance from diode junction to the
foot of the leads, is the sum of
two component resistances,
Any Schottky junction, be it an RF
diode or the gate of a MESFET, is
relatively delicate and can be
burned out with excessive RF
power. Many crystal video
receivers used in RFID (tag)
applications find themselves in
poorly controlled environments
where high power sources may be
present. Examples are the areas
around airport and FAA radars,
nearby ham radio operators, the
vicinity of a broadcast band
transmitter, etc. In such
θ
= θ
+ θ
chip
(2)
jc
pkg
Package thermal resistance for
the SOT-3x3 package is approxi-
mately 100°C/W, and the chip
thermal resistance for the
HSMS-282x family of diodes is
approximately 40°C/W. The
designer will have to add in the
thermal resistance from diode
case to ambient—a poor choice
of circuit board material or heat
sink design can make this number
very high.
sample
point
HSMS-282P
environments, the Schottky
diodes of the receiver can be
protected by a device known as a
limiter diode.[5] Formerly
sampling
pulse
sampling circuit
available only in radar warning
receivers and other high cost
electronic warfare applications,
these diodes have been adapted to
commercial and consumer
circuits.
Equation (1) would be straightfor-
ward to solve but for the fact that
diode forward voltage is a func-
tion of temperature as well as
forward current. The equation for
Vf is:
Figure 25. Sampling Circuit.
Thermal Considerations
The obvious advantage of the
SOT-323 and SOT-363 over the
SOT-23 and SOT-142 is combina-
tion of smaller size and extra
leads. However, the copper
leadframe in the SOT-3x3 has a
thermal conductivity four times
higher than the Alloy 42
leadframe of the SOT-23 and
SOT-143, which enables the
smaller packages to dissipate
more power.
Avago offers a complete line of
surface mountable PIN limiter
diodes. Most notably, our HSMP-
4820 (SOT-23) can act as a very
fast (nanosecond) power-sensitive
switch when placed between the
antenna and the Schottky diode,
shorting out the RF circuit
11600 (Vf – If Rs)
(3)
nT
If = IS
e
– 1
where n = ideality factor
T = temperature in °K
Rs = diode series resistance
temporarily and reflecting the
excessive RF energy back out the
antenna.
and IS (diode saturation current)
is given by
The maximum junction tempera-
ture for these three families of
Schottky diodes is 150°C under
all operating conditions. The
following equation applies to the
thermal analysis of diodes:
2
n
)
1
T
1
298
– 4060
e
(
–
)
T
298
Is = I0
(
(4)
Tj = (V I + P ) θ + T
a
(1)
f
f
RF jc
Equation (4) is substituted into
equation (3), and equations (1)
where
T = junction temperature
and (3) are solved simultaneously
to obtain the value of junction
temperature for given values of
diode case temperature, DC
power dissipation and RF power
dissipation.
j
T = diode case temperature
a
θ = thermal resistance
jc
V I = DC power dissipated
f f
[5] Avago Application Note 1050, “Low
Cost, Surface Mount Power Limiters.”
P
= RF power dissipated
RF
10
SMT Assembly
passes through one or more
Assembly Instructions
Reliable assembly of surface
mount components is a complex
process that involves many
material, process, and equipment
factors, including: method of
heating (e.g., IR or vapor phase
reflow, wave soldering, etc.)
circuit board material, conductor
thickness and pattern, type of
solder alloy, and the thermal
conductivity and thermal mass of
components. Components with a
low mass, such as the SOT
preheat zones. The preheat zones
increase the temperature of the
board and components to prevent
thermal shock and begin evaporat-
ing solvents from the solder paste.
The reflow zone briefly elevates
the temperature sufficiently to
produce a reflow of the solder.
SOT-3x3 PCB Footprint
Recommended PCB pad layouts
for the miniature SOT-3x3 (SC-70)
packages are shown in Figures 26
and 27 (dimensions are in inches).
These layouts provide ample
allowance for package placement
by automated assembly equipment
without adding parasitics that
could impair the performance.
The rates of change of tempera-
ture for the ramp-up and cool-
down zones are chosen to be low
enough to not cause deformation
0.026
packages, will reach solder reflow of the board or damage to compo-
temperatures faster than those
with a greater mass.
nents due to thermal shock. The
maximum temperature in the
0.079
reflow zone (T
) should not
MAX
Avago’s diodes have been quali-
fied to the time-temperature
profile shown in Figure 28. This
profile is representative of an IR
reflow type of surface mount
assembly process.
exceed 235°C.
0.039
These parameters are typical for a
surface mount assembly process
for Avago diodes. As a general
guideline, the circuit board and
components should be exposed
only to the minimum tempera-
tures and times necessary to
achieve a uniform reflow of
solder.
0.022
Dimensions in inches
Figure 26. Recommended PCB Pad
Layout for Avago’s SC70 3L/SOT-323
Products.
After ramping up from room
temperature, the circuit board
with components attached to it
(held in place with solder paste)
0.026
250
200
0.079
TMAX
0.039
150
0.018
Reflow
Zone
Dimensions in inches
100
Preheat
Zone
Cool Down
Zone
Figure 27. Recommended PCB Pad
Layout for Avago's SC70 6L/SOT-363
Products.
50
0
0
60
120
180
240
300
TIME (seconds)
Figure 28. Surface Mount Assembly Profile.
11
Package Dimensions
Outline 23 (SOT-23)
Outline SOT-323 (SC-70 3 Lead)
e2
e1
e1
E1
E
XXX
E1
E
XXX
e
L
e
L
B
C
B
D
D
DIMENSIONS (mm)
C
SYMBOL
MIN.
0.80
0.00
0.15
0.10
1.80
1.10
MAX.
1.00
0.10
0.40
0.20
2.25
1.40
DIMENSIONS (mm)
A
A1
B
SYMBOL
MIN.
0.79
0.000
0.37
0.086
2.73
1.15
0.89
1.78
0.45
2.10
0.45
MAX.
1.20
0.100
0.54
0.152
3.13
1.50
1.02
2.04
0.60
2.70
0.69
A
A
A1
B
C
A
D
A1
E1
e
C
0.65 typical
1.30 typical
1.80 2.40
D
A1
e1
E
E1
e
Notes:
XXX-package marking
L
0.425 typical
e1
e2
E
Drawings are not to scale
Notes:
XXX-package marking
Drawings are not to scale
L
Outline 143 (SOT-143)
Outline SOT-363 (SC-70 6 Lead)
e2
e1
DIMENSIONS (mm)
SYMBOL
MIN.
1.15
1.80
1.80
0.80
0.80
0.00
0.10
MAX.
1.35
2.25
2.40
1.10
1.00
0.10
0.40
E
D
B1
HE
E
HE
A
A2
A1
Q1
e
E
E1
XXX
0.650 BCS
e
b
0.15
0.10
0.10
0.30
0.20
0.30
c
L
D
L
B
C
e
Q1
DIMENSIONS (mm)
c
A1
A2
D
A
SYMBOL
MIN.
0.79
0.013
0.36
0.76
0.086
2.80
1.20
0.89
1.78
0.45
2.10
0.45
MAX.
1.097
0.10
0.54
0.92
0.152
3.06
1.40
1.02
2.04
0.60
2.65
0.69
A
A1
B
A
b
L
B1
C
A1
D
E1
e
e1
e2
E
Notes:
XXX-package marking
Drawings are not to scale
L
12
For Outlines SOT-23, -323
Device Orientation
REEL
TOP VIEW
4 mm
END VIEW
CARRIER
TAPE
8 mm
ABC
ABC
ABC
ABC
USER
FEED
DIRECTION
Note: "AB" represents package marking code.
"C" represents date code.
COVER TAPE
For Outline SOT-143
For Outline SOT-363
TOP VIEW
4 mm
END VIEW
TOP VIEW
4 mm
END VIEW
8 mm
A B C
A B C
A B C
A B C
8 mm
ABC
ABC
ABC
ABC
Note: "AB" represents package marking code.
"C" represents date code.
Note: "AB" represents package marking code.
"C" represents date code.
13
Tape Dimensions and Product Orientation
For Outline SOT-23
P
P
D
2
E
F
P
0
W
D
1
t1
Ko
13.5° MAX
8° MAX
9° MAX
B
A
0
0
DESCRIPTION
SYMBOL
SIZE (mm)
SIZE (INCHES)
CAVITY
LENGTH
WIDTH
DEPTH
PITCH
A
B
K
P
3.15 0.10
2.77 0.10
1.22 0.10
4.00 0.10
1.00 + 0.05
0.124 0.004
0.109 0.004
0.048 0.004
0.157 0.004
0.039 0.002
0
0
0
BOTTOM HOLE DIAMETER
D
1
PERFORATION
CARRIER TAPE
DIAMETER
PITCH
POSITION
D
1.50 + 0.10
4.00 0.10
1.75 0.10
0.059 + 0.004
0.157 0.004
0.069 0.004
P
E
0
WIDTH
W
8.00+0.30–0.10 0.315+0.012–0.004
THICKNESS
t1
0.229 0.013
0.009 0.0005
DISTANCE
BETWEEN
CAVITY TO PERFORATION
(WIDTH DIRECTION)
F
3.50 0.05
0.138 0.002
CENTERLINE
CAVITY TO PERFORATION
(LENGTH DIRECTION)
P
2.00 0.05
0.079 0.002
2
For Outline SOT-143
P
D
P2
P0
E
F
W
D1
t1
K
0
9° MAX
9° MAX
A0
B
0
DESCRIPTION
SYMBOL
SIZE (mm)
SIZE (INCHES)
CAVITY
LENGTH
WIDTH
DEPTH
PITCH
A
B
K
P
3.19 0.10
2.80 0.10
1.31 0.10
4.00 0.10
1.00 + 0.25
0.126 0.004
0.110 0.004
0.052 0.004
0.157 0.004
0.039 + 0.010
0
0
0
BOTTOM HOLE DIAMETER
D
1
PERFORATION
DIAMETER
PITCH
POSITION
D
1.50 + 0.10
4.00 0.10
1.75 0.10
0.059 + 0.004
0.157 0.004
0.069 0.004
P
E
0
CARRIER TAPE
DISTANCE
WIDTH
THICKNESS
W
t1
8.00+0.30–0.10 0.315+0.012–0.004
0.254 0.013
0.0100 0.0005
CAVITY TO PERFORATION
(WIDTH DIRECTION)
F
3.50 0.05
0.138 0.002
CAVITY TO PERFORATION
(LENGTH DIRECTION)
P
2.00 0.05
0.079 0.002
2
Tape Dimensions and Product Orientation
For Outlines SOT-323, -363
P
P
D
2
P
0
E
F
W
C
D
1
t
(CARRIER TAPE THICKNESS)
T (COVER TAPE THICKNESS)
t
1
K
An
An
0
A
B
0
0
DESCRIPTION
SYMBOL
SIZE (mm)
SIZE (INCHES)
CAVITY
LENGTH
WIDTH
DEPTH
PITCH
A
B
K
P
2.40 0.10
2.40 0.10
1.20 0.10
4.00 0.10
1.00 + 0.25
0.094 0.004
0.094 0.004
0.047 0.004
0.157 0.004
0.039 + 0.010
0
0
0
BOTTOM HOLE DIAMETER
D
1
PERFORATION
DIAMETER
PITCH
POSITION
D
1.55 0.05
4.00 0.10
1.75 0.10
0.061 0.002
0.157 0.004
0.069 0.004
P
E
0
CARRIER TAPE
COVER TAPE
DISTANCE
WIDTH
THICKNESS
W
8.00 0.30
0.254 0.02
0.315 0.012
0.0100 0.0008
t
1
WIDTH
TAPE THICKNESS
C
5.4 0.10
0.062 0.001
0.205 0.004
0.0025 0.00004
T
t
CAVITY TO PERFORATION
(WIDTH DIRECTION)
F
3.50 0.05
0.138 0.002
CAVITY TO PERFORATION
(LENGTH DIRECTION)
P
2.00 0.05
0.079 0.002
2
ANGLE
FOR SOT-323 (SC70-3 LEAD)
FOR SOT-363 (SC70-6 LEAD)
An
8°C MAX
10°C MAX
Part Number Ordering Information
No. of
Part Number
HSMS-282x-TR2*
HSMS-282x-TR1*
HSMS-282x-BLK *
Devices
10000
3000
Container
13" Reel
x = 0, 2, 3, 4, 5, 7, 8, 9, B, C, E, F, K, L, M, N, P or R
For lead-free option, the part number will have the character
"G" at the end, eg. HSMS-282x-TR2G for a 10,000 lead-free reel.
7" Reel
100
antistatic bag
For product information and a complete list of distributors, please go to our web site:
www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited
in the United States and other countries.
Data subject to change. Copyright © 2006 Avago Technologies, Limited. All rights reserved.
Obsoletes 5989-2503EN
5989-4030EN June 1, 2006
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