VMMK-3803-TR1G [AVAGO]
3 - 11 GHz UWB Low Noise Amplifier in SMT Package; 3 - 在SMT封装11 GHz的超宽带低噪声放大器
| 型号： | VMMK-3803-TR1G |
| 厂家： | 
AVAGO TECHNOLOGIES LIMITED |
| 描述： | 3 - 11 GHz UWB Low Noise Amplifier in SMT Package |
| 文件： | 总9页 (文件大小：911K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
VMMK-3803
3 - 11 GHz UWB Low Noise Amplifier in SMT Package
Data Sheet
Description
Features
The VMMK-3803 is a small and easy-to-use, broadband, •ꢀ 1 x 0.5 mm surface mount package
low noise amplifier operating in various frequency bands
from 3 to 11 GHz with typical noise figure of 1.5 dB. It is
housed in the Avago Technologies’ industry-leading and
•ꢀ Ultrathin (0.25 mm)
•ꢀ Wide frequency range
revolutionary sub-miniature chip scale package (GaAsCap •ꢀ Self-Biasing: 3 to 5 V
wafer scale leadless package) which is small and ultra thin
yet can be handled and placed with standard 0402 pick
•ꢀ In and output match: 50 ohm
and place assembly equipment. The VMMK-3803 provides
a typical gain of 20 dB with good linearity of 0.9 dBm
typical IIP3 and input and output return losses and can be
operated from 3 to 5 V power supply. It is fabricated using
Avago Technologies unique 0.25 μm E-mode PHEMT
technology which eliminates the need for negative gate
biasing voltage.
Specifications
(6 GHz, Vdd = 3 V, Vpd = 3 V, Zin = Zout = 50 Ω)
•ꢀ Low noise figure: 1.5 dB typ.
•ꢀ Small signal gain: 20 dB typ.
•ꢀ Output Power at 1dB compression = 7 dBm
Applications
WLP0402, 1 mm x 0.5 mm x 0.25 mm
•ꢀ 3.1-10.6 GHz UWB LNA
•ꢀ 3.5 and 5-6 GHz WLAN and WiMax
•ꢀ 10.5 GHz PMP
•ꢀ 802.16 & 802.20 BWA systems
•ꢀ Radar and ECM systems
•ꢀ Generic IF amplifier
Pin Connections (Top View)
Input
Output/Vdd
OY
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 60 V
ESD Human Body Model = 200 V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
Input
Output/Vdd
Amp
Note:
“O”= Device Code
“Y”= Month Code
Electrical Specifications
[1]
Table 1. Absolute Maximum Rating
Symbol
Vdd
Parameters/Condition
Unit
V
Absolute Max
Supply Voltage (RF Output)
Power Down Voltage
7
Vpd
V
7
Idd [2]
Pin, max
Pdiss
Supply Current
mA
dBm
mW
°C
45
[3]
CW RF Input Power (RF Input)
Total Power Dissipation
Max Channel Temperature
Thermal Resistance
15
315
+150
90.6
Tch
θjc [4]
°C/W
Notes
1. Operation of this device above any one of these parameters may cause permanent damage
2. Bias is assumed DC quiescent conditions
3. With the DC (typical bias) and RF applied to the device at board temperature Tb = 25° C
4. Thermal resistance is measured from junction to board using IR method
[1]
Table 2. DC and RF Specifications
T = 25° C, Z = Z = 50 Ω, Freq = 6 GHz, Vdd = 3 V, Vpd = 3 V (unless otherwise specified)
A
in
out
Symbol
Idd [2]
Idd_Off [2]
Ga [2,3]
NF [2,3]
S11 [4]
Parameters/Condition
Supply Current
Unit
mA
μA
Minimum
Typical
20
Maximum
14
26
Leakage Current (Vpd = 0 V)
Gain
0.1
20
dB
17
23
Noise Figure
dB
1.5
15
1.9
Input Return Loss
dB
S22 [4]
Output Return Loss
Input 3rd Order Intercept Point
Output Power at 1dB Compression
dB
9
IIP3 [4,5]
P-1dB [4]
Notes
dBm
dBm
0.9
7
1. Losses of the test system have been de-embedded from final data
2. Measured data obtained from wafer-probing using a G-S, S-G pyramid probe
3. Ga and NF obtained from Noise Figure Analyzer
4. S-parameters, P1dB, and IIP3 data obtained using 300 μm G-S-G probing on PCB substrate
5. IIP3 test condition: Center frequency = 6 GHz, 2 tone offset = 10 MHz, Pin = -20 dBm
2
Product Consistency Distribution Charts at 6.0 GHz, Vdd = 3 V, Vpd = 3 V unless specified.
Measured data obtained from wafer-probing using a G-S, S-G pyramid probe.
LSL
USL
LSL
USL
0.011
0.015
0.018
0.021
0.024
0.027
0.03
17
18
19
20
21
22
23
24
Idd @ Vdd = 3 V, Vpd = 3 V, Mean = 20 mA, LSL = 14 mA, USL = 26 mA
Ga @ 6 GHz, Mean = 20 dB, LSL = 17 dB, USL = 23 dB
(Data obtained using Noise Figure Analyzer)
USL
Notes:
Distribution data based on 48 Kpcs part sample size from MPV lots.
Future wafers allocated to this product may have nominal values
anywhere between the upper and lower limits.
1
1.1 1.2
1.4
1.6
1.8
2
2.1
NF @ 6 GHz, Mean = 1.5 dB, USL = 1.9 dB
3
VMMK-3803 Typical Performance
T = 25° C, Vpd = 3 V, Z = Z = 50 Ωꢀ(unless noted); data obtained using 300 μm G-S-G probing on PCB substrate &
A
in
out
broadband bias tees, losses calibrated out to the package reference plane.plane.
-20
-25
-30
-35
-40
-45
-50
-55
-60
24
20
16
12
8
3 V
4 V
5 V
6 V
3 V
4 V
5 V
6 V
4
0
0
3
6
9
12
15
18
0
3
6
9
12
15
18
Frequency (GHz)
Frequency (GHz)
Figure 1. Small Signal Gain over Vdd
Figure 2. Reverse Isolation over Vdd
0
-5
0
-5
-10
-15
-20
-10
-15
-20
-25
-30
3 V
4 V
5 V
6 V
3 V
4 V
5 V
6 V
-25
-30
-35
0
3
6
9
12
15
18
0
3
6
9
12
15
18
Frequency (GHz)
Frequency (GHz)
Figure 3. Input Return Loss over Vdd
Figure 4. Output Return Loss over Vdd
2.5
2
2.5
2
1.5
1
1.5
1
3 V
4 V
5 V
3 V
4 V
5 V
0.5
0.5
2
4
6
8
10
12
2
4
6
8
10
12
Frequency (GHz)
Frequency (GHz)
Figure 5. Noise Figure (50 ohm) over Vdd
Figure 6. NFmin over Vdd
4
VMMK-3803 Typical Performance
Z
= Z = 50 Ω, Vpd = 3 V, T = 25° C for varying Vdd data, Vdd=3V for varying Temp data; obtained using 300 μm G-S-G
out A
in
PCB substrate & broadband bias tees, losses calibrated out to the package reference plane.
12
10
8
8
6
4
2
6
0
-2
-4
-6
-8
4
3 V
4 V
5 V
3 V
4 V
5 V
2
0
2
4
6
8
10
12
2
4
6
8
10
12
Frequency (GHz)
Frequency (GHz)
Figure 7. Output P1dB over Vdd
Figure 8. Input IP3 over Vdd
3
2.5
2
25
20
15
10
5
25° C
-40° C
+85° C
1.5
1
25° C at 3 V
-35° C at 3 V
+85° C at 3 V
0.5
0
0
0
2
4
6
8
10 12 14 16 18 20
2
3
4
5
6
7
8
9
10 11 12
Frequency (GHz)
Frequency (GHz)
Figure 9. S21 over Temp
Figure 10. Noise Figure over Temp
12
10
8
8
6
4
2
6
0
-2
-4
-6
-8
4
25° C
-40° C
85° C
25° C
-40° C
85° C
2
0
2
4
6
8
10
12
2
4
6
8
10
12
Frequency (GHz)
Frequency (GHz)
Figure 11. Output P1dB over Temp
Figure 12. Input IP3 over Temp
5
Typical Scattering Parameters and Noise Parameters
T = 25° C, Vdd = 3 V, Vpd = 3 V, Z = Z = 50 Ω; data obtained using 300 μm G-S-G probing on PCB substrate & broad-
A
in
out
band bias tees, losses calibrated out to the package reference plane.
S11
S21
S12
S22
Freq
(GHz)
(dB)
(mag)
(ang)
(dB)
(mag)
(ang)
(dB)
(mag)
(ang)
(dB)
(mag)
(ang)
0.5
1
-1.071 0.884
-1.068 0.8843
-1.151 0.8759
-2.194 0.7768
-3.833 0.6432
-5.869 0.5088
-8.099 0.3936
-10.46 0.3
-17.999 15.88
-28.599 16.228
-64.841 19.703
6.2228
6.4776
9.6641
91.657
-39.83 0.0102
25.085
-5.979
0.5024
-32.091
54.832
-40.72 0.0092
-5.7032 -7.5392 0.4198
-21.41
2
-0.2142 -61.94 0.0008
26.203
94.308
80.488
67.726
57.244
48.809
41.646
37.431
31.778
26.223
20.235
14.279
11.758
3.8768
-3.334
-6.6846 0.4632
-6.9512 0.4492
-7.8145 0.4067
-8.6172 0.3708
-9.1311 0.3495
-30.788
-42.359
-50.364
-54.537
-57.475
-60.009
-62.991
-67.759
-72.539
-78.294
-85.286
-93.407
-100.46
-109.34
-119.64
-130.1
2.5
3
-82.84
-100.89 20.494
-116.6 20.166
20.424
10.5006 -26.683 -44.73 0.0058
10.5852 -50.965 -39.49 0.0106
10.1931 -72.011 -36.71 0.0146
3.5
4
-129.96 19.68
-141.47 19.205
9.6383
9.1254
8.6649
8.317
-90.299 -35.19 0.0174
-106.48 -34.11 0.0197
4.5
5
-9.35
0.3408
0.3455
0.3455
-12.98 0.2243
-15.61 0.1658
-18.59 0.1176
-21.86 0.0807
-150.4
18.755
-121.1
-33.43 0.0213
-9.231
-9.231
5.5
6
-160.11 18.399
-166.04 18.111
-167.23 17.923
-160.39 17.775
-149.66 17.709
-142.86 17.606
-140.76 17.709
-152.95 17.786
-135.11 -32.69 0.0232
-148.18 -32.22 0.0245
-160.97 -31.67 0.0261
-173.68 -31.24 0.0274
8.0454
7.8735
7.7401
7.6816
7.5906
7.6817
7.7502
7.8006
7.8542
7.8828
7.7516
7.179
-9.0199 0.354
-8.7328 0.3659
-8.4272 0.379
-8.1787 0.39
-8.1809 0.3899
-7.6181 0.416
-7.3711 0.428
6.5
7
-24.5
0.0596
7.5
8
-25.11 0.0555
-25.75 0.0516
-22.45 0.0754
-20.23 0.0974
-18.22 0.1228
173.48
160.8
-30.84 0.0287
-30.75 0.029
-29.95 0.0318
-29.58 0.0332
-29.34 0.0341
-29.24 0.0345
-29.12 0.035
-29.37 0.034
-30.31 0.0305
-32.58 0.0235
8.5
9
147.9
134.22
120.1
9.5
10
10.5
11
12
13
14
15
16
17
18
-169.1
174.25
156.38
137.68
100.89
65.61
17.843
17.902
17.934
17.788
17.121
15.39
-11.824 -7.1844 0.4373
-20.194 -6.9803 0.4477
-29.569 -6.8455 0.4547
-40.032 -6.9454 0.4495
-63.682 -7.4568 0.4238
-89.863 -9.1485 0.3488
-115.26 -11.258 0.2736
-141.77 -13.159 0.2198
-16
0.1584
105.21
89.54
-141.68
-154.5
-13.79 0.2043
-11.97 0.2521
73.292
38.405
3.9724
-167.89
162.538
127.677
97.5178
70.0208
42.6539
17.9161
-3.435
-8.92
0.3581
-6.614 0.467
-5.764 0.515
-5.333 0.5412
-5.106 0.5555
-5.002 0.5622
-5.002 0.5622
5.8818
4.6006
3.5095
2.6777
2.0714
1.6291
38.532
17.245
13.256
10.905
-25.269 -36.42 0.0151
-50.943 -40.09 0.0099
-73.397 -45.04 0.0056
-93.815 -43.88 0.0064
-112.86 -41.31 0.0086
-0.6043 8.5552
-15.312 6.3253
-28.024 4.239
163.4
-14.462 0.1892
-14.699 0.1841
-14.485 0.1887
123.41
86.597
Freq (GHz)
2
Fmin (dB)
0.93
1.02
0.98
1.06
1.33
1.36
1.45
1.52
1.69
1.77
1.93
1.94
1.91
2.06
2.4
Rn
Γopt (mag)
0.504
0.440
0.574
0.378
0.304
0.306
0.234
0.141
0.143
0.108
0.111
0.113
0.113
0.082
0.165
Γopt (ang)
35.48
Associated gain (dB)
23.81
0.279
0.241
0.168
0.169
0.152
0.156
0.142
0.120
0.120
0.117
0.122
0.162
0.142
0.220
0.260
2.5
3
41.07
22.90
33.56
20.48
4
54.74
20.17
5
80.24
19.46
5.5
6
86.48
19.07
88.16
18.92
7
126.58
126.9
18.80
8
18.88
9
152.56
-161.83
-141.3
-151.1
-61.09
-58.95
19.22
10
10.5
11
12
13
19.38
19.50
19.17
18.16
16.77
6
VMMK-3803 Applications Information
Biasing and Operation
Table 3. VMMK-3803 Demo Board BOM
Component
Value
TheVMMK-3803 is biased with a positive supply connected
to the output pinVd through an external user supplied bias
decoupling network. Typical bias is 3 V at 20 mA. The “on”
state also requires that the input port of the VMMK-3803
also be biased at 3 V for normal gain operation. 0V on the
input puts the VMMK-3803 in the “off”state.
DUT
C1
C2
R1
VMMK-3803
100 pF
100 pF
10 kohm
0.1 μF
C5
C6
L1
An example of simple user supplied bias tees is shown in
Figure 13. The output bias decoupling network feeding
Vdd consists of a shunt 6.8 nH inductor. At the input, a 10
Kohm resistor is needed to feed the power-down control
voltage. The input and output dc blocking capacitors are
each 100 pF. The “on” and “off” S Parameters shown in the
preceding tables reflect the operation of the circuit shown
in Figure 14.
100 pF
6.8 nH
The input and output bias decoupling network can be
easily constructed using small surface mount compo-
nents. The value of the shunt inductors can have a major
effect on both low and high frequency operation. The
demo board uses small value inductors that have self
resonant frequencies higher than the maximum desired
frequency of operation. If the self-resonant frequency of
the inductor is too close to the operating band, the value
of the inductor will need to be adjusted so that the self-
resonant frequency is significantly higher than the highest
frequency of operation.
Typically a passive component company like Murata does
not specify S parameters at frequencies higher than 5 or
6 GHz for larger values of inductance making it difficult
to properly simulate amplifier performance at higher fre-
quencies. It has been observed that the Murata LQW15AN
series of 0402 inductors actually works quite well above
their normally specified frequency.
Figure 13. Demo Board (available to qualified customers upon request)
The parallel combination of the 100 pF and 0.1 μF bypass
capacitors provide a low impedance in the band of
operation and at lower frequencies and should be placed
as close as possible to the inductor. The low frequency
bypass provides good rejection of power supply noise
and also provides a low impedance termination for
third order low frequency mixing products that will be
generated when multiple in-band signals are injected into
any amplifier.
Vpd
0.1 µF
Vdd
0.1 µF
100 pF
10 K
6.8 nH
Output
Input
Amp
100 pF
100 pF
Input
Pad
Ground Output
Pad Pad
50 Ohm line
50 Ohm line
Figure 14. Example demonstration circuit of VMMK-3803 for broadband
operation (3GHz to 11GHz).
A layout of a typical demo board is shown in Figure 15.
Figure 15. Biasing the VMMK-3803
7
S Parameter Measurements
ESD Precautions
The S-parameters are measured on a 0.016 inch thick Note: These devices are ESD sensitive. The following pre-
RO4003 printed circuit test board, using G-S-G (ground
signal ground) probes. Coplanar waveguide is used to
provide a smooth transition form the probes to the device
under test. The presence of the ground plane on top of
the test board results in excellent grounding at the device
under test. A combination of SOLT (Short – Open – Load
– Thru) and TRL (Thru – Reflect – Line) calibration tech-
niques are used to correct for the effects of the test board,
resulting in accurate device S parameters.
cautions are strongly recommended. Ensure that an ESD
approved carrier is used when die are transported from
one destination to another. Personal grounding is to be
worn at all times when handling these devices. For more
detail, refer to Avago Application Note A004R: Electro-
static Discharge Damage and Control.
Ordering Information
Devices Per
Package and Assembly Note
Part Number
Container
Container
Antistatic Bag
7”Reel
VMMK-3803-BLKG
VMMK-3803-TR1G
100
For detailed description of the device package, handling
and assembly, please refer to Application Note 5378.
5000
Package Dimension Outline
D
Dimensions
E
Symbol
Min (mm)
Max (mm)
0.585
E
0.500
1.004
0.225
D
A
1.085
A
0.275
Note:
All dimensions are in mm
Reel Orientation
Device Orientation
USER FEED DIRECTION
REEL
4 mm
8 mm
USER
FEED
TOP VIEW
END VIEW
CARRIER
TAPE
DIRECTION
Notes:
“O”= Device Code
“Y”= Month Code
8
Tape Dimensions
T
Note: 2
P2
Note: 1
Po
Do
B
B
5° (Max)
A
A
P1
D1
Ao
Symbol
Ao
Spec.
0.73 0.05
R0.1
5° (Max)
Ko
Bo
1.26 0.05
Ko
0.35 + 0.05
- 0
K1
Po
P1
–
4.0 0.10
4.0 0.10
2.0 0.05
1.55 0.05
0.5 0.05
1.75 0.10
3.50 0.05
40.0 0.10
8.0 0.20
0.20 0.02
Scale 5:1
AꢀA SECTION
P2
Do
D1
E
F
Po
W
T
Unit: mm
Notes:
1. 10 Sprocket hole pitch cumulative tolerance is 0.1 mm.
2. Pocket position relative to sprocket hole measured as true position of pocket not pocket hole.
3. Ao & Bo measured on a place 0.3 mm above the bottom of the pocket to top surface of the carrier.
4. Ko measured from a plane on the inside bottom of the pocket to the top surface of the carrier.
5. Carrier camber shall be not than 1 m per 100 mm through a length of 250 mm.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies in the United States and other countries.
Data subject to change. Copyright © 2005-2012 Avago Technologies. All rights reserved.
AV02-2920EN - December 26, 2012
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