BUF600AU 概述
HIGH-SPEED BUFFER AMPLIFIER 高速缓冲放大器 缓冲放大器
BUF600AU 规格参数
是否Rohs认证: | 不符合 | 生命周期: | Transferred |
包装说明: | SOP, | Reach Compliance Code: | unknown |
风险等级: | 5.77 | Is Samacsys: | N |
放大器类型: | BUFFER | JESD-30 代码: | R-PDSO-G8 |
JESD-609代码: | e0 | 功能数量: | 1 |
端子数量: | 8 | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | SOP | 封装形状: | RECTANGULAR |
封装形式: | SMALL OUTLINE | 认证状态: | Not Qualified |
子类别: | Buffer Amplifier | 表面贴装: | YES |
技术: | BIPOLAR | 温度等级: | INDUSTRIAL |
端子面层: | Tin/Lead (Sn/Pb) | 端子形式: | GULL WING |
端子位置: | DUAL | Base Number Matches: | 1 |
BUF600AU 数据手册
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BUF600
BUF600
BUF601
BUF600
BUF601
HIGH-SPEED BUFFER AMPLIFIER
FEATURES
APPLICATIONS
● OPEN-LOOP BUFFER
● VIDEO BUFFER/LINE DRIVER
● HIGH-SLEW RATE: 3600V/µs, 5.0Vp-p
● INPUT/OUTPUT AMPLIFIER FOR
MEASUREMENT EQUIPMENT
● BANDWIDTH: 320MHz, 5.0Vp-p
900MHz, 0.2Vp-p
● PORTABLE SYSTEMS
● LOW INPUT BIAS CURRENT: 0.7µA/1.5µA
● LOW QUIESCENT CURRENT: 3mA/6mA
● GAIN FLATNESS: 0.1dB, 0 to 300MHz
● TRANSMISSION SYSTEMS
● TELECOMMUNICATIONS
● HIGH-SPEED ANALOG SIGNAL
PROCESSING
● ULTRASOUND
The BUF601, with 6mA quiescent current and there-
fore lower output impedance, can easily drive 50Ω
inputs or 75Ω systems and cables.
DESCRIPTION
The BUF600 and BUF601 are monolithic open-loop
unity-gain buffer amplifiers with a high symmetrical
slew rate of up to 3600V/µs and a very wide band-
width of 320MHz at 5Vp-p output swing. They use a
complementary bipolar IC process, which incorpo-
rates pn-junction isolated high-frequency NPN and
PNP transistors to achieve high-frequency performance
previously unattainable with conventional integrated
circuit technology.
The broad range of analog and digital applications
extends from decoupling of signal processing stages,
impedance transformation, and input amplifiers for
RF equipment and ATE systems to video systems,
distribution fields, IF/communications systems, and
output drivers for graphic cards.
V+ = +5V
(1)
Their unique design offers a high-performance alter-
native to expensive discrete or hybrid solutions.
The BUF600 and BUF601 feature low quiescent
current, low input bias current, small signal delay time
and phase shift, and low differential gain and phase
errors.
VIN
(4)
VOUT
(8)
The BUF600 with 3mA quiescent current is well-
suited for operation between high-frequency
processing stages. It demonstrates outstanding perfor-
mance even in feedback loops of wide-band amplifiers
or phase-locked loop systems.
Bias
Circuitry
BUFFER
V– = –5V
(5)
Simplified Circuit Diagram
International Airport Industrial Park
•
Mailing Address: PO Box 11400, Tucson, AZ 85734
FAXLine: (800) 548-6133 (US/Canada Only)
•
Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706
•
Tel: (520) 746-1111 • Twx: 910-952-1111
Internet: http://www.burr-brown.com/
•
•
Cable: BBRCORP
•
Telex: 066-6491
•
FAX: (520) 889-1510
•
Immediate Product Info: (800) 548-6132
© 1991 Burr-Brown Corporation
PDS-1128F
Printed in U.S.A. March, 1998
SPECIFICATIONS
DC SPECIFICATION
At VCC = ±5V, RLOAD = 10kΩ, RSOURCE = 50Ω, and TAMB = +25°C, unless otherwise noted.
BUF600AP, AU
TYP
BUF601AU
TYP
PARAMETER
CONDITIONS
MIN
MAX
MIN
MAX
UNITS
INPUT OFFSET VOLTAGE
Initial
vs Temperature
vs Supply (tracking)
vs Supply (non-tracking)
vs Supply (non-tracking)
±15
9
–72
–55
–54
±30
±15
25
–77
–55
–54
±30
mV
µV/°C
dB
dB
dB
VCC = ±4.5V to ±5.5V
VCC = +4.5V to +5.5V
VCC = –4.5V to –5.5V
–54
–54
INPUT BIAS CURRENT
Initial
vs Temperature
vs Supply (tracking)
vs Supply (non-tracking)
vs Supply (non-tracking)
+3.5
0.4
0.15
0.5
–2.5/+5
+3.5
0.7
0.3
0.5
20
–5/+10
µA
nA/°C
µA/V
µA/V
nA/V
VCC = ±4.5V to ±5.5V
V
CC = +4.5V to +5.5V
VCC = –4.5V to –5.5V
20
INPUT IMPEDANCE
4.8 || 1
2.5 || 1
MΩ || pF
INPUT NOISE
Voltage Noise Density
Signal-to-Noise Ratio
f = 100kHz to 100MHz
S/N = 20 Log (0.7/(Vn • √5MHz))
5.2
95
4.8
96
nV/√Hz
dB
TRANSFER CHARACTERISTICS
Voltage Gain; VIN = ±2.5V
RLOAD = 100Ω
RLOAD = 200Ω
RLOAD = 10kΩ
0.95
0.99
V/V
V/V
V/V
0.96
0.99
RATED OUTPUT
Voltage Output
VIN = ±2.7V
RLOAD = 100Ω
±2.5
±20
±2.6
V
V
mA
Ω
RLOAD = 200Ω
DC, RLOAD = 100Ω
±2.5
±20
±2.6
DC Current Output
Output Impedance
6.2
3.6
POWER SUPPLY
Rated Voltage
Derated Performance
Quiescent Current
±5
±3
±5
±6
V
V
mA
±4.5
±2.6
±5.5
±3.4
±4.5
±5.4
±5.5
±6.6
TEMPERATURE RANGE
Specification
Storage
–40
–40
85
125
–40
–40
85
125
°C
°C
AC SPECIFICATION
At VCC = ±5V, RLOAD = 200Ω (BUF600) and 100Ω (BUF601), RSOURCE = 50Ω, and TAMB = +25°C, unless otherwise noted.
BUF600AP, AU
BUF601AU
TYP
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
MAX
UNITS
FREQUENCY DOMAIN
LARGE SIGNAL BANDWIDTH
(–3dB)
V
O = 5Vp-p, COUT = 1pF
320
400
700
320
400
700
MHz
MHz
MHz
VO = 2.8Vp-p, COUT = 1pF
VO = 1.4Vp-p, COUT = 1pF
SMALL SIGNAL BANDWIDTH
GROUP DELAY TIME
VO = 0.2Vp-p, COUT = 1pF
650
250
900
200
MHz
ps
DIFFERENTIAL GAIN
VIN = 0.3Vp-p, f = 4.43MHz
V = 0 to 0.7V
BUF600 RLOAD = 200Ω
0.5
0.075
%
%
%
%
R
LOAD = 1kΩ
BUF601 RLOAD = 100Ω
LOAD = 500Ω
0.4
0.05
R
DIFFERENTIAL PHASE
VIN = 0.3Vp-p, f = 4.43MHz
V = 0 to 0.7V
BUF600 RLOAD = 200Ω
0.02
0.04
Degrees
Degrees
Degrees
Degrees
R
LOAD = 1kΩ
BUF601 RLOAD = 100Ω
LOAD = 500Ω
0.025
0.03
R
®
2
BUF600, 601
AC-SPECIFICATIONS (CONT)
At VCC = ±5V, RLOAD = 200Ω (BUF600) and 100Ω (BUF601), RSOURCE = 50Ω, and TAMB = +25°C, unless otherwise noted.
BUF600AP, AU
BUF601AU
TYP
PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
MAX
UNITS
HARMONIC DISTORTION
Second Harmonic
Third Harmonic
Second Harmonic
Third Harmonic
f = 10MHz, VO = 1.4Vp-p
f = 30MHz, VO = 1.4Vp-p
f = 50MHz, VO = 1.4Vp-p
–65
–64
–51
–56
–43
–48
–65
–67
–59
–62
–53
–54
dBc
dBc
dBc
dBc
dBc
dBc
Second Harmonic
Third Harmonic
GAIN FLATNESS PEAKING
VO = 0.4Vp-p, DC to 30MHz
VO = 0.4Vp-p, 30MHz to 300MHz
0.01
0.3
0.005
0.1
dB
dB
LINEAR PHASE DEVIATION
VO = 0.4Vp-p, DC to 30MHz
VO = 0.4Vp-p, 30 to 300MHz
5.5
55
3.8
45
Degrees
Degrees
TIME DOMAIN
RISE TIME
10% to 90%, 700ps
1.4Vp-p Step
0.82
0.97
1.18
0.87
0.95
1.13
ns
ns
ns
2.8Vp-p Step
5.0Vp-p Step
SLEW RATE
VO = 1.4Vp-p
VO = 2.8Vp-p
VO = 5.0Vp-p
1500
2400
3400
1500
2400
3600
V/µs
V/µs
V/µs
FUNCTIONAL DESCRIPTION
PIN CONFIGURATION
FUNCTION
DESCRIPTION
Top View
DIP/SO-8
In
Analog Input
Out
+VCC
–VCC
Analog Output
Positive Supply Voltage; typical +5VDC
Negative Supply Voltage; typical –5VDC
8
+VCC
NC
NC
In
1
2
3
4
Out
7
NC
6
ELECTROSTATIC
DISCHARGE SENSITIVITY
NC
5
–VCC
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
BUF600, BUF601
ABSOLUTE MAXIMUM RATINGS
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
Power Supply Voltage.......................................................................... ±6V
Input Voltage(1) ......................................................................... ±VCC ±0.7V
Operating Temperature..................................................... –40°C to +85°C
Storage Temperature ...................................................... –40°C to +125°C
Junction Temperature .................................................................... +150°C
Lead Temperature (soldering, 10s)................................................ +300°C
NOTE: (1) Inputs are internally diode-clamped to ±VCC.
PACKAGE/ORDERING INFORMATION
PACKAGE
DRAWING
NUMBER(1)
TEMPERATURE
RANGE
PRODUCT
PACKAGE
BUF600AP
BUF600AU
BUF601AU
Plastic 8-Pin DIP
SO-8 Surface Mount
SO-8 Surface Mount
006
182
182
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
NOTE: (1) For detailed drawing and dimension table, please see end of data
sheet, or Appendix C of Burr-Brown IC Data Book.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
3
BUF600, 601
INPUT PROTECTION
All input pins on the BUF600 and BUF601 are internally
protected from ESD by means of a pair of back-to-back
reverse-biased diodes to the power supplies as shown. These
diodes will begin to conduct when the input voltage exceeds
either power supply by about 0.7V. This situation can occur
with loss of the amplifier’s power supplies while a signal
source is still present. The diodes can typically withstand a
continuous current of 30mA without destruction. To insure
long term reliability, however, the diode current should be
externally limited to 10mA or so whenever possible.
Static damage has been well recognized for MOSFET de-
vices, but any semiconductor device deserves protection
from this potentially damaging source. The BUF600 and
BUF601 incorporate on-chip ESD protection diodes as shown
in Figure 1. This eliminates the need for the user to add
external protection diodes, which can add capacitance and
degrade AC performance.
ESD Protection Diodes
internally connected to
all pins.
The internal protection diodes are designed to withstand
2.5kV (using the Human Body Model) and will provide
adequate ESD protection for most normal handling proce-
dures. However, static damage can cause subtle changes in
amplifier input characteristics without necessarily destroy-
ing the device. In precision amplifiers, this may cause a
noticeable degradation of offset and drift. Therefore, static
protection is strongly recommended when handling the
BUF600 and BUF601.
+VCC
External
Pin
Internal
Circuitry
–VCC
FIGURE 1. Internal ESD Protection.
TYPICAL PERFORMANCE CURVES
At VCC = ±5V, RLOAD = 10kΩ, and TA = 25°C, unless otherwise noted.
OFFSET VOLTAGE vs TEMPERATURE
5
INPUT BIAS CURRENT vs TEMPERATURE
2
4
3
2
1.8
BUF601
1.6
1.4
1.2
1
1
BUF600
0
–1
0.8
0.6
0.4
0.2
0
BUF600
BUF601
–2
–3
–4
–5
–40
–20
0
20
40
60
80
100
–40
–20
0
20
40
60
80
100
Temperature (°C)
Temperature (°C)
INPUT IMPEDANCE vs FREQUENCY BUF600
INPUT IMPEDANCE vs FREQUENCY BUF601
10M
1M
10M
1M
100k
10k
1k
100k
10k
1k
100
1k
10k
100k
1M
10M
100M
100
1k
10k
100k
1M
10M
100M
Frequency (Hz)
Frequency (Hz)
®
4
BUF600, 601
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5V, RLOAD = 10kΩ, and TA = 25°C, unless otherwise noted.
INPUT VOLTAGE NOISE
SPECTRAL DENSITY BUF600/601
QUIESCENT CURRENT vs TEMPERATURE
100
10
1
12
10
8
BUF601
6
BUFF600
BUFF601
BUF600
4
2
0
100
1000
Frequency (Hz)
10k
100k
–40
–20
0
20
40
60
80
100
Temperature (°C)
BUF600 TRANSFER FUNCTION
BUF600 GAIN ERROR vs INPUT VOLTAGE
(Full Temperature Range, RLOAD = 200Ω)
–40°C
5
4
14
12
10
8
BUF600
RLOAD = 200Ω
3
2
+25°C
85°C
1
0
6
–1
–2
–3
–4
–5
4
2
0
–5
–4
–3
–2
–1
0
1
2
3
4
5
–5 –4
–3
–2
–1
0
1
2
3
4
5
Input Voltage (V)
Input Voltage (V)
BUF601 GAIN ERROR vs INPUT VOLTAGE
BUF601 TRANSFER FUNCTION
14
12
10
8
5
4
(Full Temperature Range, RLOAD = 100Ω)
BUF601
RLOAD = 100Ω
–40°C
+25°C
3
2
+85°C
1
0
6
–1
–2
–3
–4
–5
4
2
0
–5 –4
–3
–2
–1
0
1
2
3
4
5
–5
–4
–3
–2
–1
0
1
2
3
4
5
Input Voltage (V)
Input Voltage (V)
®
5
BUF600, 601
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5V, RLOAD = 100Ω (BUF601), RLOAD = 200Ω (BUF600), and TA = 25°C, unless otherwise noted.
GROUP DELAY TIME vs FREQUENCY
2
BUF600/601 GAIN FLATNESS
1.5
1
2
1
0
0.5
0
BUF601
BUF600
–0.5
–1.0
–1.5
–2
RLOAD = 100Ω
VO = 0.2Vp-p BUF600 RLOAD = 200Ω
BUF601 RLOAD = 100Ω
–2.5
–3
300k
1M
10M
100M
1G
3G
300k
1M
10M
100M
1G
Frequency (Hz)
Frequency (Hz)
BUF600 SMALL SIGNAL PULSE RESPONSE
VI = 0.2Vp-p
BUF600 LARGE SIGNAL PULSE RESPONSE
160
120
80
4
3
VI = 5Vp-p
tRISE = tFALL = 1.5ns
(Generator)
tRISE = tFALL = 1.5ns
(Generator)
2
VI
VI
40
1
VO
VO
0
0
–40
–80
–120
–160
–1
–2
–3
–4
0
5
10
15
20
25
30
35
40
45
50
0
5
10
15
20
25
30
35
40
45
50
Time (ns)
Time (ns)
BUF600 SMALL SIGNAL PULSE RESPONSE
VI = 0.2Vp-p
BUF600 LARGE SIGNAL PULSE RESPONSE
VI = 5Vp-p
160
120
80
4
3
tRISE = tFALL = 3ns
(Generator)
tRISE = tFALL = 3ns
(Generator)
2
40
1
VI
VI
0
0
VO
VO
–40
–80
–120
–160
–1
–2
–3
–4
0
5
10
15
20
25
30
35
40
45
50
0
5
10
15
20
25
30
35
40
45
50
Time (ns)
Time (ns)
®
6
BUF600, 601
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5V, RLOAD = 100Ω (BUF601), RLOAD = 200Ω (BUF600), and TA = 25°C, unless otherwise noted.
BUF601 SMALL SIGNAL PULSE RESPONSE
BUF601 LARGE SIGNAL PULSE RESPONSE
VI = 5Vp-p
160
120
80
4
3
VI = 0.2Vp-p
tRISE = tFALL = 1.5ns
(Generator)
tRISE = tFALL = 1.5ns
(Generator)
2
VO
VI
40
1
VI
VO
0
0
–40
–80
–120
–160
–1
–2
–3
–4
0
5
10
15
20
25
30
35
40
45
50
0
5
10
15
20
25
30
35
40
45
50
Time (ns)
Time (ns)
BUF601 SMALL SIGNAL PULSE RESPONSE
VI = 0.2Vp-p
BUF601 LARGE SIGNAL PULSE RESPONSE
VI = 5Vp-p
160
120
80
4
3
tRISE = tFALL = 3ns
(Generator)
tRISE = tFALL = 3ns
(Generator)
2
40
1
VI
VI
0
0
VO
VO
–40
–80
–120
–160
–1
–2
–3
–4
0
5
10
15
20
25
30
35
40
45
50
0
5
10
15
20
25
30
35
40
45
50
Time (ns)
Time (ns)
BUF601 BANDWIDTH vs COUT with RECOMMENDED RS
BUF600 BANDWIDTH vs COUT with RECOMMENDED RS
20
15
20
15
+5V
1
+5V
1
RS
180Ω
RS
VO
COUT
180Ω
VI
VO
VI
8
8
601
600
4
4
10
10
COUT
RIN
RIN
RL
5
RL
5
–5V
5
–5V
5
0
0
–5
RS COUT
f–3dB
–5
RS COUT
f–3dB
1
1
2
2
3
3
1
2
3
4
0Ω 1pF 980MHz
30Ω 12pF 435MHz
15Ω 33pF 260MHz
12Ω 47pF 215MHz
4
1
0Ω 1pF 820MHz
30Ω 12pF 425MHz
15Ω 33pF 270MHz
12Ω 47pF 215MHz
–10
–15
–20
–25
–30
4
–10
–15
–20
–25
–30
2
3
4
VI = 0.4Vp-p
VI = 0.4Vp-p
1M
300k
1M
10M
100M
1G
3G
300k
10M
100M
1G
3G
Frequency (Hz)
Frequency (Hz)
®
7
BUF600, 601
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5V, RLOAD = 100Ω (BUF601), RLOAD = 200Ω (BUF600), and TA = 25°C, unless otherwise noted.
BUF600 BANDWIDTH vs RLOAD
BUF601 BANDWIDTH vs RLOAD
VI = 0.2Vp-p
20
15
20
15
V1 = 0.2Vp-p
10
10
5
5
50Ω
150Ω
0
0
–5
–5
100Ω
150Ω
500Ω
1kΩ
–10
–15
–20
–25
–30
–10
–15
–20
–25
–30
300k
1M
10M
100M
1G
3G
300k
1M
10M
100M
1G
3G
Frequency (Hz)
Frequency (Hz)
BUF600 BANDWIDTH vs OUTPUT VOLTAGE
BUF601 BANDWIDTH vs OUTPUT VOLTAGE
20
15
20
15
5Vp-p
5Vp-p
2.8Vp-p
2.8Vp-p
10
10
5
5
1.4Vp-p
0.6Vp-p
1.4Vp-p
0.6Vp-p
0
0
–5
–5
–10
–15
–20
–25
dB
–10
–15
–20
–25
dB
0.2Vp-p
0.2Vp-p
300k
1M
10M
100M
1G
3G
300k
1M
10M
100M
1G
3G
Frequency (Hz)
Frequency (Hz)
HARMONIC DISTORTION vs FREQUENCY
HARMONIC DISTORTION vs FREQUENCY
0
–10
–20
–30
–40
–50
–60
–70
–80
0
–10
–20
–30
–40
–50
–60
–70
–80
BUF601 RLOAD = 100Ω
BUF600 RLOAD = 200Ω
2f
3f
2f
3f
0.1M
1M
10M
Frequency (Hz)
100M
0.1M
1M
10M
Frequency (Hz)
100M
®
8
BUF600, 601
TYPICAL PERFORMANCE CURVES (CONT)
At VCC = ±5V, RLOAD = 100Ω (BUF601), RLOAD = 200Ω (BUF600), and TA = 25°C, unless otherwise noted.
IQ vs TIME (Warmup)
BUF600, BUF601 GAIN ERROR vs INPUT VOLTAGE
100
99
98
97
96
95
94
5
4
3
2
1
0
(Full Temperature Range, RLOAD = 10kΩ)
BUF600
BUF601
BUF600
BUF601
0
1
2
3
4
5
6
7
8
–5 –4
–3
–2
–1
0
1
2
3
4
5
Input Voltage (V)
Time (s)
DISCUSSION OF
PERFORMANCE
The BUF600 and BUF601 are fabricated using a high-
performance complementary bipolar process, which
provides high-frequency NPN and PNP transistors with
variations in source impedances. A resistor between 100Ω
and 250Ω in series with the buffer input lead will usually
eliminate oscillation problems from inductive sources such
as unterminated cables without sacrificing speed.
gigahertz transition frequencies (f ). Power supplies are
Τ
rated at ±6V maximum, with the data sheet parameters
specified at ±5V supplies. The BUF600 and BUF601 are
3-stage open-loop buffer amplifiers consisting of comple-
mentary emitter followers with a symmetrical class AB
Darlington output stage. The complementary structure pro-
vides both sink and source current capability independent of
the output voltage, while maintaining constant output and
input impedances. The amplifiers use no feedback, so their
low-frequency gain is slightly less than unity and somewhat
dependent on loading. The optimized input stage is respon-
sible for the high slew rate of up to 3600V/µs, wide large
signal bandwidth of 320MHz, and quiescent current reduc-
tion to ±3mA (BUF600) and ±6mA (BUF601). These
features yield an excellent large signal bandwidth/quiescent
current ratio of 320MHz, 5Vp-p at 3mA/6mA quiescent
current. The complementary emitter followers of the input
stage work with current sources as loads. The internal PTAT
power supply controls their quiescent current and with
its temperature characteristics keeps the transconductance
of the buffer amplifiers constant. The Typical Performance
Curves show the quiescent current variation versus
temperature.
Another excellent feature is the output-to-input isolation
over a wide frequency range. This characteristic is very
important when the buffer drives different equipment over
cables. Often the cable is not perfect or the termination is
incorrect and reflections arise that act like a signal source at
the output of the buffer.
Open-loop devices often sacrifice linearity and introduce
frequency distortion when driving low load impedance. The
BUF600 and BUF601, however, do not. Their design yields
low distortion products. The harmonic distortion character-
istics into loads greater than 100Ω (BUF601) and greater
than 200Ω (BUF600) are shown in the Typical Performance
Curves. The distortion can be improved even more by
increasing the load resistance.
Differential gain (DG) and differential phase (DP) are among
the important specifications for video applications. DG is
defined as the percent change in gain over a specified change
in output voltage level (0V to 0.7V.) DP is defined as the
phase change in degrees over the same output voltage
change. Both DG and DP are specified at the PAL subcarrier
frequency of 4.43MHz. The errors for differential gain are
lower than 0.5%, while those for differential phase are lower
than 0.04°.
The cross current in the input stage is kept very low,
resulting in a low input bias current of 0.7µA/1.5µA and
high input impedance of 4.8MΩ || 1pF/2.5MΩ || 1pF. The
second stage drives the output transistors and reduces the
output impedance and the feedthrough from output to input
when driving RLC loads.
With its minimum 20mA long-term DC output current
capability, 50mA pulse current, low output impedance over
frequency, and stability to drive capacitive loads, the BUF601
can drive 50Ω and 75Ω systems or lines. The BUF600 with
lower quiescent current and therefore higher output imped-
ance is well-suited primarily to interstage buffering. This
type of open-loop amplifier is a new and easy-to-use step to
prevent an interaction between two points in complex high-
speed analog circuitry.
The input of the BUF600 and BUF601 looks like a high
resistance in parallel with a 1pF capacitance. The input
characteristics change very little with output loading and
input voltage swing. The BUF600 and BUF601 have excel-
lent input-to-output isolation and feature high tolerance to
®
9
BUF600, 601
The buffer outputs are not current-limited or protected. If the
output is shorted to ground, high currents could arise when
the input voltage is ±3.6V. Momentary shorts to ground (a
few seconds) should be avoided but are unlikely to cause
permanent damage.
+5V Pos
C4
2.2µF
C2
470nF
BUF600AP
1
RIN
ROUT
51Ω
Out
In
CIRCUIT LAYOUT
8
4
+1
The high-frequency performance of the BUF600 and BUF601
can be greatly affected by the physical layout of the printed
circuit board. The following tips are offered as suggestions,
not as absolute musts. Oscillations, ringing, poor bandwidth
and settling, and peaking are all typical problems that plague
high-speed components when they are used incorrectly.
160Ω
5
GND
C3
2.2µF
C1
470nF
–5V Neg
•
Bypass power supplies very close to the device pins. Use
tantalum chip capacitors (approximately 2.2µF); a paral-
lel 470nF ceramic chip capacitor may be added if desired.
Surface-mount types are recommended due to their low
lead inductance.
FIGURE 2. Test Circuit.
IMPEDANCE MATCHING
The BUF600 and BUF601 provide power gain and isolation
between source and load when used as an active tap or
impedance matching device as illustrated in Figure 3. In this
example, there is no output matching path between the
buffer and the 75Ω line. Such matching is not needed when
the distant end of the cable is properly terminated, since
there is no reflected signal when the buffer isolates the
source. This technique allows the full output voltage of the
buffer to be applied to the load.
•
•
•
PC board traces for power lines should be wide to reduce
impedance or inductance.
Make short and low inductance traces. The entire physi-
cal circuit should be as small as possible.
Use a low-impedance ground plane on the component
side to ensure that low-impedance ground is available
throughout the layout.
•
•
•
Do not extend the ground plane under high-impedance
nodes sensitive to stray capacitances, such as the buffer’s
input terminals.
+5V
Sockets are not recommended, because they add signifi-
cant inductance and parasitic capacitance. If sockets must
be used, consider using zero-profile solderless sockets.
2.2µF
470nF
Use low-inductance and surface-mounted components.
Using all surface-mount components will offer the best
AC performance.
1
75Ω
VI
VO
8
4
BUF
160Ω
300Ω
5
•
•
A resistor (100Ω to 250Ω) in series with the input of the
buffers may help to reduce peaking.
75Ω
2.2µF
Plug-in prototype boards and wire-wrap boards will not
function well. A clean layout using RF techniques is
essential—there are no shortcuts.
470nF
–5V
FIGURE 3. Impedance Converter.
®
10
BUF600, 601
DRIVING CABLES
Direct Drive
The most obvious way is to connect the cable directly to the
output of the buffer. This results in a gain determined by the
buffer output resistance and the characteristic impedance of
the cable, assuming it is properly terminated.
+5V
ZO
AV
=
ZO + RO
1
BUF
5
ZO
8
4
Double termination of a cable is the cleanest way to drive it,
since reflections are absorbed on both ends of the cable. The
cable source resistor is equal to the characteristic impedance
less the output resistance of the buffer amplifiers. The gain
is –6dB excluding of the cable attenuation.
VI
VO
150Ω
ZO
ZO
–5V
+5V
VIDEO DISTRIBUTION AMPLIFIER
In this broadcast quality circuit, the OPA623 provides a very
high input impedance so that it may be used with a wide
variety of signal sources including video DACs, CCD cam-
eras, video switches or 75Ω cables. The OPA623 provides a
voltage gain of 2.5V/V, while the potentiometer of 200Ω
allows the overall gain to be adjusted to drive the standard
signal levels into the back-terminated 75Ω cables. Back
matching prevents multiple reflections in the event that the
remote end of the cable is not properly terminated.
ROUT = ZO – RO
1
BUF
5
ZO
8
4
VI
VO
150Ω
ROUT
ZO
ZO
–5V
AV = – 6dB
Double Matched
FIGURE 4. Driving Cables.
+5V
2.2µF
470nF
1
68Ω
120Ω
120Ω
120Ω
8
4
4
4
BUF601
VO
VO
VO
5
–5V
2.2µF
470nF
+5V
2.2µF
470nF
1
BUF601
5
68Ω
8
+5V
–5V
2.2µF
470nF
+5V
7
OPA658
4
3
2.2µF
470nF
VI
6
150Ω
2
200Ω
75Ω
1
BUF601
5
68Ω
8
–5V
250Ω
100Ω
470nF
2.2µF
–5V
FIGURE 5. Video Distribution Amplifier.
®
11
BUF600, 601
+5V
2.2µF
470nF
8
1
BUF601
5
100Ω
8
4
VO
120Ω
3
VI
DT
2
+5V
470nF
OPA660
2.2µF
100Ω
R
150Ω
1
7
–5V
6
5
+
DB
4
1
R2
150Ω
–5V
RQ
250Ω
R2
G = +2 = 1 +
R1
–5V
FIGURE 6. Inside a Feedback Loop of a Voltage Feedback Amplifier (BUF601 and OPA660).
+5V
2.2µF
470nF
8
1
BUF601
5
VO
150Ω
75Ω
4
VO
100Ω
8
R2
240Ω
DT
3
2
2.2µF
+5V
470nF
2.2µF
OPA660
10nF
–5V
470pF
R1
42Ω
7
100Ω
6
5
DB
VI
4
1
75Ω
470pF
250Ω
R2
2 (R1 + ROUT
VO
VI
10nF
G ≈ –
= –2.031 =
)
2.2µF
–5V
FIGURE 7. Output Buffer for an Inverting RF-Amplifier (Direct Feedback).
®
12
BUF600, 601
+5V
68nF
150Ω
1
BUF600/1
5
8
4
VI
VO
75Ω
47kΩ
–5V
+5V
1kΩ
1kΩ
CA 3080
–5V
10kΩ
Clamp
Pulse
0.1µF
47kΩ
2N3904
1N
4148
4Vp-p
560kΩ
–5V
FIGURE 8. Input Amplifier with Baseband Video DC Restoration.
+5V
RIN
160Ω
ROUT
51Ω
Generator
Network
Analyzer
1
DUT
5
50Ω
50Ω
In
Out
8
4
RIN
50Ω
=
RIN
50Ω
50Ω
–5V
Test Fixture
FIGURE 9. Test Circuit Frequency Response.
+5V
RIN
160Ω
ROUT
51Ω
Pulse
Generator
Digitizing
Scope
1
DUT
5
50Ω
50Ω
In
Out
8
4
RIN
50Ω
=
RIN
50Ω
=
50Ω
–5V
Test Fixture
FIGURE 10. Test Circuit Pulse Response.
®
13
BUF600, 601
+5V
+5V
7
RIN
160Ω
ROUT
75Ω
Generator
1
DUT
5
120Ω
75Ω
Video
Analyzer
In
Out
8
3
2
4
75Ω
75Ω
6
OPA681
RIN =
RIN =
75Ω
75Ω
4
75Ω
75Ω
–5V
Test Fixture
–5V
4.43MHz
400Ω
VDC
400Ω
FIGURE 11. Test Circuit Differential Gain and Phase.
®
14
BUF600, 601
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