DCP010512 [BB]
Miniature 5V Input, 1W Isolated UNREGULATED DC/DC CONVERTERS; 微型5V输入， 1W隔离非稳压DC / DC转换器
| 型号： | DCP010512 |
| 厂家： | 
BURR-BROWN CORPORATION |
| 描述： | Miniature 5V Input, 1W Isolated UNREGULATED DC/DC CONVERTERS |
| 文件： | 总17页 (文件大小：200K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
D
®
CP0105
DCP0105
Series
DCP0105
Miniature 5V Input, 1W Isolated
UNREGULATED DC/DC CONVERTERS
FEATURES
● STANDARD JEDEC PLASTIC PACKAGE
DESCRIPTION
The DCP0105 family is a series of high efficiency, 5V
input isolated DC/DC converters. In addition to 1W
nominal galvanically isolated output power capability,
the range of DC/DCs are also fully synchronizable.
The devices feature thermal shutdown, and overload
protection is implemented via watchdog circuitry.
Advanced power-on reset techniques give superior
reset performance and the devices will start into any
capacitive load up to full power output.
● MEETS EN55022 CLASS B
● LOW PROFILE: 0.15" (3.8mm)
● SYNCHRONIZABLE
● OUTPUT SHORT CIRCUIT PROTECTION
● THERMAL SHUTDOWN
● STARTS INTO ANY CAPACITIVE LOAD
● FLOATING OUTPUTS
The DCP0105 family is implemented in standard-
molded IC packaging, giving outlines suitable for high
volume assembly.
● EFFICIENCY: Up to 75% (at Full Load)
● 1000Vrms ISOLATION
● 400kHz SWITCHING
● 108 MILLION HOURS MTTF
● 5V, ±5V, 12V, ±12V, 15V, ±15V OUTPUTS
● AVAILABLE IN TAPE AND REEL
APPLICATIONS
● POINT OF USE POWER CONVERSION
● DIGITAL INTERFACE POWER
● GROUND LOOP ELIMINATION
● DATA ACQUISITION
SYNCOUT
÷ 2
Reset
800kHz
Oscillator
VOUT
0V
● INDUSTRIAL CONTROL AND
Power
Stage
INSTRUMENTATION
● TEST EQUIPMENT
Watch-dog/
start-up
SYNCIN
PSU
Thermal
Shutdown
IBIAS
VS
Power Controller IC
0V
ternational Airport Industrial Park
•
Mailing Address: PO Box 11400, Tucson, AZ 85734
•
Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706
• Tel: (520) 746-1111
Twx: 910-952-1111 Internet: http://www.burr-brown.com/
•
•
Cable: BBRCORP Telex: 066-6491
•
•
FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
•
©1996 Burr-Brown Corporation
PDS-1336G
Printed in U.S.A. May, 1999
SPECIFICATIONS
At TA = +25°C, VS = +5V, unless otherwise specified.
DCP0105 SERIES
TYP
PARAMETER
CONDITIONS
MIN
MAX
UNITS
OUTPUT
Power
VS + 4%
1
W
W
100% Full Load
0.92
Voltage (VNOM
)
DCP010505
DCP010505D
DCP010512
75% Full Load(1)
75% Full Load
75% Full Load
75% Full Load
75% Full Load
75% Full Load
4.6
±4.6
11.2
±11.2
14.0
±14.0
5
±5
5.1
±5.1
12.4
±12.4
15.5
±15.5
V
V
12
V
DCP010512D
DCP010515
±12
15
V
V
DCP010515D
Voltage vs Temperature
Short-Circuit Duration
Ripple
±15
±0.08
V
%/°C
VS ± 10%
Indefinite
CL = O/P Capacitor = 10µF
20
5
mVp-p
INPUT
Nominal Voltage (VS)
Voltage Range
V
%
–10
10
Supply Current
100% Full Load
CIN = I/P Capacitor = 1µF
50% Full Load
250
20
mA
Reflected Ripple Current
mArms
ISOLATION
Voltage(2)
Continuous Voltage(3)
1s Flash Test
1
kVrms
kVrms
1
Insulation Resistance
>1
GΩ
Input/Output Capacitance
2.5
pF
LOAD REGULATION
DCP010505
10% to 100% Load
10% to 75% Load
75% to 100% Load
25
17
–8
31
%
%
%
DCP010505D
DCP010512
10% to 100% Load
10% to 75% Load
75% to 100% Load
10% to 100% Load
10% to 25% Load
25% to 75% Load
75% to 100% Load
25
19
–8
17
7
32
38
%
%
%
%
%
%
%
12
–7
DCP010512D
10% to 100% Load
10% to 25% Load
25% to 75% Load
75% to 100% Load
20
7
12
–7
37
42
41
%
%
%
%
DCP010515
10% to 100% Load
10% to 25% Load
25% to 75% Load
75% to 100% Load
20
11
12
–7
%
%
%
%
DCP010515D
10% to 100% Load
10% to 25% Load
25% to 75% Load
75% to 100% Load
16
11
12
–7
%
%
%
%
SWITCHING/SYNCHRONIZATION
Oscillator Frequency (FOSC
)
Switching Frequency = FOSC/2
VSYNC = +2V
800
kHz
V
Sync Input Low
0
0.8
Sync Input Current
Reset Time
48
3.8
400
µA
µs
SYNCOUT Frequency
kHz
GENERAL
No Load Current
DCP010505P
DCP010505DP
DCP010512P
DCP010512DP
DCP010515P
DCP010515DP
0% Full Load
0% Full Load
0% Full Load
0% Full Load
0% Full Load
0% Full Load
38
40
30
33
34
34
mA
mA
mA
mA
mA
mA
®
2
DCP0105
SPECIFICATIONS (CONT)
At TA = +25°C, VS = +5V, unless otherwise specified.
DCP0105 SERIES
TYP
PARAMETER
CONDITIONS
MIN
MAX
UNITS
GENERAL (Cont)
Efficiency
DCP010505
100% Full Load
10% Full Load
100% Full Load
10% Full Load
100% Full Load
10% Full Load
100% Full Load
10% Full Load
100% Full Load
10% Full Load
100% Full Load
10% Full Load
TA = +85°C
71
40
66
47
72
38
72
36
73
40
75
38
%
%
DCP010505D
DCP010512
DCP010512D
DCP010515
DCP010515D
MTTF(3)
%
%
%
%
%
%
%
%
%
%
158,000
3,050,000
108,000,000
hrs
hrs
hrs
TA = +55°C
TA = +25°C
Weight
14-Pin PDIP
1.08
3
g
THERMAL SHUTDOWN
Internal Controller IC Temperature
Shutdown Current
115
–40
140
°C
mA
TEMPERATURE RANGE
Operating
+100
°C
NOTES: (1) 100% load current = 1W/VNOM typical. (2) Rated working voltage = 130Vrms (IEC950 Convention). (3) Life test data.
EMC SPECIFICATIONS
Specifications and Related Documents
The DCP010505 was tested to and complied with the limits of the following EMC specifications:
prEN55022 (1992)
EN55022 (1995)
Conducted RF emission, telecomm lines.
Limits and methods of measurement of radio interference characteristics of information technology equipment.
Electromagnetic compatibility. Basic immunity standard. Radiated RF immunity.
ENV50140 (1993)
ENV50141 (1993)
EN61000-4-2 (1995)
Electromagnetic compatibility. Basic immunity standard. Conducted RF immunity.
Electromagnetic compatibility, Part 4. Testing and measurement techniques, Section 2. Electrostatic
discharge.
EN61000-4-4 (1995)
EN61000-4-8 (1994)
Electromagnetic compatibility, Part 4. Testing and measurement techniques, Section 4. Electrical fast
transient bursts.
Electromagnetic compatibility, Part 4. Testing and measurement techniques, Section 8. Power frequency
magnetic field immunity.
List of Tests
The following is a list of tests which were required for compliance with the above specifications:
Conducted Emission Test
150kHz to 30MHz, power and output lines, Class B limits applying. DC/DC loads of
0%, 8%, and 120% applying.
Radiated Emission Test
30MHz to 1000MHz, Class B limits applying. DC/DC loads of 0%, 8%, and 120%
applying.
Radiated Immunity Test, Electric Field
Radiated Immunity Test, Electric Field
Electrostatic Discharge Test
80MHz to 1000MHz, 10V/m, 1kHz 80% AM.
900MHz, 10V/m, 200Hz 100% PM.
4kV, HCP/VCP indirect discharge only.
2kV power lines, 2kV signal lines.
Electrical Fast Transient Tests
Conducted RF Immunity Tests
150kHz to 80MHz, power and output lines, 10Vrms, 1kHz 80% AM.
50Hz, 30A/m
Radiated Immunity Test, Magnetic Field
®
3
DCP0105
PIN CONFIGURATION (Single)
PIN CONFIGURATION (Dual)
Top View
DIP
Top View
DIP
VS
0V
1
2
14 SYNCIN
VS
0V
1
2
14 SYNCIN
DCP0105
DCP0105
0V
+VOUT
NC
5
6
7
0V
+VOUT
–VOUT
5
6
7
8
SYNCOUT
8
SYNCOUT
PIN DEFINITIONS (Single)
PIN DEFINITIONS (Dual)
PIN #
PIN NAME
DESCRIPTION
PIN #
PIN NAME
DESCRIPTION
1
2
5
6
7
8
14
VS
0V
0V
Voltage Input.
1
2
5
6
7
8
14
VS
0V
0V
Voltage Input.
Input Side Common.
Output Side Common.
+Voltage Out.
Not Connected.
Unregulated 400kHz Output from Transformer.
Synchronization Pin.
Input Side Common.
Output Side Common.
+Voltage Out.
–Voltage Out.
Unregulated 400kHz Output from Transformer.
Synchronization Pin.
+VOUT
NC
SYNCOUT
SYNCIN
+VOUT
–VOUT
SYNCOUT
SYNCIN
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes
no responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change
without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant
any BURR-BROWN product for use in life support devices and/or systems.
®
4
DCP0105
ABSOLUTE MAXIMUM RATINGS
ELECTROSTATIC
DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown
recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling
and installation procedures can cause damage.
Input Voltage .......................................................................................... 7V
Storage Temperature ...................................................... –60°C to +150°C
Lead Temperature (soldering, 10s) ................................................. 300°C
ORDERING INFORMATION
(
)
(D )
05 05
DCP01
ESD damage can range from subtle performance degrada-
tion to complete device failure. Precision integrated circuits
may be more susceptible to damage because very small
parametric changes could cause the device not to meet its
published specifications.
Basic Model Number: 1W Product
Voltage Input:
5V In
Voltage Output:
5V Out
Dual Output:
Package Code:
P = 14-Pin Plastic DIP
P-U = 14-Pin Plastic DIP Gull Wing
PACKAGE/ORDERING INFORMATION
PACKAGE
SPECIFIED
DRAWING
NUMBER(1)
TEMPERATURE
RANGE
PACKAGE
MARKING
ORDERING
NUMBER(2)
TRANSPORT
MEDIA
PRODUCT
PACKAGE
Single
DCP010505
DCP010505
"
DCP010512
DCP010512
"
DCP010515
DCP010515
"
14-Pin PDIP
14-Pin PDIP Gull Wing
010-1
010-2
"
010-1
010-2
"
010-1
010-2
"
–40°C to +100°C
–40°C to +100°C
DCP010505P
DCP010505P-U
DCP010505P
DCP010505P-U
DCP010505P-U/700
DCP010505P
DCP010505P-U
DCP010505P-U/700
DCP010505P
Rails
Rails
Tape and Reel
Rails
Rails
Tape and Reel
Rails
"
"
"
14-Pin PDIP
14-Pin PDIP Gull Wing
–40°C to +100°C
–40°C to +100°C
"
–40°C to +100°C
–40°C to +100°C
"
DCP010512P
DCP010512P-U
"
DCP010515P
DCP010515P-U
"
"
14-Pin PDIP
14-Pin PDIP Gull Wing
"
DCP010505P-U
DCP010505P-U/700
Rails
Tape and Reel
Dual
DCP010505D
DCP010505D
"
DCP010512D
DCP010512D
"
DCP010515D
DCP010515D
"
14-Pin PDIP
14-Pin PDIP Gull Wing
010-1
010-2
"
010-1
010-2
"
010-1
010-2
"
–40°C to +100°C
–40°C to +100°C
DCP010505DP
DCP010505DP-U
DCP010505DP
DCP010505DP-U
DCP010505DP-U/700
DCP010512DP
DCP010512DP-U
DCP010512DP-U/700
DCP010515DP
Rails
Rails
Tape and Reel
Rails
Rails
Tape and Reel
Rails
"
"
"
14-Pin PDIP
14-Pin PDIP Gull Wing
–40°C to +100°C
–40°C to +100°C
"
–40°C to +100°C
–40°C to +100°C
"
DCP010512DP
DCP010512DP-U
"
DCP010515DP
DCP010515DP-U
"
"
14-Pin PDIP
14-Pin PDIP Gull Wing
"
DCP010515DP-U
DCP010515DP-U/700
Rails
Tape and Reel
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are
available only in Tape and Reel in the quantities indicated (e.g., /700 indicates 700 devices per reel). Ordering 700 pieces of DCP010505P-U/700 will get a single
700-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.
®
5
DCP0105
TYPICAL PERFORMANCE CURVES (Common and DCP010505 Specific)
At TA = +25°C, VOUT nominal (VNOM) = +5V and VS = +5V, unless otherwise noted.
DCP010505 EFFICIENCY vs LOAD
DCP010505 OUTPUT VOLTAGE vs LOAD
75
70
65
60
55
50
45
40
35
30
5.8
5.6
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4
0
10
20
30
40
50
60
70
80
90 100
10
25
50
75
100
Full Load (%)
Full Load (%)
PEAK-TO-PEAK RIPPLE VOLTAGE vs LOAD
CL = 200nF
REFLECTED rms RIPPLE CURRENT vs LOAD
CIN = 100nF
180
160
140
120
100
80
80
70
60
50
40
30
20
10
0
CIN = 1µF
60
CL = 1µF
40
20
CL = 10µF
80 90 100
0
0
10
20
30
40
50 60
Load (%)
70
0
10
20
30
40
50 60
Load (%)
70
80
90 100
DCP010505 OUTPUT vs INPUT VOLTAGE (75% Load)
SWITCHING FREQUENCY vs SUPPLY VOLTAGE
5.6
5.4
5.2
5
100.0
99.95
99.90
99.85
99.80
99.75
99.70
4.8
4.6
4.4
4.2
4
4.5
4.75
5
5.25
5.5
4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5
Input Supply Voltage (V)
Input (V)
®
6
DCP0105
TYPICAL PERFORMANCE CURVES (Common and DCP010505 Specific, cont)
At TA = +25°C, VOUT nominal (VNOM) = +5V and VS = +5V, unless otherwise noted.
DCP010505 OUTPUT POWER vs TEMPERATURE
SWITCHING FREQUENCY vs TEMPERATURE
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
101
100
99
98
97
96
95
94
93
92
–40 –30 –20 –10
0
10 20 25 30 40 50 60 70 80 90 95 100 105 110 115 120
–40
–20
0
20
40
60
80
100
120
200
30
Temperature (°C)
Temperature (°C)
RADIATED EMISSIONS (120% Load)
RADIATED EMISSIONS (8% Load)
90
70
50
30
10
90
70
50
30
10
55022B (3m) Limit
55022B (3m) Limit
30
100
30
100
200
Frequency (MHz)
Frequency (MHz)
CONDUCTED EMISSIONS (8% Load)
CONDUCTED EMISSIONS (120% Load)
70
50
70
50
55022B QP Limit
55022B AV Limit
55022B QP Limit
55022B AV Limit
30
30
10
10
–10
–10
0.15
1
10
30
0.15
1
10
Frequency (MHz)
Frequency (MHz)
®
7
DCP0105
TYPICAL PERFORMANCE CURVES (DCP010505D Specific)
At TA = +25°C, VOUT nominal (VNOM) = ±5V and VS = +5V, unless otherwise noted.
DCP010505D OUTPUT vs INPUT VOLTAGE (75% Load)
DCP010505D OUTPUT VOLTAGE vs LOAD
5.6
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
5.80
5.60
5.40
5.20
5.00
4.80
4.60
4.40
4.20
4.00
+VOUT
–VOUT
+VOUT
–VOUT
4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5
Input Voltage (V)
0
10
20
30 40
50
60
70
80
90 100
Load (%)
DCP010505D LOAD BALANCE (+VOUT Load = 10%)
DCP010505D LOAD BALANCE (+VOUT Load = 100%)
6
4
6
4
+VOUT
–VOUT
+VOUT
–VOUT
2
2
0
0
–2
–4
–6
–2
–4
–6
10
40
70
100
10
40
70
100
–VOUT Load (% of FL)
–VOUT Load (% of FL)
DCP010505D POWER vs TEMPERATURE
DCP010505D EFFICIENCY vs LOAD
1
75
70
65
60
55
50
45
40
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–40
–20
0
20
40
60
80
100
0
10
20
30
40
50
60 70
80
90 100
Temperature (°C)
Load (%)
®
8
DCP0105
TYPICAL PERFORMANCE CURVES (DCP010512 Specific)
At TA = +25°C, VOUT nominal (VNOM) = +12V and VS = +5V, unless otherwise noted.
DCP010512 OUTPUT vs INPUT VOLTAGE (75% Load)
DCP010512 OUTPUT VOLTAGE vs LOAD
14
13.5
13
15
14.5
14
13.5
13
12.5
12
12.5
12
11.5
11
11.5
11
10.5
10
10.5
10
4.5
4.75
5
5.25
5.5
10
20
30
40
50
60
70
80
90
100
Input Voltage (V)
Load (%FL)
DCP010512 OUTPUT POWER vs TEMPERATURE
DCP010512 EFFICIENCY vs LOAD
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
80
75
70
65
60
55
50
45
40
35
30
–40 –30 –20 –10
0
10 20 25 30 40 50 60 70 80 90 95 100 105 110 115 120
0
10
20
30
40
50
60
70
80
90 100
Temperature (°C)
% of Full Load
®
9
DCP0105
TYPICAL PERFORMANCE CURVES (DCP010512D Specific)
At TA = +25°C, VOUT nominal (VNOM) = ±12V and VS = +5V, unless otherwise noted.
DCP010512D OUTPUT vs INPUT VOLTAGE (75% Load)
DCP010512D OUTPUT VOLTAGE vs LOAD
13.5
13.0
12.5
12.0
11.5
11.0
10.5
10.0
14.5
14.0
13.5
13.0
12.5
12.0
11.5
11.0
10.5
10.0
+VOUT
–VOUT
+VOUT
–VOUT
4.5
4.75
5
5.25
5.5
0
10
20 30
40
50
60
70
80
90 100
Input Voltage (V)
Load (% FL)
DCP010512D LOAD BALANCE (+VOUT Load = 10%)
DCP0101512D LOAD BALANCE (+VOUT Load = 100%)
15
10
5
15
10
5
+VOUT
–VOUT
+VOUT
–VOUT
0
0
–5
–10
–15
–5
–10
–15
50
10
190
100
75
50
10
100
75
–VOUT Load (% of FL)
–VOUT Load (% of FL)
DCP010512D EFFICIENCY vs LOAD
DCP010512D OUTPUT POWER vs TEMPERATURE
80
75
70
65
60
55
50
45
40
35
30
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–40 –30 –20 –10
0
10 20 25 30 40 50 60 70 80 90 95 100 105 110 115 120
0
10
20
30
40
50
60
70
80
90 100
Temperature (°C)
% of Full Load
®
10
DCP0105
TYPICAL PERFORMANCE CURVES (DCP010515 Specific)
At TA = +25°C, VOUT nominal (VNOM) = +15V and VS = +5V, unless otherwise noted.
DCP010515 OUTPUT vs INPUT VOLTAGE (75% Load)
DCP010515 OUTPUT VOLTAGE vs LOAD
16.5
16
19
18
17
16
15
14
13
12
11
10
15.5
15
14.5
14
13.5
13
4.5
4.75
5
5.25
5.5
10
20
30
40
50
60
70
80
90
100
Input Voltage (V)
Load (% FL)
DCP010515 OUTPUT POWER vs TEMPERATURE
DCP010515 EFFICIENCY vs LOAD
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
80
75
70
65
60
55
50
45
40
35
30
–40 –30 –20 –10
0
10 20 25 30 40 50 60 70 80 90 95 100 105 110 115 120
0
10
20
30
40
50
60
70
80
90 100
Temperature (°C)
% of Full Load
®
11
DCP0105
TYPICAL PERFORMANCE CURVES (DCP010515D Specific)
At TA = +25°C, VOUT nominal (VNOM) = ±15V and VS = +5V, unless otherwise noted.
DCP010515D OUTPUT vs INPUT VOLTAGE (75% Load)
DCP010515D OUTPUT VOLTAGE vs LOAD
17
16
15
14
13
12
11
10
19
18
17
16
15
14
13
12
11
10
+VOUT
–VOUT
+VOUT
–VOUT
4.5
4.75
5
5.25
5.5
0
10
20 30
40
50
60
70
80
90 100
Input Voltage (V)
Load (% FL)
DCP010515D LOAD BALANCE (+VOUT Load = 10%)
DCP010515D LOAD BALANCE (+VOUT Load = 100%)
20
15
20
15
10
10
+VOUT
–VOUT
+VOUT
–VOUT
5
5
0
0
–5
–5
–10
–15
–20
–10
–15
–20
50
10
50
10
190
100
75
100
75
–VOUT Load (% of FL)
–VOUT Load (% of FL)
DCP010515D EFFICIENCY vs LOAD
DCP010515D OUTPUT POWER vs TEMPERATURE
80
75
70
65
60
55
50
45
40
35
30
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
–40 –30 –20 –10
0
10 20 25 30 40 50 60 70 80 90 95 100 105 110 115 120
0
10
20
30
40
50
60
70
80
90 100
Temperature (°C)
% of Full Load
®
12
DCP0105
THERMAL SHUTDOWN
FUNCTIONAL DESCRIPTION
OVERVIEW
The DCP0105 is also protected by thermal shutdown. If the
on-chip temperature reaches a predetermined value, the DC/
DC will shutdown. This effectively gives indefinite short
circuit protection for the DC/DC.
The DCP0105 offers 1W of unregulated output power from
a 5V input source with a typical efficiency of up to 75%.
This is achieved through highly integrated packaging tech-
nology and the implementation of a custom power stage and
control IC.
SYNCHRONIZATION
Any number of DCP0105 devices can be synchronized
by connecting the SYNCIN pins on the devices together
(see Figure 1). All the DCP0105 devices will then self-
synchronize.
POWER STAGE
This uses a push-pull, center-tapped topology switching at
400kHz (divide by 2 from 800kHz oscillator).
This same synchronization method will apply to other VIN
versions of the DCP01 family, allowing synchronization of
various VOUT and VIN DC/DCs.
OSCILLATOR AND WATCHDOG
The on-board 800kHz oscillator provides the switching
frequency via a divide by 2 circuit and allows synchroniza-
tion via the SYNCIN pins. To synchronize any number of
DCP0105 family of devices, simply tie the SYNCIN pins
together (see the Synchronization section). The watchdog
circuitry protects the DC/DC against a stopped oscillator and
checks the oscillator frequency which will shut down the
output stage if it drops below a certain threshold—i.e., it will
be tri-stated after approximately 10µs.
Care must taken as synchronized DCP0105s will turn on
simultaneously very quickly and draw 300mA each until
each output capacitor is fully charged. This may exact a
heavy demand on the input power supply.
The SYNCOUT pin gives an unrectified 400kHz signal from
the transformer. This can be used to set the timing of
external circuitry on the output side. In noise sensitive
applications any pick-up from the SYNCOUT pin can be
minimized by putting a guard ring round the pin (see
Figure 7).
+5V
+5V
DIVIDE BY 2 RESET
1
2
14
Isolated DC/DC converter performance normally suffers
after power reset. This is because a change in the steady state
transformer flux creates an offset after power-up. The DCP01
family does not suffer from this problem. This is achieved
through a patented(1) technique employed on the divide by 2
reset circuitry resulting in no change in output phase after
power interruption.
C5
470nF
VS
0V
SYNCIN
SYNCIN
SYNCIN
1 per DCP01
DCP0105
5
6
7
–Out 1
+Out 1
0V
C3
470nF
Out+
8
CONSTRUCTION
The DCP0105’s basic construction is the same as standard
ICs. There is no substrate within the molded package. The
DCP0105 is constructed using an IC, rectifier diodes, and a
wound magnetic toroid on a leadframe. As there is no solder
within the package, the DCP0105 does not require any
special PCB assembly processing. This results in an isolated
DC/DC with inherently high reliability.
1
2
14
VS
0V
DCP0105
5
6
7
–Out 2
+Out 2
0V
C2
470nF
Out+
8
ADDITIONAL FUNCTIONS
DISABLE/ENABLE
1
2
14
VS
0V
The DCP0105 can be disabled or enabled by driving the
SYNCIN pin with an open drain CMOS gate. If the SYNCIN
pin is pulled LOW, the DCP0105 will disable. The disable
time depends on the output loading but the internal shutdown
takes up to 10µs. Making the gate open drain will re-enable
the DCP0105. However, there is a trade-off in using this
function; the DCP0105 quiescent current may increase and
the on-chip oscillator may run slower. This degradation in
performance is dependent on the external CMOS gate capaci-
tance. Therefore, the smaller the capacitance, the lower the
DCP0105
5
6
7
–Out 3
+Out 3
0V
C4
470nF
Out+
8
FIGURE 1. Standard Interface.
®
13
DCP0105
interface using a 4066 quad switch. The CTL and SYNCON
pins are used to select external synchronization or self-
synchronization.
performance decrease. Driving the SYNCIN pin with a CPU
type tri-state output, which has a low output capacitance,
offers the lowest reduction in performance.
This interface can also be used to stop (disable) the DCP0105.
DECOUPLING
CTL
SYNCON
FUNCTION
Ripple Reduction
1
—
0
1
0
1
External Sync
Self-Sync
Device Stop
The high switching frequency of 400kHz allows simple
filtering. To reduce ripple, it is recommended that 0.47µF
capacitors are used on VS and VOUT (see Figure 2). Both
outputs on dual output DCP0105 devices should be decoupled
to pin 5. In applications where power is supplied over long
lines and output loading is high, it may be necessary to use
a 2.2µF capacitor on the input to insure startup.
+5V
1
2
VS
0V
C1
0.47µF
There is no restriction on the size of the output capacitor
used to reduce ripple. The DCP0105 will start into any
capacitive load. Low ESR capacitors will give the best
reduction.
DCP0105
5
6
0V
VOut
2W
2W
C2
0.47µF
R1
27Ω
R2
330Ω
EXTERNAL SYNCHRONIZATION
The DCP0105 can be synchronized externally if required
using a simple external interface. Figure 3 shows a universal
FIGURE 2. DCP010505 Fully Loaded.
+5V
1
2
14
VCC
0V
SYNC
0V
DCP0105
+5V
+5V
5
6
7
–Out 1
+Out 1
Out–
Out+
C2
470nF
C1
470nF
(One Per
DC/DC)
R1
33kΩ
8
0V
I/O1A
U1
I/O1B
CONT
CTL
1
2
14
VCC
0V
SYNC
0V
FREQ IN
DCP0105
I/O1A
I/O1B
U3
5
6
7
–Out 2
+Out 2
Out–
Out+
C3
470nF
CONT
8
I/O1A
I/O1B
U4
CONT
R2
33kΩ
0V
I/O1A
I/O1B
U5
1
2
14
VCC
0V
SYNC
CONT
SYNC ON
R3
33kΩ
4066
0V
DCP0105
5
6
7
–Out 3
+Out 3
Out–
Out+
C4
470nF
8
FIGURE 3. Universal Interface.
®
14
DCP0105
Connecting the DCP0105 in Series
Connecting the DCP0105 in Parallel
Multiple DCP0105 isolated 1W DC/DC converters can be
connected in series to provide non-standard voltage rails.
This is possible by utilizing the floating outputs provided by
the DCP0105’s galvanic isolation.
If the output power from one DCP0105 is not sufficient, it
is possible to parallel the outputs of multiple DCP0105s (see
Figure 6). Again, the SYNC feature allows easy synchroni-
zation to prevent power-rail beat frequencies at no additional
filtering cost.
Connect the positive VOUT from one DCP0105 to the nega-
tive VOUT (0V) of another (see Figure 4). If the SYNCIN pins
are tied together, the self-synchronization feature of the
DCP0105 will prevent beat frequencies on the voltage rails.
The SYNC feature of the DCP0105 allows easy series
connection without external filtering which is necessary in
competing solutions.
THERMAL MANAGEMENT LAYOUT
To maximize the thermal performance of the DCP0105,
taking more care in the PCB layout can provide the most
efficient thermal dissipation paths from the DC/DC. The
input controller IC and the rectifier diodes inside the DCP0105
are bonded directly onto the internal leadframe. The
leadframe, being almost 100% copper, provides an excellent
path for dissipated heat and does so significantly more
efficiently than FR4 PCBs or ceramic substrates found in
alternate packaging technology DC/DCs.
The outputs on dual output DCP0105 versions can also be
connected in series to provide 2 times the magnitude of
VOUT (see Figure 5). For example, a dual 12V DCP010512D
could be connected to provide a 24V rail.
VSUPPLY
VOUT 1
VS
SYNCIN
0V
DCP
0105
0V
VOUT1 + VOUT 2
VS
VOUT 2
DCP
0105
SYNCIN
0V
0V
COM
FIGURE 4. Connecting the DCP0105 in Series.
VSUPPLY
+VOUT
VS
0V
+VOUT
–VOUT
0V
DCP
0105
–VOUT
COM
FIGURE 5. Connecting Dual Outputs in Series.
VSUPPLY
VOUT
VS
SYNCIN
0V
DCP
0105
0V
2 x Power Out
VS
VOUT
DCP
0105
SYNCIN
0V
0V
COM
FIGURE 6. Connecting Multiple DCP0105s in Parallel.
®
15
DCP0105
Most of the dissipated heat comes from input side common
(pin 2). To a lesser extent, the +VOUT pin (pin 6) also
dissipates heat from the package. In the layout shown in
Figure 7, the large copper areas next to pins 2 and 6 will
provide excellent heat dissipation paths.
dependent on the VIN of the DCP010505. With a VIN of
5.25V, the LP2986 LDO can deliver up to 165mA.
The LP2986 LDO has a very low dropout voltage of typi-
cally less than 180mV, which allows us to deliver 4.75V
guaranteed from a 5VOUT unregulated DC/DC. It also offers
low output flagging and shutdown capability and is supplied
in either MSOP-8 or SO-8 packages ensuring additional
board area is minimal and low profile is maintained.
The tracking in Figure 7, shown in dotted lines, will provide
shielding for the SYNCIN (pin 14) and SYNCOUT (pin 7)
pins if necessary.
As described earlier in the Disable/Enable section of this
data sheet, any additional capacitance to the 25pF internal
capacitor at the SYNCIN pin will affect performance. If there
is the possibility of significant leakage capacitance at the
SYNCIN pin, it can be shielded as shown.
SIP DC/DC
DCP01xx
As described earlier in the Synchronization section of this
data sheet, the SYNCOUT pin can be shielded as shown to
minimize noise pick-up in sensitive applications.
+VIN
–VIN
0V
+VOUT
–VOUT
FIGURE 8. PCB Layout for DCP0105 and Competitive SIP
DC/DC.
5.0
4.8
4.6
4.4
Bottom View
FIGURE 7. Thermal Management Layout.
LAYOUT FOR DCP0105 AND SIP PRODUCTS
Figure 8 shows a layout to allow the use of a DCP0105 and
a competitive SIP isolated DC/DC converter.
4.2
VIN = 5V
VIN = 5.25V
VIN = 4.75V
4.0
3.8
POST REGULATION OF THE DCP010505P USING
THE LP2986 LDO REGULATOR
0
50
100
150
200
In digital applications where the load range is wide or
evolving, or the input supply voltage is not well regulated
and 5V±5% or 5V±V10% cannot be guaranteed, it is often
necessary to have a regulated 5V output from the DCP0105.
IOUT (mA)
FIGURE 9. DCP010505P AND LP2986 Regulator.
It is possible to post regulate the 5VOUT DCP0105 and still
guarantee a minimum VOUT of 4.75V. This still gives the
benefits of isolation in reducing the power supply noise to
5V digital circuitry.
DCP01 AND LP2986 APPLICATION CIRCUIT
Figure 10 shows the LP2986 in series with the DCP010505
output. The 2.2µF capacitor on the input of the LP2986 and
the 4.7µF capacitor on the output are the minimum recom-
mended for good ripple reduction. Pin 7 on the LP2986 flags
an error by going LOW if the output drops 5% below
nominal.
By using an ultra-low dropout regulator (e.g., National
Semiconductor’s LP2986IM-5.0) in series with the output of
a 5VOUT DCP0105, it is possible to supply up to 100% load
current (depending on VIN). Figure 9 shows the typical load
current for the post-regulated 5VIN/5VOUT DCP010505. It is
possible with a VIN of 5V to supply 130mA. Because of the
1:1 line regulation of the DCP0105, a 5% change in the input
will result in a 5% change in the output. Therefore, the
amount of current that the LDO can deliver is strongly
®
16
DCP0105
OTHER LDO REGULATORS
2. To predict the output voltage at 10% load take the mea-
sured or specified voltage at 75% load and multiply by
(1 + Load Reg 10% to 75%). For example a DCP010505P
typical VOUT at 10% load will be 5V x (1 + 17%) = 5.85V.
The SGS-Thomson L4940V5 LDO can also be used to post
regulate the 5VOUT DCP010505 and can deliver a regulated
minimum 4.75V up to 135mA.
3. To predict the output voltage at 25% load on higher VOUT
versions take the measured or specified voltage at 75%
load and multiply by (1 + Load Reg 25% to 75%). For
example a DCP010512P typical VOUT at 25% load will be
12V x (1 + 12%) = 13.4V. To then estimate the voltage at
10% load take the previously calculated VOUT at
25% load and multiply by (1 + Load Reg 10% to 25%).
In this case the typical VOUT at 10% load will be 13.4V x
(1 + 7%) = 14.3V.
The 5VOUT DCP010505 can also be post regulated with the
Micrel MIC5207 which offers up to 180mA output drive
with a typical dropout voltage of 165mV at 150mA. The
MIC5207 is available in a micro-sized SOT23-5 package
which gives the minimum additional board area for post
regulation.
PREDICTING OUTPUT VOLTAGE VERSUS LOAD
The Load Regulation specifications are calculated as fol-
lows:
To obtain predictions for loads other than those specified
assume the VOUT versus load characteristic is linear between
the load points and calculate accordingly. The 10% to 100%
load specification guarantees the maximum voltage excursion
for any load between 10% to 100% with respect to VOUT at
75% load.
CONDITION
CALCULATION
10% to 100% Load
10% to 25% Load
10% to 75% Load
75% to 100% Load
(VOUT at 10% load – VOUT at 100% load)/ VOUT at 75% load
(VOUT at 10% load – VOUT at 25% load)/VOUT at 25% load
(VOUT at 10% load – VOUT at 75% load)/VOUT at 75% load
(VOUT at 75% load – VOUT at 100% load)/ VOUT at 75% load
The above does not take into consideration line regulation and
assumes a nominal input voltage. The 1:1 line regulation of the
DCP01 family means that a percentage change in the input
will give a corresponding percentage change in the output.
1. To predict the output voltage at 100% load take the mea-
sured or specified voltage at 75% load and multiply by
(1 + Load Reg 75% to 100%). For example a DCP010505P
typical VOUT at 100% load will be 5V x (1 – 8%) = 4.6V.
Output
Error
4
3
2
1
5
6
7
8
6
VIN
1
330kΩ
DCP
0105
LP2986
2.2µF
Load
2
5
0.47µF
+
4.7µF
0V
Com
FIGURE 10. Post Regulation of DCP010505P.
15.24 (0.600)
11.8 (0.464)
1.9 (0.075)
2.54 (0.100)
14-Pin
1.2 (0.047)
All Leads on 2.54mm Pitch
Dimensions in mm (inches)
FIGURE 11. PCB Pad Size and Placement for “U” Package.
17
®
DCP0105
相关型号：
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